Extraction of electronic parameters of Schottky diode based on an organic Orcein

An Au/Orcein/p-Si/Al device was fabricated and the current-voltage measurements of the devices showed diode characteristics. Then the current-voltage (I-V), capacitance-voltage (C-V) and capacitance-frequency (C-f) characteristics of the device were investigated at room temperature. Some junction parameters of the device such as ideality factor, barrier height, and series resistance were determined from I-V and C-V characteristics. The ideality factor of 2.48 and barrier height of 0.70 eV were calculated using I-V characteristics. It has been seen that the Orcein layer increases the effective barrier height of the structure since this layer creates the physical barrier between the Au and the p-Si. The interface state density N_ss were determined from the I-V plots. The capacitance measurements were determined as a function of voltage and frequency. It was seen that the values of capacitance have modified with bias and frequency.     

Effect of 6 MeV electron irradiation on electrical characteristics of the Au/n-Si/Al Schottky diode

Electron irradiation of the Au/n-Si/Al Schottky diode was performed by using 6 MeV electrons and 3 × 10¹² e⁻/cm² fluency. The current-voltage (I-V), capacitance-voltage (C-V) and capacitance-frequency (C-f) characteristics of the unirradiated and irradiated Schottky diode were analyzed. It was seen that the values of the barrier height, the series resistance, and the ideality factor increased after electron irradiation. However, there was a decrease in the leakage current with electron irradiation. The increase in the barrier height and in the series resistance values was attributed to the dopant deactivation in the near-interface region. The interface states, N_ss, have been decreased significantly after electron irradiation. This was attributed to the decrease in recombination centre and the existence of an interfacial layer. A decrease in the capacitance was observed after electron irradiation. This was attributed to decrease in the net ionized dopant concentration with electron irradiation.     

On the temperature dependence of series resistance and interface states in Al/SiO2/p-Si (MIS) Schottky diodes

The capacitance-voltage-temperature (C-V-T) and conductance-voltage-temperature (G/w-V-T) characteristics of metal-semiconductor (Al/p-Si) Schottky diodes with thermal growth interfacial layer were investigated by considering series resistance effect in the wide temperature range (80-400 K). It is found that in the presence of series resistance, the forward bias C-V plots exhibit a peak, and experimentally shows that the peak positions shift towards higher positive voltages with increasing temperature, and the peak value of the capacitance has a maximum at 80 K. The C-V and (G/w-V) characteristics confirm that the N_ss and R_s of the diode are important parameters that strongly influence the electric parameters in (Al/SiO₂/p-Si) MIS Schottky diodes. The crossing of the G/w-V curves appears as an abnormality when seen with respect to the conventional behaviour of the ideal MS or MIS Schottky diode. It is thought that the presence of a series resistance keeps this intersection hidden and unobservable in homogeneous Schottky diodes, but it appears in the case of inhomogeneous Schottky diode. In addition, the high frequency (C_m) and conductance (G_m/w) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real diode capacitance.     

Electrical analysis of Al/ZnO/p-Si,Al/PMMA/p-Si and Al/PMMA/ZnO/p-Si structures: Comparison study

Al/ZnO/p-Si, Al/PMMA/p-Si and Al/PMMA/ZnO/p-Si structures were fabricated. Based on the measured current–voltage (C–V) and capacitance–voltage curves, the electrical characteristics of these heterostructures such as ideality factor, barrier height and series resistance of each structure were analyzed and then compared with those of Al/PMMA/ZnO/p-Si. According to C–V measurement, it was found that the Al/PMMA/ZnO/p-Si structure indicates the better electronic performance rather than other structures. The obtained results represent low series resistance (19.3 Ω) after coating with polymethyl methacrylate (PMMA) over ZnO/p-Si heterojunction structure for Al/PMMA/ZnO/p-Si heterostructure.     

Electrical characteristics and inhomogeneous barrier analysis of Au-Be/p-InSe:Cd Schottky barrier diodes

We have identically prepared Au-Be/p-InSe:Cd Schottky barrier diodes (SBDs) (21 dots) on the InSe:Cd substrate. The electrical analysis of Au-Be/p-InSe:Cd structure has been investigated by means of current-voltage (I-V), capacitance-voltage (C-V) and capacitance-frequency (C-f) measurements at 296 K temperature in dark conditions. The effective barrier heights and ideality factors of identically fabricated Au-Be/p-InSe:Cd SBDs have been calculated from their experimental forward bias current-voltage (I-V) characteristics by applying a thermionic emission theory. The BH values obtained from the I-V characteristics have varied between 0.74 eV and 0.82 eV with values of ideality factors ranging between 1.49 and 1.11 for the Au-Be/p-InSe:Cd SBDs. It has been determined a lateral homogeneous barrier height value of approximately 0.82 eV for these structures from the experimental linear relationship between barrier heights and ideality factors. The Schottky barrier height (SBH) value has been obtained from the reverse-bias C-V characteristics of Au-Be/p-InSe:Cd SBD for only one diode. At high currents in the forward direction, the series resistance effect has been observed. The value of series resistance has been determined from I-V measurements using Cheung’s and Norde’s methods.     

The frequency-dependent electrical characteristics of interfaces in the Sn/p-Si metal semiconductor structures

The purpose of this paper is to investigate frequency-dependent electrical characteristics of the interface states in Sn/p-Si metal semiconductor (MS) Schottky structures. To yield quantitative information about their frequency (f) and voltage (V) dependent characteristics, Sn/p-Si MS structures have been studied by using capacitance (C) and conductance (G/ω) measurements over a wide range of frequencies (50 kHz-1 MHz). The increase in capacitance at lower frequencies is seen as a signature of interface states, and the densities of which are evaluated to be of the order of ≅10¹⁰ cm⁻² eV⁻¹. The presence of the interfaces states (N_SS) is also evidenced as a peak in the capacitance-frequency characteristics that increases in magnitude with decreasing frequencies. Furthermore, the voltage and frequency dependence of series resistance (R_S) were calculated from the C-V and G/ω-V measurements and plotted as functions of voltage and frequency. The effect of R_S on C and G/ω is found noticeable at high frequencies. The C-V-f and G/ω-V-f characteristics of studied structures show fairly large frequency dispersion especially at low frequencies due to N_SS in equilibrium with the semiconductor. The experimental values of interface state densities and series resistance from C-V-f and G/ω-V-f measurements were obtained in the ranges of 3.46 × 10¹⁰−1.26 × 10⁹ cm⁻² eV⁻¹ and 71.1-57.3 Ω, respectively. Experimental results show that both the R_S and N_SS values should be taken into account in determining frequency-dependent electrical characteristics.     

Temperature dependent electrical and dielectric properties of Au/polyvinyl alcohol (Ni, Zn-doped)/n-Si Schottky diodes

The electrical and dielectric properties of Au/PVA (Ni, Zn-doped)/n-Si Schottky diodes (SDs) were studied in the temperature range of 80-400 K. The investigation of various SDs fabricated with different types of interfacial layer is important for understanding the electrical and dielectric properties of SDs. Therefore, in this study polyvinyl alcohol (PVA) film was used as an interfacial layer between metal and semiconductor. The electrical and dielectric properties of Au/PVA (Ni, Zn-doped)/n-Si SDs were calculated from the capacitance-voltage (C-V) and conductance-voltage (G/w-V) measurements. The effects of interface state density (N_ss) and series resistance (R_s) on C-V characteristics were investigated in the wide temperature range. It was found that both of the C-V-T and G/w-V-T curves included two abnormal regions and one intersection point. The dielectric constant (ε″), dielectric loss (ε″), dielectric loss tangent (tan δ) and the ac electrical conductivity (σ_ac) obtained from the measured capacitance and conductance were studied for Au/PVA (Ni, Zn-doped)/n-Si SDs. Experimental results show that the values of ε′, ε″ and tan δ are a strong function of the temperature. Also, the results indicate the interfacial polarization can be more easily occurred at high temperatures.     

On the profile of frequency and voltage dependent interface states and series resistance in (Ni/Au)/Al0.22Ga0.78N/AlN/GaN heterostructures by using current-voltage (I-V) and admittance spectroscopy methods

In order to explain the experimental effect of interface states (N_ss) and series resistance (R_s) of device on the non-ideal electrical characteristics, current-voltage (I-V), capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of (Ni/Au)/Al_0.22Ga_0.78N/AlN/GaN heterostructures were investigated at room temperature. Admittance measurements (C-V and G/ω-V) were carried out in frequency and bias voltage ranges of 2 kHz-2 MHz and (−5 V)-(+5 V), respectively. The voltage dependent R_s profile was determined from the I-V data. The increasing capacitance behavior with the decreasing frequency at low frequencies is a proof of the presence of interface states at metal/semiconductor (M/S) interface. At various bias voltages, the ac electrical conductivity (σ_ac) is independent from frequencies up to 100 kHz, and above this frequency value it increases with the increasing frequency for each bias voltage. In addition, the high-frequency capacitance (C_m) and conductance (G_m/ω) values measured under forward and reverse bias were corrected to minimize the effects of series resistance. The results indicate that the interfacial polarization can more easily occur at low frequencies. The distribution of N_ss and R_s is confirmed to have significant effect on non-ideal I-V, C-V and G/ω-V characteristics of (Ni/Au)/Al_0.22Ga_0.78N/AlN/GaN heterostructures.     

The C-V-f and G/ω-V-f characteristics of Al/SiO2/p-Si (MIS) structures

The frequency dependence of capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of the Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) structures has been investigated taking into account the effect of the series resistance (R_s) and interface states (N_ss) at room temperature. The C-V and G/ω-V measurements have been carried out in the frequency range of 1 kHz to 1 MHz. The frequency dispersion in capacitance and conductance can be interpreted only in terms of interface states and series resistance. The N_ss can follow the ac signal and yield an excess capacitance especially at low frequencies. In low frequencies, the values of measured C and G/ω decrease in depletion and accumulation regions with increasing frequencies due to a continuous density distribution of interface states. The C-V plots exhibit anomalous peaks due to the N_ss and R_s effect. It has been experimentally determined that the peak positions in the C-V plot shift towards lower voltages and the peak value of the capacitance decreases with increasing frequency. The effect of series resistance on the capacitance is found appreciable at higher frequencies due to the interface state capacitance decreasing with increasing frequency. In addition, the high-frequency capacitance (C_m) and conductance (G_m/ω) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real diode capacitance. Experimental results show that the locations of N_ss and R_s have a significant effect on electrical characteristics of MIS structures.     

The effects of 12 MeV electron irradiation on the electrical characteristics of the Au/Aniline blue/p-Si/Al device

An Au/Aniline blue (AB)/p-Si/Al structure has been fabricated and then the effect of electron irradiation (12 MeV electron energy and 5 × 10¹² e⁻ cm⁻² fluence) on the contact parameters of the device has been analysed by using the current-voltage (I-V), capacitance-voltage (C-V), and conductance-voltage (G/w-V) measurements, at room temperature. Since the organic layer creates a physical barrier between the metal and the semiconductor, it has been seen that the AB layer causes an increase in the effective barrier height of the device. Cheung functions, Norde model and conductance method have been used in order to determine the diode parameters. The values of the ideality factor, barrier height and series resistance increased after the electron irradiation. This has been attributed to a decrease in the net ionized dopant concentration that occurred as a result of electron irradiation.     

Analysis of electrical characteristics of Au/SiO2/n-Si (MOS) capacitors using the high-low frequency capacitance and conductance methods

The purpose of this paper is to analyze electrical characteristics in Au/SiO₂/n-Si (MOS) capacitors by using the high-low frequency (C_HF-C_LF) capacitance and conductance methods. The capacitance-voltage (C-V) and conductance-voltage (G/ω-V) measurements have been carried out in the frequency range of 1 kHz-10 MHz and bias voltage range of (−12 V) to (12 V) at room temperature. It was found that both C and G/ω of the MOS capacitor were quite sensitive to frequency at relatively low frequencies, and decrease with increasing frequency. The increase in capacitance especially at low frequencies is resulting from the presence of interface states at Si/SiO₂ interface. Therefore, the interfacial states can more easily follow an ac signal at low frequencies, consequently, which contributes to the improvement of electrical properties of MOS capacitor. The interface states density (N_ss) have been determined by taking into account the surface potential as a function of applied bias. The energy density distribution profile of N_ss was obtained from C_HF-C_LF capacitance method and gives a peak at about the mid-gap of Si. In addition, the high frequency (1 MHz) capacitance and conductance values measured under both reverse and forward bias have been corrected for the effect of series resistance (R_s) to obtain the real capacitance of MOS capacitors. The frequency dependent C-V and G/ω-V characteristics confirm that the N_ss and R_s of the MOS capacitors are important parameters that strongly influence the electrical properties of MOS capacitors.     

Ta/Si Schottky diodes fabricated by magnetron sputtering technique

Electrical properties of Ta/n-Si and Ta/p-Si Schottky barrier diodes obtained by sputtering of tantalum (Ta) metal on semiconductors have been investigated. The characteristic parameters of these contacts like barrier height, ideality factor and series resistance have been calculated using current voltage (I-V) measurements. It has seen that the diodes have ideality factors more than unity and the sum of their barrier heights is 1.21 eV which is higher than the band gap of the silicon (1.12 eV). The results have been attributed the effects of inhomogeneities at the interface of the devices and native oxide layer. In addition, the barrier height values determined using capacitance-voltage (C-V) measurements have been compared the ones obtained from I-V measurements. It has seen that the interface states have strong effects on electrical properties of the diodes such as C-V and R_s-V measurements.     

Characterization of current-voltage (I-V) and capacitance-voltage-frequency (C-V-f) features of Al/SiO2/p-Si (MIS) Schottky diodes

The current-voltage (I-V) characteristics of metal-insulator-semiconductor Al/SiO₂/p-Si (MIS) Schottky diodes were measured at room temperature (300 K). In addition, capacitance-voltage-frequency (C-V-f) characteristics are investigated by considering the interface states (N_ss) at frequency range 100 kHz to 1 MHz. The MIS Schottky diode having interfacial insulator layer thickness of 33 Å, calculated from the measurement of the insulator capacitance in the strong accumulation region. At each frequency, the measured capacitance decreases with increasing frequency due to a continuous distribution of the interface states. From the I-V characteristics of the MIS Schottky diode, ideality factor (n) and barrier height (Φ_b) values of 1.766 and 0.786 eV, respectively, were obtained from a forward bias I-V plot. In addition, the interface states distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) for the Schottky diode. The diode shows non-ideal I-V behaviour with ideality factor greater than unity. This behaviour is attributed to the interfacial insulator layer, the interface states and barrier inhomogeneity of the device. As expected, the C-V curves gave a barrier height value higher than those obtained from I-V measurements. This discrepancy is due to the different nature of the I-V and C-V measurement techniques.     

Titanium-aluminum oxynitride (TAON) as high-k gate dielectric for sub-32 nm CMOS technology

High-k insulators for the next generation (sub-32 nm CMOS (complementary metal-oxide-semiconductor) technology), such as titanium-aluminum oxynitride (TAON) and titanium-aluminum oxide (TAO), have been obtained by Ti/Al e-beam evaporation, with additional electron cyclotron resonance (ECR) plasma oxynitridation and oxidation on Si substrates, respectively. Physical thickness values between 5.7 and 6.3 nm were determined by ellipsometry. These films were used as gate insulators in MOS capacitors fabricated with Al electrodes, and they were used to obtain capacitance-voltage (C-V) measurements. A relative dielectric constant of 3.9 was adopted to extract the equivalent oxide thickness (EOT) of films from C-V curves under strong accumulation condition, resulting in values between 1.5 and 1.1 nm, and effective charge densities of about 10¹¹ cm⁻². Because of these results, nMOSFETs with Al gate electrode and TAON gate dielectric were fabricated and characterized by current-voltage (I-V) curves. From these nMOSFETs electrical characteristics, a sub-threshold slope of 80 mV/dec and an EOT of 0.87 nm were obtained. These results indicate that the obtained TAON film is a suitable gate insulator for the next generation (MOS) devices.     

Millisecond flash-lamp annealing of LaLuO3

Metal-oxide-semiconductor capacitors containing the alternative high-k dielectric LaLuO₃ were treated by flash lamp annealing (FLA). Capacitance-voltage (C-V) and current-voltage (J-V) characteristics reveal an increase in the capacitance for the flashed samples while the very low leakage current of the LaLuO₃ is retained. Microstructural investigations confirm the thermal stability of the film even after FLA at 1200 °C, 20 ms.     

Electrical Characteristics of Al/Poly(methyl methacrylate)/p-Si Schottky Device

Al/Poly(methyl methacrylate)(PMMA)/p-Si organic Schottky devices were fabricated on a p-Si semiconductor wafer by spin coating of PMMA solution. The capacitance–voltage (C–V) and conductance–voltage (G–V) characteristics of Al/PMMA/p-Si structures have been investigated in the frequency range of 1 kHz–10 MHz at room temperature. The diode parameters such as ideality factor, series resistance and barrier height were calculated from the forward bias current–voltage (I–V) characteristics. In order to explain the electrical characteristics of metal–polymer–semiconductor (MPS) with a PMMA interface, the investigation of interface states density and series resistance from C–V and G–V characteristics in the MPS structures with thin interfacial insulator layer have been reported. The measurements of capacitance (C) and conductance (G) were found to be strongly dependent on bias voltage and frequency for Al/PMMA/p-Si structures. The values of interface state density (D _it) were calculated. These values of D _it and series resistance (R _s) were responsible for the non-ideal behavior of I–V and C–V characteristics.     

Frequency and temperature dependent dielectric properties of Al/Si3N4/p-Si(1 0 0) MIS structure

The dielectric properties of Al/Si₃N₄/p-Si(1 0 0) MIS structure were studied from the C-V and G-V measurements in the frequency range of 1 kHz to 1 MHz and temperature range of 80-300 K. Experimental results shows that the ε′ and ε″ are found to decrease with increasing frequency while the value of ε′ and ε″ increase with increasing temperature, especially, above 160 K. As typical values, the dielectric constant ε′ and dielectric loss ε″ have the values of 7.49, 1.03 at 1 kHz, and only 0.9, 0.02 at 1 MHz, respectively. The ac electrical conductivity (σ_ac) increases with both increasing frequency and temperature. The activation energy of 24 meV was calculated from Arrhenius plot at 1 MHz. The results indicate that the interfacial polarization can be more easily occurred at low frequencies and high temperatures.     

Effect of series resistance on the electrical characteristics and interface state energy distributions of Sn/p-Si (MS) Schottky diodes

In this study, electrical characteristics of the Sn/p-type Si (MS) Schottky diodes have been investigated by current-voltage (I-V) and capacitance-voltage (C-V) measurements at room temperature. The barrier height obtained from C-V measurement is higher than obtained from I-V measurement and this discrepancy can be explained by introducing a spatial distribution of barrier heights due to barrier height inhomogeneities, which are available at the nanostructure Sn/p-Si interface. A modified Norde’s function combined with conventional forward I-V method was used to extract the parameters including barrier height (Φ_b) and the series resistance (R_S). The barrier height and series resistance obtained from Norde’s function was compared with those from Cheung functions. In addition, the interface-state density (N_SS) as a function of energy distribution (E_SS-E_V) was extracted from the forward-bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_b) and series resistance (R_S) for the Schottky diodes. While the interface-state density (N_SS) calculated without taking into account series resistance (R_S) has increased exponentially with bias from 4.235 × 10¹² cm⁻²eV⁻¹ in (E_SS - 0.62) eV to 2.371 × 10¹³ cm⁻²eV⁻¹ in (E_SS - 0.39) eV of p-Si, the N_SS obtained taking into account the series resistance has increased exponentially with bias from of 4.235 × 10¹² to 1.671 × 10¹³ cm⁻²eV⁻¹ in the same interval. This behaviour is attributed to the passivation of the p-doped Si surface with the presence of thin interfacial insulator layer between the metal and semiconductor.     

Pentacene/n-Si heterojunction diodes and photovoltaic devices investigated by I-V and C-V measurements

The forward and reverse current density-voltage (J-V) and capacitance-voltage (C-V) characteristics of pentacene/n⁻-silicon heterojunction diodes were investigated to clarify the carrier conduction mechanism at the organic/inorganic heterojunction. Current rectification characteristics of the pentacene/n⁻-Si junctions can be explained by a Schottky diode model with an interfacial layer. The diode parameters such as Schottky barrier height and ideality factor were estimated to be 0.79-1.0 eV and 2.4-2.7, respectively. The C-V analysis suggests that the depletion layer appears selectively in the n⁻-Si layer with a thickness of 1.47 μm from the junction with zero bias and the diffusion potential was estimated at 0.30 eV at the open-circuit condition. The present heterojunction allows the photovoltaic operation with power conversion efficiencies up to 0.044% with a simulated solar light exposure of 100 mW/cm².     

Fabrication and characterization of in situ polymerized n-polyaniline films grown on p-Si heterojunctions

This work presents a study on the fabrication and the electrical transport mechanism of the in situ polymerized n-type polyaniline (PANI) grown on p-type Si to form n-polyaniline/p-Si heterojunction devices. The current-voltage-temperature (I-V-T) characteristics of n-PANI/p-Si devices were investigated in the temperature range of 298-373 K. These devices showed good rectifying behavior and the temperature dependence of the I-V characteristics were successfully explained by the thermionic mechanism in the narrow potential range, V ? 0.4 V. The barrier height, ideality factor and the series resistance values of this structure were obtained from the forward bias I-V characteristics. The capacitance-voltage-temperature (C-V-T) characteristics of n-PANI/p-Si devices were also investigated. The barrier height values obtained from the C-V measurements were found to be higher than that obtained from the I-V measurements at various temperatures. From the capacitance-voltage-frequency (C-V-f) characteristics, it was found that the capacitance remained almost constant up to a certain values of the frequency in the lower and higher sides of the frequency scale. The higher values of capacitance at low frequencies were attributed to the excess capacitance resulting from the interface states in equilibrium with the p-Si side that can follow the AC signal.