Dual-work-function metal gates by full silicidation of poly-Si with Co-Ni bi-Layers

Dual-work-function metal gates fabricated by full silicidation (FUSI) of Co-Ni bi-layer with doped poly-Si were investigated for the first time, along with single-metal FUSI systems of CoSi/sub 2/ and NiSi. Complete conversion of poly-Si into Co-Ni alloy silicided metal gate (FUSI) Co/sub x/Ni/sub 1-x/Si/sub 2/ was demonstrated. Although a linear relationship between work function and Ni percentage was observed for FUSI of undoped poly-Si systems, the work functions of doped Co/sub x/Ni/sub 1-x/Si/sub 2/ are almost identical to those of doped NiSi FUSI metal gates. The alloy FUSI metal gates explored in this letter provide a new class of metal gates for CMOS devices that combine the advantages of both NiSi and CoSi/sub 2/, i.e., proper work function tunability of NiSi and high thermal stability of CoSi/sub 2/.     

The effect of Si addition and Ta diffusion barrier on growth and thermal stability of NiSi nanolayer

Formation and thermal stability of nanothickness NiSi layer in Ni(Pt 4 at.%)/Si(1 0 0) and Ni_0.6Si_0.4(Pt 4 at.%)/Si(1 0 0) structures have been investigated using magnetron co-sputtering deposition method. Moreover, to study the effect of Si substrate in formation of NiSi and its thermal stability, we have used Ta diffusion barrier between the Ni_0.6Si_0.4 layer and the Si substrate. Post annealing treatment of the samples was performed in an N₂ environment in a temperature range from 200 to 900 °C for 2 min. The samples were analyzed by four point probe sheet resistance (R_s) measurement, X-ray diffraction (XRD) and atomic force microscopy (AFM) techniques. It was found that the annealing process resulted in an agglomeration of the nanothickness Ni(Pt) layer, and consequently, phase formation of discontinuous NiSi grains at the temperatures greater than 700 °C. Instead, for the Ni_0.6Si_0.4(Pt)/Si structure, 100 °C excess temperature in both NiSi formation and agglomeration indicated that it can be considered as a more thermally stable structure as compared with the Ni(Pt 4 at.%)/Si(1 0 0) structure. XRD, AFM and R_s analyses confirmed formation of a continuous NiSi film with R_s value of 5 Ω/□ in a temperature range of 700−800 °C. Use of Ta diffusion barrier showed that the role of diffusion of Ni atoms into the Si substrate is essential in complete silicidation of a NiSi layer.     

NiSi contact metallization using electroless Ni deposition on Pd-activated self-assembled monolayer (SAM) on p-type Si(1 0 0)

In this paper we describe a method to form NiSi contacts using electroless plating of Nickel or Ni alloy on Pd activated self-assembled monolayer (SAM) on p-type Si(1 0 0). Such method allows uniform deposition of very thin, <30 nm, Ni or Ni alloy films. Clean, oxide free, Si substrate was covered with aminopropyltriethoxysilane (APTES) self-assembled monolayer. The surface was activated with Pd-citrate solution followed by electroless plating. The samples were annealed for 1 h in vacuum (∼10⁻⁶ Torr) forming the silicide layer. The annealing temperatures were 400 °C for NiP alloy and 500 °C for NiPW alloy. X-ray diffraction (XRD) measurement confirmed the presence of NiSi phase after annealing. The silicides material properties were characterized using secondary electron microscopy (SEM) analysis, X-ray diffraction (XRD) and X-ray photon spectroscopy (XPS) profiling. The results are reported and summarized.     

The reaction characteristics of ultra-thin Ni films on undoped and doped Si (100)

Reaction characteristics of ultra-thin Ni films (5 nm and 10 nm) on undoped and highly doped (As-doped and B-doped) Si (100) substrates are investigated in this work. The sheet resistance (Rs) measurements confirm the existence of a NiSi salicidation process window with low Rs values within a certain annealing temperature range for all the samples except the one of Ni(5 nm) on P⁺-Si(100) substrate (abnormal sample). The experimental results also show that the transition reaction to low resistivity phase NiSi is retarded on highly doped Si substrates regardless of the initial Ni film thickness. Micro-Raman and x-ray diffraction (XRD) measurement show that NiSi forms in the process window and NiSi₂ forms in a higher temperature annealing process for all normal substrates. Auger electron spectroscopy (AES) results for the abnormal sample show that the high resistivity of the formation film is due to the formation of NiSi₂.     

A Hafnium interlayer method to improve the thermal stability of NiSi film

The effect of a thin Hafnium interlayer on the thermal stability of NiSi film has been investigated. Both X-ray diffraction and Raman spectra show that no high resistivity NiSi₂ appears in the Hf-additioned films which were post-annealed at temperatures ranging from 600 °C to 800 °C. Auger electron spectroscopy and Rutherford back scattering show that the Hf interlayer has moved to the top of the film after rapid thermal annealing, working as the diffusion barrier for upper Ni atoms. The three-dimensional surface morphology by atom force microscopy shows that the agglomeration of NiSi is effectively suppressed, which is attributed to the barrier effect of the Hf interlayer. The fabricated Ni(Hf)Si/Si Schottky diodes still displays good current-voltage characteristics even after annealed at temperatures varied from 650 °C to 800 °C, which further show that the Hf interlayer can improve the thermal stability of NiSi.     

Study of Ni/Si(1 0 0) solid-state reaction with Y addition

The characteristics of Ni/Si(1 0 0) solid-state reaction with yttrium (Y) addition are studied in this paper. Film stacks of Ti(20 nm)/TiN(40 nm)/Ni(8 nm)/Y(4 nm)/Ni(8 nm)/Si(1 0 0) and Ti(20 nm)/TiN(40 nm)/Ni(7 nm)/Y(6 nm)/Ni(7 nm)/Si(1 0 0) were prepared by physical vapor deposition. After solid-state reaction between metal films and Si was performed by rapid thermal annealing, various material analyses show that NiSi forms even with the addition of Y, and Ni silicidation is accompanied with Y diffusion in Ni film toward its top surface. The electrical characteristic measurements reveal that no significant Schottky barrier height modulation with the addition of Y occurs.     

Boron redistribution during reactive diffusion in Ni-Si contacts

The NiSi silicide that forms by reactive diffusion between Ni and Si-rich active regions of nanotransistors is currently used for contacts in nanoelectronics because of its low resistivity. The redistribution of boron during reactive diffusion between Ni (30 nm) and B doped-Si has been investigated by laser assisted wide-angle tomographic atom probe (LAWATAP). Two states were characterized (room temperature and rapid thermal annealing at 450 °C for 1 min).LAWATAP shows that after deposition of Ni (30 nm) at room temperature a very thin film (7 nm) of Ni silicide was formed. The initial boron distribution in silicon is almost unchanged. After a heat treatment in vacuum at 450 °C (1 min) the nickel monosilicide NiSi was formed. Boron distribution at this stage is very different from that at room temperature. Boron is shown to accumulate at NiSi/Si interface due to snowplow effect. Very small amounts of boron were also found in NiSi phase close to the surface.     

Thermal stability of Ni silicide films on heavily doped n and p Si substrates

Electrical and structural properties of Ni silicide films formed at various temperatures ranged from 200 °C to 950 °C on both heavily doped n⁺ and p⁺ Si substrates were studied. It was found that surface morphology as well as the sheet resistance properties of the Ni silicide films formed on n⁺ and p⁺ Si substrates at the temperatures higher than 600 °C were very different. Agglomerations of Ni silicide films on n⁺ Si substrates begin to occur at around 600 °C while there is no agglomeration observed in Ni silicide films on p⁺ Si substrates up to a forming temperature of 700 °C. It was also found that the phase transition temperature from NiSi phase to NiSi₂ phase depend on substrate types; 900 °C for NiSi film on n⁺ Si substrate and 750 °C for NiSi film on p⁺ Si substrate, respectively. Our results show that the agglomeration is, especially, important factor in the process temperature dependency of the sheet resistance of Ni silicides formed on n⁺ Si substrates.     

Effect of a thin W, Pt, Mo, and Zr interlayer on the thermal stability and electrical characteristics of NiSi

It is reported that the thermal stability of NiSi is improved by employing respectively the addition of a thin interlayer metal (W, Pt, Mo, Zr) within the nickel film. The results show that after rapid thermal annealing (RTA) at temperatures ranging from 650 °C to 800 °C, the sheet resistance of formed ternary silicide Ni(M)Si was less than 3 Ω/□, and its value is also lower than that of pure nickel monosilicide. X-ray diffraction (XRD) and raman spectra results both reveal that only the Ni(M)Si phase exists in these samples, but the high resistance NiSi₂ phase does not. Fabricated Ni(M)Si/Si Schottky barrier devices displayed good I-V electrical characteristics, with the barrier height being located generally between 0.65 eV and 0.71 eV, and the reverse breakdown voltage exceeding to 40 V. It shows that four kinds of Ni(M)Si film can be considered as the satisfactory local connection and contact material.     

Cu contact on NiSi/Si with thin Ru/TaN barrier

Thin Ru(5 nm)/TaN(15 nm) bi-layer was sputtered on the NiSi/Si substrate as a diffusion barrier in the copper contact structure. The barrier properties were investigated through X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), transmission electron microscopy (TEM), energy dispersive X-ray (EDX) and electrical measurement. The whole Cu/Ru/TaN/NiSi/Si structure has a good thermal stability until after annealing at 450 °C. The Schottky barrier measurement shows that the leakage current increases after 450 °C annealing and after 500 °C annealing the barrier fails. Failure mechanism of the barrier stack is discussed.     

Modulation of the effective work function of fully-silicided (FUSI) gate stacks

A systematic analysis of the different methods of work function (WF) tuning for gate stacks using fully silicided (FUSI) gate electrodes is presented. We show that FUSI gates have the potential to meet the WF requirements for future nodes, including high performance applications, achieving band edge WF, with total WF range of up to ∼900 meV. The introduction of dopants (such as Sb, As, P, B) by ion implantation is shown to be effective to tune the WF of NiSi or Ni₃Si₂ on SiO₂ or SiON by ∼550 meV, but is ineffective on HfSiON or for Ni-richer silicides. Different silicide phases can be used for Ni FUSI gates on HfSiON dielectrics, taking advantage of the higher WF of metal-rich silicides, achieving a WF range of ∼400 meV. This method is not effective, however, on SiON dielectrics. The introduction of Lanthanides by several techniques (such as dielectric cap deposition, ion implantation into poly-Si, or at metal deposition) that result in the modification of the dielectric, is found, for Ni FUSI gates, to achieve low WF (∼4.0 eV) suitable for NMOS. Similarly, incorporation of Al can be used to achieve PMOS type WF, as well as the use of metal-rich Ni and/or Pt based FUSI gates (with WF as high as 5.0 eV).     

Work function of Ni silicide phases on HfSiON and SiO/sub 2/: NiSi, Ni/sub 2/Si, Ni/sub 31/Si/sub 12/, and Ni/sub 3/Si fully silicided gates

A complete determination of the effective work functions (WF) of NiSi, Ni/sub 2/Si, Ni/sub 31/Si/sub 12/ and Ni/sub 3/Si on HfSiON and on SiO/sub 2/ is presented. Conditions for formation of fully silicided (FUSI) gates for NiSi/sub 2/, NiSi, Ni/sub 3/Si/sub 2/, Ni/sub 2/Si, Ni/sub 31/Si/sub 12/ and Ni/sub 3/Si crystalline phases were identified. A double thickness series (HfSiON/SiO/sub 2/) was used to extract WF on HfSiON accounting for charge effects. A strong effect on WF of Ni content is observed for HfSiON, with higher WF for the Ni-rich silicides suggesting unpinning of the Fermi level. A mild dependence is observed for SiO/sub 2/. While all Ni-rich silicides have adequate WF for pMOS applications, Ni/sub 2/Si is most attractive due to its low formation temperature, lower volume expansion and ease of integration. Similar threshold voltages (-0.3 V) were obtained on Ni/sub 2/Si and Ni/sub 31/Si/sub 12/ FUSI HfSiON pMOSFETS.     

Characteristics optimization of N2O annealing on tungsten nanocrystal with W/Si dual-sputtered method for nonvolatile memory application

The tungsten nanocrystals (W-NCs) memories fabricated by W/Si dual-sputtering and O₂ and N₂O annealing process were investigated. Significant W-NCs dots were formed by N₂O annealing and proved by the energy dispersive X-ray spectrometer (EDX) analysis. Superior electrical properties of W-NCs memories were optimized for 20/30 W/Si dual-sputtered ratio, 10-15 nm blocking oxide thickness and N₂O annealing at 950 °C. A pronounced capacitance-voltage hysteresis was observed with a memory window of 6.5 V under +9/−9 V sweeping.     

NiSi/Si界面的剖面透射电镜研究

采用不同硅化工艺制备了NiSi薄膜并用剖面透射电镜(XTEM)对样品的NiSi/Si界面进行了研究.在未掺杂和掺杂(包括As和B)的硅衬底上通过物理溅射淀积Ni薄膜,经快速热处理过程(RTP)完成硅化反应.X射线衍射和喇曼散射谱分析表明在各种样品中都形成了NiSi.还研究了硅衬底掺杂和退火过程对NiSi/Si界面的影响.研究表明:使用一步RTP形成NiSi的硅化工艺,在未掺杂和掺As的硅衬底上,NiSi/Si界面较粗糙;而使用两步RTP形成NiSi所对应的NiSi/Si界面要比一步RTP的平坦得多.高分辨率XTEM分析表明,在所有样品中都形成了沿衬底硅〈111〉方向的轴延-NiSi薄膜中的一些特定晶面与衬底硅中的(111)面对准生长.同时讨论了轴延中的晶面失配问题.     

Study of NiSi/Si Interface by Cross-Section Transmission Electron Microscopy

采用不同硅化工艺制备了NiSi薄膜并用剖面透射电镜(XTEM)对样品的NiSi/Si界面进行了研究.在未掺杂和掺杂(包括As和B)的硅衬底上通过物理溅射淀积Ni薄膜,经快速热处理过程(RTP)完成硅化反应.X射线衍射和喇曼散射谱分析表明在各种样品中都形成了NiSi.还研究了硅衬底掺杂和退火过程对NiSi/Si界面的影响.研究表明:使用一步RTP形成NiSi的硅化工艺,在未掺杂和掺As的硅衬底上,NiSi/Si界面较粗糙;而使用两步RTP形成NiSi所对应的NiSi/Si界面要比一步RTP的平坦得多.高分辨率XTEM分析表明,在所有样品中都形成了沿衬底硅〈111〉方向的轴延-NiSi薄膜中的一些特定晶面与衬底硅中的(111)面对准生长.同时讨论了轴延中的晶面失配问题.     

Linewidth effect and phase control in Ni fully silicided gates

The scalability of Ni fully silicided (FUSI) gate processes to short gate lengths was studied for NiSi, Ni/sub 2/Si, and Ni/sub 31/Si/sub 12/. It is shown that the control of the deposited Ni-to-Si ratio is not effective for phase and V/sub t/ control at short gate lengths. A transition to Ni-richer phases at short gate lengths was found for nonoptimized NiSi and Ni/sub 2/Si processes with excessive thermal budgets, resulting in significant V/sub t/ shifts for devices on HfSiON consistent with the difference in work function among the Ni silicide phases. Linewidth-independent phase control with smooth V/sub t/ rolloff characteristics was demonstrated for NiSi, Ni/sub 2/Si, and Ni/sub 31/Si/sub 12/ FUSI gates by controlling the Ni-to-Si reacted ratio through optimization of the thermal budget of silicidation (prior to selective Ni removal). Phase characterization over a wide temperature range indicated that the process windows for scalable NiSi and Ni/sub 2/Si are less than or equal to 25 /spl deg/C, whereas a single-phase Ni/sub 31/Si/sub 12/ is obtained over an /spl sim/200/spl deg/C temperature range.     

Dual work function metal gates using full nickel silicidation of doped poly-Si

This paper investigates the work function adjustment on fully silicided (FUSI) NiSi metal gates for dual-gate CMOS, and how it is effected by the poly-Si dopants. By comparing FUSI on As-, B-, and undoped poly-Si using the same p-Si substrates, it is shown that both As and B influence the work function of NiSi FUSI gate significantly, with As showing more effects than B possibly due to more As pile-up at the NiSi-SiO/sub 2/ interface. No degradations on the underlying gate dielectrics are observed in terms of interface state density (D/sub it/), fixed oxide charges, leakage current, and breakdown voltage, suggesting that NiSi FUSI is compatible with dual-gate CMOS processing.     

Improvement of thermal stability of Ni silicide on N-Si by direct deposition of group III element (Al, B) thin film at Ni/Si interface

The direct deposition of a thin Al or B layer at Ni/Si interface was proposed as a new method to solve a problem of degraded thermal stability of Ni silicide on heavily doped N⁺-Si substrates. Significant improvement of thermal stability evaluated by the sheet resistance vs. silicidation temperature properties was observed. The improvement is attributed to suppression of agglomeration of the silicide layers. The Al layer was effective only when it was located at the Ni/Si interface before the silicidation process. The deposited Al and B layers under Ni layer segregated at the surface after the silicidation process. The use of B layer was preferable to control the phase transition from NiSi to NiSi₂.     

Cu contact on NiSi substrate with a Ta/TaN barrier stack

The thermal and electrical stabilities of Cu contact on NiSi substrate with and without a Ta/TaN barrier stack in between were investigated. Four-point probe (FPP), X-ray diffraction (XRD), scanning electron microscopy (SEM), depth-profiling X-ray photoelectron spectroscopy (XPS), and Schottky barrier height (SBH) measurement were carried out to characterize the diffusion barrier properties. The SBH measurement provides a very sensitive method to characterize the diffusion barrier properties for the copper contact on NiSi/Si. The results show that the Ta/TaN stack can be both thermally and electrically stable after annealing at 450 °C for 30 min and it will have a potential application as a diffusion barrier for Cu contact on NiSi.     

Ni and Ti silicide oxidation for CMOS applications investigated by XRD,XPS and FPP

Although silicide oxidation was studied 20 years ago, the interest of obtaining a robust process for new application appears significant today. Indeed, for the new architectural development process are required dense and narrow spaces. This paper focuses to bury a silicide layer under a protective layer such as silica in order to keep constant the physical and electrical properties of silicide after oxidation. Earlier works show the possibility to oxidize preferably the silicon (Si) in metal contained silicide rather than a pure crystalline Si at high temperatures. Thus, we first tried to reproduce and study these conditions and once acquired, targeted to decrease the oxidation temperature in order to fit with industrial requirements. Titanium (Ti) and Nickel (Ni) are chosen for their metallurgical interest and their integration capability in devices. Thus, four different group/phases (TiSi, TiSi₂, Ni₂Si, NiSi) of silicide were targeted by adjusting the temperature. In situ X-ray diffraction (XRD), photoelectron spectroscopy and sheet resistance (four point probe) measurements were carried out simultaneously before and after oxidation of silicide to characterize the phase and chemical composition. After silicide formation last three phases (TiSi₂, Ni₂Si, NiSi) were confirmed by XRD and G1(Ti/Si) was unknown, where only for NiSi was observed the low sheet resistance (≈7.3 Ω/□) and resistivity (18 μΩ·cm). After (dry, wet and plasma) oxidation, the phases of TiSi₂ and Ni₂Si changed and only NiSi was observed the constant phase, even pure SiO₂ was noted on NiSi after wet oxidation.