Software development for high-performance, reconfigurable, embedded multimedia systems

Reconfigurable platforms can be very effective for lowering production costs because they allow the reuse of architecture resources across a variety of applications. We show how to program a reduced-instruction-set-computing (RISC) microprocessor with a reconfigurable functional unit, focusing on DSP applications and using the example of a turbodecoder. We have developed a complete design flow, including a methodology and compilation tool chain, to address the instruction set hardware-software codesign problem for a processor with a runtime reconfigurable unit. The flow starts from a system-level specification (usually a software program) of the application and partitions it into software and hardware domains to achieve the best speed, power, and area performance, while satisfying resource constraints imposed by the target platform architecture. We describe a methodology and a set of tools that allow extensive design exploration for hardware-software codesign with the goal of improving the overall utilization of reconfigurable multimedia platforms.     

针对嵌入式多媒体系统的外存页面重映射

介绍一种基于硬件的、可编程的外存页面重映射机制,它可以明显地改善性能,并且由于减少了外存总线的访问而降低了功耗。另外还提出了一种把应用数据与指令存储器映射到外存页面的高效算法,使用图着色技术来支配页面映射程序,目标是通过把冲突页面重映射到不同的存储体来避免页面缺失。     

Execution models for reconfigurable embedded real‐time systems

This paper deals with the verification and assignment into the execution environment of Reconfigurable Control Applications following the Component‐based International Industrial Standard IEC61499. According to this Standard, a Function Block (FB) is an event‐triggered component and an application is an FB network that has to meet temporal properties according to user requirements. If a reconfiguration scenario is applied at run‐time, then the FB network implementing the application is totally changed or modified. To cover all possible cases, we classify such scenarios into three classes and we define an agent‐based architecture designed with nested state machines to automatically handle all possible reconfigurations. To verify and assign Function Blocks corresponding to each reconfiguration scenario into the execution environment, we define an approach based on the exploration of reachability graphs to verify temporal properties. This approach constructs feasible Operating System tasks encoding the FB network that corresponds to each scenario. Therefore, the application is considered as sets of Operating System (OS) tasks where each set is to load in memory when the corresponding reconfiguration scenario is applied by the agent. We developed the tool X ‐Assign supporting these contributions that we apply on the FESTO production system available in our research laboratory. Copyright © 2009 John Wiley and Sons Asia Pte Ltd and Chinese Automatic Control Society     

一种DSP嵌入式多媒体应用系统板级支持包的研究

在嵌入式系统中，硬件抽象层作为嵌入式操作系统和硬件之间的软件层次是嵌入式应用的一个关键问题。从硬件抽象层的原理切入，介绍了基于Nexperia 系列数字信号处理器嵌入式多媒体应用系统中板级支持包的实现。     

Energy efficient processing of motion estimation for embedded multimedia systems

Visual sensor networks require low power compression techniques of large amount of video data in each camera node due to the energy-constrained and bandwidth-limited environments. In this paper, energy-efficient architecture for Variable Block Size Motion Estimation is proposed to fully utilize dynamic partial reconfiguration capability of programmable hardware fabric in distributed embedded vision processing nodes. Partial reconfiguration of FPGA is exploited to support run-time reconfiguration of the proposed modular hardware architecture for motion estimation. According to the required search range, hardware reconfiguration is performed adaptively to reduce the hardware resources and power consumption. A reconfigurable ME ranging from simple 1-D to a complex 2-D Sum of Absolute Differences (SAD) array to perform full search block matching is selected in order to support different search window size. The implemented scalable SAD array can provide different resolutions and frame rates for real time applications with multiple reconfigurable regions.     

NCES-based modelling and CTL-based verification of reconfigurable embedded control systems

This paper (This work is done in the research laboratory of Prof. Dr. Hans-Michael Hanisch at the Martin Luther University in Germany, and it is supported by the Alexander von Humboldt foundation in Germany under the reference TUN1127196STP.) deals with automatic reconfigurations of safe embedded control systems following the component-based International Industrial Standard IEC61499 in which a Function Block (FB) is an event triggered software component owning data and a control application is a network of blocks. We define a new semantics of reconfigurations that allow automatic improvements of system performances at run-time even if there are no hardware faults. We apply this new semantics on two Benchmark Production Systems developed in our research laboratory according to this industrial technology. We classify thereafter into three forms all possible reconfiguration scenarios to be applied at run-time by a well-defined agent in order to adapt the system to its environment according to well-defined conditions. The agent is modelled by nested state machines according to the formalism Net Condition/Event Systems (NCES) which is an extension of Petri nets. In order to satisfy user requirements, we specify functional and non-functional properties according to the well-known temporal logic “Computation Tree Logic” (CTL) as well as its extensions eCTL and TCTL, and we apply the model checker SESA to check the whole agent-based architecture of the reconfigurable system.     

A simplified rectification method and its hardware architecture for embedded multimedia systems

Multimedia Tools and Applications - Stereo vision, a future disruptive technology for obtaining three-dimensional distance information, can be applied to various embedded multimedia systems....     

Design of reconfigurable array processor for multimedia application

With the rapid growth of the amount of computations and power consumption, there is a pressing need for a high power-efficiency architecture, which takes account of computational efficiency and flexibility of application. This paper proposes a type of array-processor architecture for multimedia application which is programmable and self-reconfigurable and consists of 1024 thin-core processing elements (PE). The performance and power dissipation are demonstrated with different multimedia application algorithms such as hash, and fractional motion estimation (FME). The results show that the proposed architecture can provide high performance with less energy consumption using parallel computation.

     

Cypress: compression and encryption of data and code for embedded multimedia systems

Copyright protection of sensitive data plays a significant part in the design of multimedia systems. This article introduces a hardware platform that enables both compression and encryption for data and code in a unified architecture. Besides being parameterizable, the platform features software tools for evaluating and optimizing specific multimedia applications.     

A self-adaptation scheme for workflow management in multi-agent systems

Business processes, operational environment, variability of resources and user needs may change from time to time. An effective workflow management software system must be able to accommodate these changes. The ability to dynamically adapt to changes is a key success factor for workflow management systems. Holonic multi-agent systems (HMS) provide a flexible and reconfigurable architecture to accommodate changes based on dynamic organization and collaboration of autonomous agents. Although HMS provides a potential architecture to accommodate changes, the dynamic organization formed in HMS poses a challenge in the development of a new software development methodology to dynamically compose the services and adapt to changes as needed. This motivates us to study and propose a methodology to design self-adaptive software systems based on the HMS architecture. In this paper, we formulate a workflow adaptation problem (WAP) and propose an interaction mechanism based on contract net protocol (CNP) to find a solution to WAP to compose the services based on HMS. The interaction mechanism relies on a service publication and discovery scheme to find a set of task agents and a set of actor agents to compose the required services in HMS. We propose a viable self-adaptation scheme to reconfigure the agents and the composed services based on cooperation of agents in HMS to accommodate the changes in workflow and capabilities of actors. We propose architecture for our design methodology and present an application scenario to illustrate our idea.     

Bio-inspired multi-agent systems for reconfigurable manufacturing systems

The current market's demand for customization and responsiveness is a major challenge for producing intelligent, adaptive manufacturing systems. The Multi-Agent System (MAS) paradigm offers an alternative way to design this kind of system based on decentralized control using distributed, autonomous agents, thus replacing the traditional centralized control approach. The MAS solutions provide modularity, flexibility and robustness, thus addressing the responsiveness property, but usually do not consider true adaptation and re-configuration. Understanding how, in nature, complex things are performed in a simple and effective way allows us to mimic nature's insights and develop powerful adaptive systems that able to evolve, thus dealing with the current challenges imposed on manufacturing systems. The paper provides an overview of some of the principles found in nature and biology and analyses the effectiveness of bio-inspired methods, which are used to enhance multi-agent systems to solve complex engineering problems, especially in the manufacturing field. An industrial automation case study is used to illustrate a bio-inspired method based on potential fields to dynamically route pallets.     

Optimization methodology of dynamic data structures based on genetic algorithms for multimedia embedded systems

Modern multimedia application exhibit high resource utilization. In order to efficiently run this kind of applications in embedded systems, the dynamic memory subsystem needs to be optimized. A key role in this optimization is played by the dynamic data structures that reside in every real-life application. This paper presents a novel and automated way to optimize dynamic data structures. The search space is pruned using genetic algorithms that converge to the best multilayered data structure implementation for the targeted applications.     

Continuity aspects of embedded reconfigurable computing

In embedded systems, dynamically reconfigurable computing can be partially modified at runtime without stopping the operation of the whole system. In this paper, we consider a reorganization mechanism for dynamically reconfigurable computing in embedded systems to guarantee that invariants of the design are respected. This reorganization is considered as a visual transformation of the logical configuration by the formulated rules. The invariant is recognized under the restructuring of the configuration using reconfiguration rules.     

Customized kernel execution on reconfigurable hardware for embedded applications

To conserve space and power as well as to harness high performance in embedded systems, high utilization of the hardware is required. This can be facilitated through dynamic adaptation of the silicon resources in reconfigurable systems in order to realize various customized kernels as execution proceeds. Fortunately, the encountered reconfiguration overheads can be estimated. Therefore, if the scheduling of time-consuming kernels considers also the reconfiguration overheads, an overall performance gain can be obtained. We present our policy, experiments, and performance results of customizing and reconfiguring Field-Programmable Gate Arrays (FPGAs) for embedded kernels. Experiments involving EEMBC (EDN Embedded Microprocessor Benchmarking Consortium) and MiBench embedded benchmark kernels show high performance using our main policy, when considering reconfiguration overheads. Our policy reduces the required reconfigurations by more than 50% as compared to brute-force solutions, and performs within 25% of the ideal execution time while conserving 60% of the FPGA resources. Alternative strategies to reduce the reconfiguration overhead are also presented and evaluated.     

新型嵌入式多媒体系统架构

为了解决传统嵌入式多媒体系统架构设计中耦合度高的问题,提出了前台-中间件-后台的新型设计架构,将Qt/Embedded作为前后台的中间桥梁,使系统具有低耦合高内聚的特性。同时,采用HTML作为前台设计语言,提高了开发效率。     

Scalability planning for reconfigurable manufacturing systems

Scalability is a key characteristic of reconfigurable manufacturing systems, which allows system throughput capacity to be rapidly and cost-effectively adjusted to abrupt changes in market demand. This paper presents a scalability planning methodology for reconfigurable manufacturing systems that can incrementally scale the system capacity by reconfiguring an existing system. An optimization algorithm based on Genetic Algorithm is developed to determine the most economical way to reconfigure an existing system. Adding or removing machines to match the new throughput requirements and concurrently rebalancing the system for each configuration, accomplishes the system reconfiguration. The proposed approach is validated through a case study of a CNC-based automotive cylinder head machining system.