Changing technology-banish the 741! [op amp]

Pick up a current electronics text and you're likely to find the 741 op amp not only used, but also showcased. It's the op amp of choice for lab experiments, treatment of innards, etc. This is truly amazing when you consider that the 741 is nearly 30 years old! Of course op amps should be presented they can be used to implement a remarkable range of circuit functions. An inexpensive op amp can give near-ideal performance in certain practical applications. Getting something to work is infectious-the first op amps gave a whole generation the opportunity to build analog functions that really worked. But, like all technologies, op amp development never ceased; there have been some serious developments over the last 30 years!     

Impedance boosting techniques based on BiCMOS technology

An impedance enhancement technique, based on a combination of bipolar and MOS devices, is presented. The technique uses negative active feedback action to boost the impedance level of a cascode circuit. This technique improves the gain of the conventional folded-cascode BiCMOS amplifier by the loop gain of the feedback loop. The BiCMOS-based impedance boosting circuit, compared to the CMOS version, offers the advantage of higher bandwidth together with higher output current capability. The SPICE simulations of a folded-cascode op amp based on this technique show that a 120 dB DC gain can be achieved. Application of the technique to a transducer resulted in a total harmonic distortion as low as 0.02% with 2 V_p-p input signals and an improvement of more than 10 dB in linearity, with respect to the case where no feedback was used     

A high-performance full-wave rectifier circuit

A new circuit that enables basic operational amplifiers (op amps) such as the LM741 to produce precise full-wave rectification for frequencies up to and exceeding 100 kHz without waveform distortion is presented. The circuit is based on a standard op amp precise rectifier that is modified by the inclusion of a current conveyor to improve the rectifying process.     

Current mode instrumentation amplifier with rail-to-rail input and output

This paper presents the results from an investigation on the implementation of Current Mode Instrumentation Amplifiers (CMIAs) with rail-to-rail operational amplifiers (op amp) with a gm control circuit. The objective of employing rail-to-rail op amps in the implementation of a CMIA is the improvement of the common-mode operation range. The enhancement of the input common mode range (ICMR) is obtained using op amps with a rail-to-rail input stage followed by a cascode-based output stage. A prototype of the CMIA was implemented in standard 0.6 μm XFAB CMOS technology. Test results showed that the CMIA common mode range was extended but with moderated CMRR. To minimize this issue the amplifier was re-designed and sent to fabrication. Simulations with the components variations included were performed and showed the enhancement of the CMRR can be expected.     

Simple technique for op amp continuous-time 1 V supply operation

A simple scheme for achieving continuous-time low-voltage operation of op amps is discussed. The scheme involves placing a floating battery in series with one of the op amp input terminals. Simulations and experimental results are presented that verify the proposed scheme with the example of a CMOS op amp that operates from a single 1 V supply and with 0.8 V signal swing     

Implementation of Chua's chaotic circuit using current feedbackop-amps

The authors present a new, current feedback op-amp-based, implementation of Chua's chaotic circuit. The workability of the proposed implementation has been experimentally verified using AD844 type current feedback op amps. This implementation offers several advantages over an earlier one based upon traditional voltage-mode op-amps     

Macromodeling of integrated circuit operational amplifiers

A macromodel has been developed for integrated circuit (IC) op amps which provides an excellent pin-for-pin representation. The model elements are those which are common to most circuit simulators. The macromodel is a factor of more than six times less complex than the original circuit, and provides simulated circuit responses that have run times which are an order of magnitude faster and less costly in comparison to modeling the op amp at the electronic device level. Expressions for the values of the elements of the macromodel are developed starting from values of typical response characteristics of the op amp. Examples are given for three representative op amps. In addition, the performance of the macromodel in linear and nonlinear systems is presented. For comparison, the simulated circuit performance when modeling at the device level is also demonstrated.     

A high precision micropower operational amplifier

An operational amplifier configuration implemented as a true micropower high precision op amp is described. It includes a well controlled and predictable DC biasing network that is insensitive to variations in temperature, supply voltages, and process. Also, it permits single supply operation. Excellent DC precision characteristics, comparable to or better than the very best precision op amps currently available, are realized yet at micropower levels. By simply increasing the biasing currents, a version of this design operates in general purpose applications without any degradation in its high precision characteristics. Thus, the AC performance levels of general purpose op amps are attained at a fraction of supply current. This device is fabricated using a standard bipolar IC process; an ion-implanted JFET is added to simplify biasing.     

A high-swing 2-V CMOS operational amplifier with replica-amp gainenhancement

A general gain-enhancement technique for operational amplifiers using a replica amplifier is described. Unlike conventional techniques such as cascoding, which increases the gain by increasing the output resistance, the replica-amp technique increase the gain by matching the main and the replica amps. Among the advantages of the replica-amp technique are low supply, high swing, and effectiveness with resistive loads. This technique has been demonstrated in a 1.2-μm CMOS two-stage op amp. Operating from ±1-V supplies, the op amp has an effective open-loop dc gain of greater than 10 000, while maintaining a high swing of 100 mV from either supply rails. The gain-enhancement circuit is shown to have only a small effect on the settling time experimentally, analytically, and in SPICE simulation     

Error feedback based noise shaping in a double sampled ADC

A first order error feedback based noise shaping ADC, that obviates the need for high-gain and high output-swing op amps and fast-settling, power-hungry, and noisy reference buffers is proposed. Using a single stage op amp with a gain of 70 (i.e. 37 dB) and output swing of ±75 mV, this topology, realized in GPDK 90-nm CMOS technology, achieves an SNDR of 63 dB operating at 1 GHz (effective sample rate of 2 GHz due to double sampling) with an OSR of 32.     

Design for testability of embedded integrated operationalamplifiers

The operational amplifier (op amp) is one of the most encountered analog building blocks. In this paper, the problem of testing an integrated op amp is treated. A new low-cost vectorless test solution, known as oscillation test, is investigated to test the op amp. During the test mode, the op amps are converted to a circuit that oscillates and the oscillation frequency is evaluated to monitor faults. The tolerance band of the oscillation frequency is determined using a Monte Carlo analysis taking into account the nominal tolerance of all important technology and design parameters. Faults in the op amps under test which cause the oscillation frequency to exit the tolerance band can therefore be detected. Some Design for Testability (DfT) rules to rearrange op amps to form oscillators are presented and the related practical problems and limitations are discussed. The oscillation frequency can be easily and precisely evaluated using pure digital circuitry. The simulation and practical implementation results confirm that the presented techniques ensure a high fault coverage with a low area overhead     

A Novel Method for Bandwidth and Phase Margin Enhancement of Folded-Cascode Amplifier

This article describes a method to enhance bandwidth and phase margin of conventional folded-cascode op amps. It achieves a larger bandwidth and/or phase margin in folded-cascode CMOS op amps than those of a conventional one in a given CMOS process. For the same bandwidth the new method allows a larger phase margin, and for a given phase margin a larger bandwidth can be obtained. Also, for equal bandwidth, power consumption of the new folded-cascode is lower than the traditional one with similar load.     

A new nonlinear time-domain op-amp macromodel using thresholdfunctions and digitally controlled network elements

A general-purpose nonlinear macromodel for the time-domain simulation of integrated circuit operational amplifiers (op amps), either bipolar or MOS, is presented. Three main differences exist between the macromodel and those previously reported in the literature for the time domain. First, all the op-amp nonlinearities are simulated using threshold elements and digital components, thus making them well suited for a mixed electrical/logical simulator. Secondly, the macromodel exhibits a superior performance in those cases where the op amp is driven by a large signal. Finally, the macromodel is advantageous in terms of CPU time. Several examples are included illustrating all of these advantages. The main application of this macromodel is for the accurate simulation of the analog part of a combined analog/digital integrated circuit     

High performance op amps in a 40V BiCMOS process and their applications

This paper describes the design of three high-performance op amps in a 40V BiCMOS technology. The first circuit is a low-noise op amp with MOS inputs. A thermal noise level as low as with a 1/f noise corner frequency of 100 Hz is achieved. For applications that can tolerate a lower input impedance, a more economical bipolar input low-noise op amp has been designed, yielding an even better noise performance for source impedances up to 20 k. The third circuit is an internally compensated high-gain-bandwidth (GBW=15 MHz) op amp that can drive loads from 0 to 20 pF. A fourth-order low-pass switched-capacitor filter making use of the latter op amp is discussed next. Finally the applications of this 40V BiCMOS process are illustrated.     

共源共栅CMOS运算放大器的分析与设计

本文描述了一个共源共栅差分输入级、电流镜偏置输出级结构的两级CMOS运放,它对常规运放的电源电压抑制比、增益、输出驱动能力、噪声、失调等有显著的改善。文中对运放的工作原理及设计技术等进行了详细的叙述,并采用标准CMOS工艺进行了投片试制和采用SPICE进行了电路模拟。结果令人满意,达到了设计指标,证明了设计理论的正确性。该运放已成功地应用于开关电容滤波器芯片的制造。     

Compact High Gain CMOS Op Amp Design using Comparators

This paper discusses the design of high gain, general purpose op amps. The op amp is based on a novel cascaded design using comparators and with structural simplicity approaching that of digital circuits. Ideally, the design tool presented here can be used to optimize gain and CMRR independent of the other op amp performance parameters. The designed op amp has 140 dB open-loop gain and 43 MHz unity gain frequency (GBW) in Berkeley Spice3f Level-2 simulation. The circuit is implemented using a 2.0 m nwell CMOS process through MOSIS. The op amp is self-biased and requires only power supplies of ±2.5 V. It occupies an area of 113 m×474 m.     

A multiplexed switched capacitor filter bank

A technique is introduced which allows several integrator capacitors to be multiplexed onto a single operational amplifier. As a result, the op amp can be shared by several switched capacitor filter channels, drastically reducing the number of op amps required for filter banks. Twenty second-order filters have been implemented in a circuit using only two op amps and 2.5 mm/SUP 2/. The design of this system is presented and its performance is discussed. Some loss of signal energy is shown to occur during the multiplexing operations, which reduces filter Q. Causes of this charge loss are described, and its effects on performance are modeled. The design of the op amp used is presented, which incorporates a new system of input stage biasing and differential to single-ended conversion, as well as other features.     

The design of fully differential CMOS operational amplifiers without extra common-mode feedback circuits

A new fully differential CMOS operational amplifier (op amp) without extra common-mode feedback (CMFB) circuit is proposed and analyzed. In this op amp, simple inversely connected current-mirror pairs are used as active loads. From the theoretical analysis, it is shown that the common-mode signal can be efficiently suppressed by the reduced effective common-mode resistance of the active load. The proposed op amp with 2 pF capacitance loadings has an open-loop unity-gain bandwidth of 63 MHz, a phase margin 47°, and a dc gain of 67 dB in 3.5µm p-well CMOS technology. The common-mode gain at a single output node can be as low as —38 dB without extra CMFB circuit. Experimental results have successfully confirmed the capability of the efficient common-mode rejection.This work was supported by the United Microelectronics Corporation (UMC), Republic of China, under Grant C80054.     

一种折叠共源共栅运算放大器的设计

折叠共源共栅运放结构的运算放大器可以使设计者优化二阶性能指标,这一点在传统的两级运算放大器中是不可能的。特别是共源共栅技术对提高增益、增加PSRR值和在输出端允许自补偿是有很用的。这种灵活性允许在CMOS工艺中发展高性能无缓冲运算放大器。目前,这样的放大器已被广泛用于无线电通信的集成电路中。介绍了一种折叠共源共栅的运算放大器,采用TSMC 0.18混合信号双阱CMOS工艺库,用HSpice W 2005.03进行设计仿真,最后与设计指标进行比较。     

CMOS宽带互阻放大电路

介绍了用ＣＭＯＳ电流反馈放大器构成互阻放大器的基本原理。该互阻放大器具有宽频带、高增益、低功耗的特点,实用于Ｉ－Ｖ转换。文中给出设计指导思想,并给出模拟结果。