非晶硅薄膜晶体管室温红外探测器的优化设计

介绍了基于非晶硅薄膜晶体管的室温红外探测器的基本特征及性能指标,对晶体管宽长比对探测器性能的影响进行了理论分析,分析表明,提高晶体管的宽长比可以改善探测器的探测率。为了克服传统微桥结构室温红外探测器成品率低的不足,提出了一种新的热绝缘材料,并将该材料应用到了非制冷红外探测器中,实际制备了探测器单元,对该材料的热绝缘能力进行了验证。     

非晶硅薄膜晶体管室温红外探测器的优化设计

介绍了基于非晶硅薄膜晶体管的室温红外探测器的基本特征及性能指标,对晶体管宽长比对探测器性能的影响进行了理论分析,分析表明,提高晶体管的宽长比可以改善探测器的探测率.为了克服传统微桥结构室温红外探测器成品率低的不足,提出了一种新的热绝缘材料,并将该材料应用到了非制冷红外探测器中,实际制备了探测器单元,对该材料的热绝缘能力进行了验证.     

非晶硅薄膜晶体管室温红外探测器的优化设计

介绍了基于非晶硅薄膜晶体管的室温红外探测器的基本特征及性能指标，对晶体管宽长比对探测器性能的影响进行了理论分析，分析表明，提高晶体管的宽长比可以改善探测器的探测率。为了克服传统微桥结构室温红外探测器成品率低的不足，提出了一种新的热绝缘材料，并将该材料应用到了非制冷红外探测器中，实际制备了探测器单元，对该材料的热绝缘能力进行了验证。     

用于红外探测的非晶硅薄膜晶体管

非晶硅薄膜晶体管由于其较高的沟道电流温度系数而被用于非致冷型红外探测器.在工艺参数仿真的基础上成功地研制了离子注入型背栅非晶薄膜晶体管,并得到了典型的输出特性.制作出的晶体管具有较高的沟道电流温度变化系数,而且制作过程简单,并能与常规IC工艺兼容,制作温度不超过300 ℃.     

新型SiO2栅介质非晶硅薄膜晶体管室温红外探测器

对用作室温红外探测敏感单元的非晶硅薄膜晶体管进行了研究,提出了一种新型SiO2栅介质非晶硅薄膜晶体管室温红外探测器。该探测器的基本工作机理与传统的SiN2栅介质薄膜晶体管相类似,但在器件性能方面不仅具有较高的响应度,而且具有更好的温度稳定性;在制作工艺方面具有更高的工艺重复性和栅介质淀积的均匀性。     

新型SiO2栅介质非晶硅薄膜晶体管室温红外探测器

对用作室温红外探测敏感单元的非晶硅薄膜晶体管进行了研究，提出了一种新型SiO2栅介质非晶硅薄膜晶体管室温红外探测器。该探测器的基本工作机理与传统的SiNx栅介质薄膜晶体管相类似，但在器件性能方面不仅具有较高的响应度，而且具有更好的温度稳定性；在制作工艺方面具有更高的工艺重复性和栅介质淀积的均匀性。     

不同沟道宽长比有机薄膜晶体管性能的研究

以酞菁铜为有源层,二氧化硅为绝缘层,钛/金作为电极,制作了三种不同沟道宽长比的有机薄膜晶体管器件。通过对这三种器件的电学特性进行对比,分析了不同沟道宽长比对器件电学性能的影响。结果表明,沟道宽长比对器件的迁移率影响很小,阈值电压随着宽长比的增大而减小,漏电流随沟道宽长比的增大而增大;当源漏极间电压在一定范围内时,开态电流也随沟道宽长比的增大而增大。     

像素设计中沟道宽和长的选择

讨论了沟道宽(W)和长(L)对薄膜晶体管的开态电流(I_(on)),关态电流(I_(off))、开口率以及跳变电压(△V_p)的影响。     

氧化物半导体薄膜晶体管的研究进展

简要说明了非晶硅、多晶硅和有机半导体用作薄膜晶体管沟道层的不足,从电学性质、光学性质和制备温度等几方面介绍了氧化物薄膜晶体管在有源阵列驱动显示技术中的优势,并介绍了氧化物沟道层制备工艺的优化和掺杂方法.最后,展望了氧化物半导体薄膜晶体管应用前景.     

金属—非晶硅锗合金肖特基势垒在玻璃基底红外光电子集成电路中的应用

近年来,有许多利用非晶硅锗合金(a-Si_(l-x)Ge_x·H)作为长波长光探测器材料的研究报导.p-i-n结构的a-SiGe∶H二极管已成功地用于检测红外光.这表明采用非晶硅薄膜晶体管工艺,有可能在玻璃基底上制作红外光电子集成电路.在我们对非晶硅光传感器的研究中,肖特基势垒二极管的性能优于p-i-n结构,它快速响应、制造简单、可靠性高。这促使我们开展对a-Si_(l-x)Ge_x∶H红外肖特基势垒探测器的研究.     

Thermal Behavior of Amorphous Silicon Thin Film Transistor and Its Application to Micromachined Uncooled Infrared Sensors

This work reports a new uncooled infrared sensor based on amorphous silicon thin film transistors (a-Si TFTs). The temperature coefficient of channel current (TCC) of the a-Si TFT is given. Analysis shows that the a-Si TFT working in the saturation region is preferred for the sensitive element with a TCC value of 3.8-6.0 %/K. The a-Si TFT is placed on a suspended microbridge to reduce the thermal conductance by using micro-electro-mechanical system (MEMS) technology. The a-Si TFT-based IR sensor with a monolithic architecture is fabricated. Preliminary experimental results show that a responsivity of 40.8 kV/W, a thermal response time of 5.5 ms and a NETD of 90 mK are achieved.     

不同双栅极设计对a-Si:H TFT特性影响

本实验于原有的单底栅a-Si TFT产品结构下,通过增加不同的顶栅极设计方式(不同a-Si覆盖比例、不同沟道几何形貌、不同沟道W/L比例)来研究双栅极设计对a-Si TFT特性的影响。实验结果显示双栅极a-Si TFT比现行单底栅a-Si TFT可以提升I_on 7%、降低SS 3%、同时对I_off以及TFT稳定性影响不明显,显示双栅极a-Si TFT设计结构具有在不提高成本以及不变更工艺流程下,达到整体提升TFT特性的效果。顶栅极 TFT 特性不如底栅极,推测为a-Si/PVX界面不佳使得电子导通困难导致,未来可以借由改善a-Si/PVX界面工艺提升顶栅极TFT特性。     

Predicting Method of Leakage Current in Multiple-Gate Amorphous Silicon TFTs for Active-Matrix Electrophoretic Displays

The large off-state drain–source leakage current of the thin-film transistor (TFT) in active-matrix electrophoretic display (AMEPD) may cause severe crosstalk and long pixel refresh time. Multiple-gate amorphous silicon TFT (a-Si TFT) is a common use to overcome this issue. In this paper, we show that the leakage current of multiple-gate a-Si TFT can be computed from the $I$–$V$ characteristics of a single TFT by an analytical current model. The predicted leakage currents show good agreement with the expected values in SPICE simulation. This model is also applicable for the multiple-gate a-Si TFTs used in other high voltage driven devices.      

Fabrication of Poly—Si TFT by Al—induced Lateral Crystallization at Low Temperature

Using a new low-temperature process (<600 ℃), the poly-Si TFT was fabricated by metal-induced lateral crystallization (MILC). An ultrathin aluminum layer was deposited on a-Si film and selectively formed by photolithography. The films were then annealed at 560 ℃ to obtain laterally crystallized poly-Si film, which is used as the channel area of a TFT. The poly-Si TFT showed an on/off current ratio of higher than 1×10 6 at a drain voltage of 5 V. The electrical properties are much better than TFT fabricated by conventional crystallization at 600 ℃.     

Dynamic characterization of a-Si TFT-LCD pixels

A dynamic analysis of an amorphous silicon (a-Si) Thin-Film-Transistor-Liquid-Crystal-Display (TFT-LCD) pixel is presented using new a-Si TFT model and new Liquid Crystal (LC) capacitance models for SPICE simulators. This analysis is useful to all Active Matrix LCD designers for evaluating and predicting the performance of LCD's. The a-Si TFT model is developed to simulate important a-Si TFT characteristics such as off-leakage current, threshold voltage shift due to voltage stress and temperature, localized states behavior, and bias- and frequency-dependent gate to-source and gate-to-drain capacitance. In addition, the LC Capacitance model is developed using simplified empirical equations. The modeling procedure is useful to TFT and LCD designers who need to develop their own models. Since our experiments simulate critical TFT-LCD transient effects such as the voltage drop due to gate-to-source capacitance and dynamic off-leakage current, it is possible to accurately characterize TFT-LCD's in the time domain. The analysis and models are applicable to today's optical characterizations of Flat-Panel-Displays (FPD's)     

A polycrystalline silicon thin-film transistor with a thinamorphous buffer

We have developed a novel, low off-state leakage current polycrystalline silicon (poly-Si) thin-film transistor (TFT) by introducing a very thin hydrogenated amorphous silicon (a-Si:H) buffer on the poly-Si active layer. The a-Si:H buffer is formed on the whole poly-Si and thus no additional mask step is needed. With an a-Si:H buffer on poly-Si, the off-state leakage current of a coplanar TFT is remarkably reduced, while the reduction of the on-state current is relatively small. The poly-Si TFT with an a-Si:H buffer exhibited a field effect mobility of 12 cm²/Vs and an off-state leakage current of 3 fA/μm at the drain voltage of 1 V and the gate voltage of -5 V     

a—Si：H TFT自对准工艺的研究

实验研究了自对准结构的ａ－Ｓｉ：Ｈ ＴＦＴ的制备工艺，对其中关键的底部曝光和顶胶工艺进行了详细的研究和分析，对制备工艺和结构参数进行了合理的优化，成功地制备出自对准结构的ａ－Ｓｉ：Ｈ ＴＦＴ。对影响自对准结构ａ－Ｓｉ：Ｈ ＴＦＴ特性的主要因素进行了详细的分析，提出了一种新颖的双有源层结构的ａ－Ｓｉ：Ｈ ＴＦＴ，可以有效地改善ａ－Ｓｉ：Ｈ ＴＦＴ的开态特性，其通断电流比ＩＯＮ／ＩＯＦＦ〉１０＾５。     

A novel a-Si:H AMOLED pixel circuit based on short-term stress stability of a-Si:H TFTs

This letter presents a novel pixel circuit for hydrogenated amorphous silicon (a-Si:H) active matrix organic light-emitting diode displays employing the short-term stress stability characteristics of a-Si:H thin film transistors (TFTs). The pixel circuit uses a programming TFT that is under stress during the programming cycle and unstressed during the drive cycle. The threshold voltage shift (V/sub T/-shift) of the TFT under these conditions is negligible. The programming TFT in turn regulates the current of the drive TFT, and the pixel current therefore becomes independent of the threshold voltage of the drive TFT.