A low-phase-noise 5-GHz CMOS quadrature VCO using superharmonic coupling

A new concept for quadrature coupling of LC oscillators is introduced and demonstrated on a 5-GHz CMOS voltage-controlled oscillator (VCO). It uses the second harmonic of the outputs to couple the oscillators. The technique provides quadrature over a wide tuning range without introducing any increase in phase noise or power consumption. The VCO is tunable between 4.57 and 5.21 GHz and has a phase noise lower than -124 dBc/Hz at 1-MHz offset over the entire tuning range. The worst-case measured image rejection is 33 dB. The circuit draws 8.75 mA from a 2.5-V supply.     

A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiralinductors

A completely integrated 1.8-GHz low-phase-noise voltage-controlled oscillator (VCO) has been realized in a standard silicon digital CMOS process. The design relies heavily on the integrated spiral inductors which have been realized with only two metal layers and without etching. The effects of high-frequency magnetic fields and losses in the heavily doped substrate have been simulated and modeled with finite-element analysis. The achieved phase noise is as low as -116 dBc/Hz at an offset frequency of 600 kHz, at a power consumption of only 6 mW. The VCO is tuned with standard available junction capacitances, resulting in a 250-MHz tuning range     

A compact and low-phase-noise Ka-band pHEMT-based VCO

A low phase-noise Ka-band monolithic voltage-controlled oscillator (VCO) designed using the negative resistance concept is reported. A circuit fabricated using the three-dimensional monolithic microwave integrated circuit technology exhibits a high integration level; its size is a record at just 0.5 mm/sup 2/. On-wafer measurements demonstrate a low phase noise of -102 dBc/Hz at a 1-MHz offset. The VCO delivers an output power of 11.8 dBm at the center frequency of 28.3 GHz. The frequency tuning range is more than 3.8 GHz. Dependence of the circuit performance on the bias conditions is also reported and suggests that an optimum phase-noise characteristic can be achieved when biasing the transistor to optimize its transconductance and noise figure.     

A low-power low-phase-noise LC VCO with MEMS Cu inductors

A 2-3 GHz CMOS inductance-capacitance (LC) voltage-controlled oscillator (VCO) integrated with high-Q micro-electromechanical systems (MEMS) Cu inductors is reported. While dissipating only 6.3 mW, a phase noise of -121 dBc/Hz at 600 kHz offset from 2.78 GHz carrier is achieved. This MEMS VCO has the largest power-frequency normalized figure-of-merit (12.5 dB) among the Si bipolar and CMOS LC VCOs.     

A 1.57-GHz fully integrated very low-phase-noise quadrature VCO

A very low-phase-noise quadrature voltage-controlled oscillator is presented, featuring an inherently better figure of merit than existing architectures. Through an improved circuit schematic and a special layout technique, the phase noise of the circuit can be lowered. The circuit draws 15 mA from a 2-V supply. The phase noise is -133.5 dBc/Hz at 600 kHz and the tuning range is 24% wide at a center frequency of 1.57 GHz     

切换式调谐CMOS 压控振荡器

在现有的CMOS RF工艺条件下。利用“切换式调谐”设计思想完成了宽带调谐的压控振荡器(vco)的电路设计和版图设计。用Candence SpectreRF软件进行了模拟。结果表明。该VCO在保证其它性能指标的同时，实现了宽的频率覆盖。     

A K-band InGaP/GaAs HBT balanced MMIC VCO

A fully integrated K-band balanced voltage controlled oscillator (VCO) is presented. The VCO is realized using a commercially available InGaP/GaAs heterojunction bipolar transistor (HBT) technology with an f/sub T/ of 60 GHz and an f/sub MAX/ of 110 GHz. To generate negative resistance at mm-wave frequencies, common base inductive feedback topology is used. The VCO provides an oscillation frequency from 21.90 GHz to 22.33 GHz. The frequency tuning range is about 430 MHz. The peak output power is -0.3 dBm. The phase noise is -108.2 dBc/Hz at 1 MHz offset at an operating frequency of 22.33 GHz. The chip area is 0.84/spl times/1.00 mm/sup 2/.     

A 5-GHz fully integrated full PMOS low-phase-noise LC VCO

A 5-GHz fully integrated, full PMOS, low-phase-noise and low-power differential voltage-controlled oscillator (VCO) is presented. This circuit is implemented in a 0.35-/spl mu/m four-metal BiCMOS SiGe process. At 2.7-V power supply voltage and a total power dissipation of only 13.5 mW, the proposed VCO features a worst case phase noise of -97 dBc/Hz and -117 dBc/Hz at 100 kHz and 1 MHz frequency offset, respectively. The oscillator is tuned from 5.13 to 5.68 GHz with a tuning voltage varying from 0 to 2.7 V.     

A temperature stabilized CMOS VCO

The established method of frequency drift compensation in voltage controlled oscillators (VCOs) resulting from temperature variance involves modulation of control voltage using a non-linear voltage internally generated. An innovative frequency drift compensation scheme for a VCO, based on amplitude control, is described in this paper. Two peak detectors are used to generate voltages representing positive and negative peaks of the sinusoidal driving an error amplifier. The amplifier output controls the delivery of transconductance accessible to the oscillator, thereby keeping the oscillation amplitude steady. Frequency stability has improved to 16 ppm/°C from an uncompensated value of 189 ppm/°C and is applicable where frequency stability requirements are not stringent, such as HS-USB and S-ATA. The temperature stabilized VCO at 2.4 GHz center frequency is prototyped using CMOS technology from ams AG (formerly austriamicrosystems AG). The result obtained from this study indicates that better frequency stability may be achievable if the traditional compensation scheme is preceded by amplitude control.     

A 15-GHz monolithic low-phase-noise VCO using AlGaAs/GaAs HBTtechnology

A 15-GHz fully monolithic low-phase-noise VCO MMIC fabricated without an external tuning element using an AlGaAs/GaAs HBT technology was developed. An HBT and a variable capacitance diode or varactor were fabricated in an MMIC chip using-standard HBT IC process. A tuning range of about 600 MHz was obtained with varying control voltage from 0 to 4 V with an output power of more than -4 dBm. The low phase noise for an offset frequency of 100 kHz of -85 dBc/Hz was measured at a frequency of 15.6 GHz     

A low-phase-noise and low-power multiband CMOS voltage-controlled oscillator

A low voltage multiband all-pMOS VCO was fabricated in a 0.18-/spl mu/m CMOS process. By using a combination of inductor and capacitor switching, four band (2.4, 2.5, 4.7, and 5 GHz) operation was realized using a single VCO. The VCO with an 1-V power supply has phase noises at 1-MHz offset from a 4.7-GHz carrier of -126 dBc/Hz and -134 dBc/Hz from a 2.4-GHz carrier. The VCO consumes 4.6 mW at 2.4 and 2.5 GHz, and 6 mW at 4.7 and 5 GHz, respectively. At 4.7 GHz, the VCO also achieves -80 dBc/Hz phase noise at 10-kHz offset with 2 mW power consumption.     

A 1.8-GHz CMOS low-phase-noise voltage-controlled oscillator withprescaler

The implementation of the two high-frequency building blocks for a low-phase-noise 1.8-GHz frequency-synthesizing PLL in a standard 0.7-μm CMOS process is discussed. The VCO uses on-chip bondwires, instead of spiral inductors, for low noise and low power. The design of these bondwire inductors is discussed in great detail. A general formula for the theoretical limit of the phase noise of LC-tuned oscillators is presented. The design of a special LC-tank allows a trade-off between noise and power. The realized VCO has a phase noise of -115 dBc/Hz at 200 kHz from the 1.8-GHz carrier and consumes 8 mA from a 3-V supply. The prescaler has a fixed division ratio of 128 and uses an enhanced ECL-alike high-frequency D-flipflop. Its power consumption is 28 mW     

输入输出调谐的低相位噪声CMOS压控振荡器

设计了一个输入输出双调谐的CMOS压控振荡器(VCO),与传统的互补型交叉耦合对结构相比,该VCO谐振回路的有载品质因数得到提高,从而降低了相位噪声.采用CSM 0.25μm RF CMOS工艺设计,使用Cadence SpectreRF工具进行了仿真.仿真结果表明在2.5V的电源电压下,调谐范围为2.24～2.58GHz,达到了14.2%,相位噪声为-128dBc/Hz@1MHz,功耗为15mw.     

A low-phase-noise 900-MHz CMOS ring oscillator with quadrature output

A 900-MHz two-stage CMOS voltage controlled ring oscillator (VCRO) with quadrature output is presented. The circuit is designed in a 0.18-um CMOS technology and operated on a 1.8-V supply voltage. The VCRO have a tuning range of 730 MHz to 1.43 GHz and good tuning linearity. Between 0 V and 1.1 V of control voltage, the gain of VCRO is around −620 MHz/V. At 900 MHz, the phase noise of the VCRO is −106.1 dBc/Hz at 600-KHz frequency offset with power consumption of 65.5 mW.     

一种VHF波段CMOS压控振荡器的设计

文章设计了一款工作于VHF波段的集成LC压控振荡器.利用MENTOR公司的IC设计软件一一Eldo RF和Chartered公司的0.35μm工艺库对压控振荡器性能进行了仿真和优化,最终达到频率范围为65WHz-298MHz,最低相位噪声为-95.25789dBc@10KHz的优良性能,功耗仅为7.06mW.     

A 2.4 GHz high-linearity low-phase-noise CMOS LC-VCO based on capacitance compensation

A 2.4 GHz high-linearity low-phase-noise cross-coupled CMOS LC voltage-controlled oscillator(VCO) is implemented in standard 0.18-μm CMOS technology.An equalization structure for tuning sensitivity base on the three-stage distributed biased switched-varactor bank and the differential switched-capacitor bank is adopted to reduce the variations of the VCO gain,achieve high linearity,and optimize the phase-noise performance.Compared to the conventional VCO,the proposed VCO has more constant gain over the en...     

A CMOS self-regulating VCO with low supply sensitivity

This paper presents a self-regulating voltage-controlled oscillator (VCO) with low supply sensitivity. With an adaptive delay cell, the self-regulating VCO achieves a low supply sensitivity of 0.15%-delay/1%-supply or less. This delay cell has a built-in compensation circuit that senses and corrects the delay variation caused by supply fluctuation. The proposed scheme rejects device noise as well and hence achieves a low phase noise of -101.4 dBc/Hz at 600-kHz offset when it runs at 900 MHz. The prototype phase-locked loop with the VCO fabricated in 0.35-/spl mu/m CMOS process shows a cycle-to-cycle rms jitter of 2.1 ps at 450 MHz (VCO at 900 MHz) under quiet supply condition.     

一个6GHz宽带低相位噪声CMOS LC VCO

用SMIC 0.13 μm CMOS工艺实现了一个低相位噪声的6 GHz压控振荡器(VCO).在对其相位噪声分析的基础上,通过改进和优化传统的调谐单元和噪声滤波电路以及加入源极负反馈电阻实现了一个宽带、低增益、低相位噪声VCO.测试结果显示,在中心频率频偏1 MHz处的相位噪声为-119 dBc/Hz,频率调谐范围为6...     

4.2GHz 1.8V CMOS LC压控振荡器

基于Hajimiri提出的VCO相位噪声模型,分析了差分LC VCO电路参数对于相位噪声的影响。根据前面的分析,详细介绍了LC VCO电路的设计方法:包括高Q值片上电感的设计、变容MOS管的设计以及尾电流的选取。采用SMIC 0.18μm 1P6 M、n阱、混合信号CMOS工艺设计了一款4.2GHz 1.8V LC VCO。测试结果表明:当输出频率为4.239GHz时,频偏1MHz处的相位噪声为-101dBc/Hz,频率调节范围为240MHz。     

用于数字电视调谐器的宽带CMOS VCO设计

采用片外谐振网络和多VCO的结构设计了一个宽带CMOS VCO,并采用一种新型的电荷泵式自动幅度控制电路,确保了VCO在整个带宽内的可靠性。基于Chartered 0.25μm CMOS工艺的测试结果表明,该VCO的频率能够覆盖75~900 MHz,单边带相位噪声最佳值达到了-92 dBc/Hz@10 kHz。