Properties of the contact on ion cleaned n and p type silicon surfaces

Schottky contacts were produced by silver evaporation on Si(100) surfaces cleaned by ion sputtering and partial annealing. The samples work function were measured before and after metal deposition with the Kelvin method, in an experimental set-up which allowed a topografical study and direct comparison between n and p types. Clean surfaces with and without a residual layer of oxide was achieved and controlled by AES. It was found that the Fermi level of all the surfaces was pinned by donor states created by the bombardment and that there was no barrier on n type and an important surface barrier on p type. The diodes we obtained presented no barrier on n type and a rectifying contact on p type. So we deduced that the Schottky barrier is already fully formed before metal contact is achieved. Furthermore study of the electrical properties of the diodes had shown that the bombardment creates donor states responsible for the barrier and a perturbated layer with deep acceptor traps responsible for the current flow mechanism. A residual layer of oxide and a post annealing of the device did not noticeably change the Schottky barrier in the diodes achieved on p type but led to clearly differenciated performances for the diodes achieved on both p and n type substrate. So we therefore concluded that the characteristics of the deep acceptor traps of the superfacial layer are modified by the oxide and annealing, both of which on the other hand having no effect on the surface donor states.     

Effect of a Nanodimensional Polyethylenimine Layer on Current–Voltage Characteristics of Hybrid Structures Based on Single-Crystal Silicon

In this paper the study of the tunneling current–voltage (I–V) characteristics of silicon surfaces with n- and p-type conductivity as a function of roughness in the presence of an adsorbed insulating layer of polyethylenimine (PEI) is presented. A new approach is proposed for analysis of the tunnel current–voltage characteristics of a metal–insulator–semiconductor structure based on the combination of two models (Simmons and Schottky). Such joint analysis demonstrates the effect of surface states and evaluates changes in the band bending and electron affinity after the deposition of the polyelectrolyte layer on the semiconductor surface. As a result, we are able to differentiate between the equilibrium tunnel barrier (qφ ₀) and the barrier height (qφ _B). It is shown that the deposition of the polymer leads to an increase of the equilibrium tunnel barrier by more than 250 meV, irrespective of the roughness and the conductivity type of the silicon substrate. The PEI deposition also leads to changes in the barrier height (less than 25 meV) that are smaller than the equilibrium tunnel barrier changes, indicating pinning of the Fermi level by the electron surface states that are energetically close to it. These surface states can trap charge carriers, a process leading to the formation of a depletion region and band bending on the semiconductor surface. Moreover, the change in the barrier height qΔφ _B depends on the conductivity type of the semiconductor, being positive for n-type and negative for p-type, in contrast to qΔφ ₀, which is positive for all substrates. The change is explained by capture of electrons preferably from the semiconductor space-charge region in the presence of a cationic polyelectrolyte, e.g., PEI.     

Schottky barriers on atomically clean cleaved GaAs

We report here the first systematic study of the electronic properties of Al, Au, Ag and Cu Schottky barrier diodes on n-type GaAs. These diodes were formed on cleaved (110) surfaces in ultra-high vacuum (UHV) using similar conditions and evaporation rates during the initial stages of Schottky barrier formation as in the photoemission spectroscopy (PES) studies. Barrier height determinations using device measuring techniques (current-voltage (I–V), capacitive-voltage (C–-V) and internal photoemission) are compared with the results from the PES studies. Essentially identical barrier heights are found from PES and the electrical measurements for the noble metals. The barrier height of the noble metal: n-GaAs system (0.9 eV) is larger than any simple metal on n-type GaAs previously reported. This is examined in light of recent work by Zur, McGill and Smith [22] and a model is suggested to explain it. Results of this study are found to be consistent with the unified defect model which has hypothesized that the barrier height is established by the energy levels of structural defects formed at the surface during the metal deposition.     

Capacitance–conductance–current–voltage characteristics of atomic layer deposited Au/Ti/Al2O3/n-GaAs MIS structures

We have studied the admittance and current–voltage characteristics of the Au/Ti/Al₂O₃/n-GaAs structure. The Al₂O₃ layer of about 5 nm was formed on the n-GaAs by atomic layer deposition. The barrier height (BH) and ideality factor values of 1.18 eV and 2.45 were obtained from the forward-bias ln I vs V plot at 300 K. The BH value of 1.18 eV is larger than the values reported for conventional Ti/n-GaAs or Au/Ti/n-GaAs diodes. The barrier modification is very important in metal semiconductor devices. The use of an increased barrier diode as the gate can provide an adequate barrier height for FET operation while the decreased barrier diodes also show promise as small signal zero-bias rectifiers and microwave. The experimental capacitance and conductance characteristics were corrected by taking into account the device series resistance R_s. It has been seen that the non-correction characteristics cause a serious error in the extraction of the interfacial properties. Furthermore, the device behaved more capacitive at the reverse bias voltage range rather than the forward bias voltage range because the phase angle in the reverse bias has remained unchanged as 90° independent of the measurement frequency.     

Ta/Si Schottky diodes fabricated by magnetron sputtering technique

Electrical properties of Ta/n-Si and Ta/p-Si Schottky barrier diodes obtained by sputtering of tantalum (Ta) metal on semiconductors have been investigated. The characteristic parameters of these contacts like barrier height, ideality factor and series resistance have been calculated using current voltage (I-V) measurements. It has seen that the diodes have ideality factors more than unity and the sum of their barrier heights is 1.21 eV which is higher than the band gap of the silicon (1.12 eV). The results have been attributed the effects of inhomogeneities at the interface of the devices and native oxide layer. In addition, the barrier height values determined using capacitance-voltage (C-V) measurements have been compared the ones obtained from I-V measurements. It has seen that the interface states have strong effects on electrical properties of the diodes such as C-V and R_s-V measurements.     

Electrical characteristics of laser-contacted diodes

We have fabricated p⁺-n and Schottky diodes with contacts made of laser-formed palladium-silicide. The electrical characteristics of these diodes are presented. The reverse currents and breakdown voltages are comparable to conventionally contacted p⁺-n diodes. The barrier height of laser-formed Schottky diodes agrees well with published values for Pd₂Si. The promising results point out the potential applications of contact formation by laser irradiation in device manufacture.     

Effect of non-uniformly doped surface layer on the barrier height of a Schottky contact

The presence of a highly doped p-type surface layer at the interface of a metal n-type semiconductor Schottky contact increases the barrier height. An analysis of such an increase in barrier height is given for different impurity distributions in the surface layer. It has been shown that of the three distributions considered, namely exponential, Gaussian and erfc, the increase of barrier height (Δφ_B) is a maximum for the Gaussian and minimum for the exponential distribution. It is found that the increase of barrier height results in degradation of the diode ideality factor n, which can be minimised when Δφ_B is obtained by changing the doping concentration of the surface layer and keeping the thickness to a minimum.     

Experimental results on transient space charge limited currents in p-n junctions

This paper shows the first experimental evidence of transient space charge limited currents in totally depleted surface barrier p-n junctions. For this experiment surface barrier diodes excited by electrons bursts supplied by a pulsed accelerator were used.     

Electron bombardment effect on the reverse I–V characteristics and tensosensibility of p+-nGaAs diodes

The effect of ≈2 MeV electron bombardment on the reverse characteristics and tensoelectric properties in p⁺-nGaAs diodes is investigated. The reverse breakdown voltage showed a weak increase due to irradiation and an anomalous temperature dependence in the range 77–300 K. The I–V characteristics in electron-irradiated diodes revealed a high pressure sensitivity (tensosensibility) to the external hydrostatic pressure (up to 6 · 10⁸ Pa). The peculiarities in the reverse I–V characteristics of diodes investigated point to the presence of a radiation-induced deep trap (acceptor-type level at about E₀ ? 0.3 + 0.4 eV), which is attached to the Γ₁₅^V-maximum of the valence band.     

Analysis of interface states and series resistance of MIS Schottky diodes using the current-voltage (I-V) characteristics

The purpose of this paper is to analyze interface states in Al/SiO₂/p-Si (MIS) Schottky diodes and determine the effect of SiO₂ surface preparation on the interface state energy distribution. The current-voltage (I-V) characteristics of MIS Schottky diodes were measured at room temperature. From the I-V characteristics of the MIS Schottky diode, ideality factor (n) and barrier height (Φ_B) values of 1.537 and 0.763 eV, respectively, were obtained from a forward bias I-V plot. In addition, the density of interface states (N_ss) as a function of (E_ss-E_v) was extracted from the forward bias I-V measurements by taking into account both the bias dependence of the effective barrier height (Φ_e), n and R_s for the MIS Schottky diode. The diode shows non-ideal I-V behaviour with ideality factor greater than unity. In addition, the values of series resistance (R_s) were determined using Cheung’s method. The I-V characteristics confirmed that the distribution of N_ss, R_s and interfacial insulator layer are important parameters that influence the electrical characteristics of MIS Schottky diodes.     

AuSiC Schottky barrier diodes

Results of the experimental study of Au n-type SiC Schottky barrier diodes at room temperature are presented. The diodes are fabricated by vacuum-evaporating gold on chemically etched n-type hexagonal (6H) SiC surfaces and exhibit excellent forward current vs voltage characteristics with the exponential factor n of about 1·07±0·02 for voltages between 0·35 and 0·85 V. The linear part of the characteristic, in a semi-logarithmic plot, extends over seven orders of magnitude in current. The forward current-voltage characteristics are found to agree quantitatively with the theory based on thermionic emission with the barrier height modified by image force lowering. The Schottky barrier height is determined from three independent techniques: differential capacitance vs voltage, photoresponse, and forward current vs voltage methods. The barrier height deduced from the three methods is about 1·40±0·05 V.     

Minority carrier MIS tunnel diodes and their application to electron- and photo-voltaic energy conversion—I. Theory

If the insulating layer in a metal-insulator-semiconductor (MIS) diode is very thin ($\text{<60}\text{A}\text{?}$ for AlSiO₂Si), measureable tunnel current can flow between the metal and the semiconductor. If the insulating layer is even thinner ($\text{<30}\text{A}\text{?}$), tunnel currents are so large that they can significantly disturb the semiconductor from thermal equilibrium. Under such conditions, MIS diodes exhibit properties determined by which of the following tunneling processes is dominant; tunneling between the metal and the majority carrier energy band in the semiconductor, between the metal and the minority carrier energy band, or between the metal abd surface state levels. In the present paper, minority carrier MIS tunnel diodes are analysed using a very general formulation of the tunneling processes through the insulator, transport properties in the semiconductor, and surface state effects. Starting from solutions for diodes with relatively thick insulating layers where the semiconductor is essentially in thermal equilibrium, solutions are obtained for progressively thinner insulating layers until non-equilibrium effects in the semiconductor are observed. It is shown that such minority carrier MIS tunnel diodes with very thin insulating layers possess properties similar to p-n junction diodes including exponential current-voltage characteristics which approach the “ideal diode” law of p-n junction theory. The theory adequately describes the observed properties of experimental devices reported in a companion paper. The diodes have application as injecting contacts, as photodiodes or elements of photodiode arrays, and as energy conversion devices employing the electron- or photo-voltaic effects.     

Schottky-barriers on p-type GaInAs

On p-type Ga0.47In0.53As LPE-grown layers, Schottky diodes were fabricated with different metals and surface preparations. On chemically etched surfaces, diodes with ideality factors near unity but rather low breakdown voltages with soft breakdown were achieved. The barrier heights were between 0.4 and 0.7 eV depending on the work function of the metal. On sputter-cleaned surfaces the diodes exhibited high breakdown voltages and barrier heights of about 0.7 eV independent of the metal. Annealing of the diodes at 320°C resulted in reduced series resistances and barrier heights in the case of sputteretched surfaces. The junction seems to consist of two different barriers; the lower one is determined by an As segregation at the interface, whereas the higher one is caused by traps which are induced by the sputter process.     

A computer-aided simulation model for the I–V characteristic of M-n-p silicon Schottky-barrier diodes produced by use of low-energy arsenic-ion implantation

Current-transport properties of Al-n-p silicon Schottky-barrier diodes have been studied both experimentally and theoretically. An analytical model for the I-V characteristic of a metal-n-p Schottky barrier diode has been developed by using an interfacial layer-thermionic-diffusion model. Assuming a Gaussian distribution for the implanted profile, the barrier-height enhancement and ideality factor have been derived analytically. Using low energy (25 KeV) arsenic implantation with the dose ranged form 8 × 10¹⁰/cm² to 10¹²/cm², Al-n-p silicon Schottky barrier diodes have been fabricated and characterized. Comparisons between the experimental measurements and the results of computer simulations have been performed and satisfactory agreements between these comparisons have been obtained. The reverse I–V characteristics of the fabricated Al-n-p silicon Schottky barrier diodes can also be well simulated by the developed model.     

Influence of inhomogeneous contact in electrical properties of 4H–SiC based Schottky diode

Schottky diodes realized on 4H–SiC n-type wafers with an epitaxial layer and a metal-oxide overlap for electric field termination were studied. The oxide was grown by plasma enhanced chemical vapor deposition (PECVD) and the Schottky barriers were formed by thermal evaporation of titanium or nickel. Diodes, with voltage breakdown as high as 700 V and ideality factor as low as 1.05, were obtained and characterized after packaging in standard commercial package (TO220).The electrical properties such as ideality factor, hight barrier, the series resistance R_s were deduced by current/voltage (I–V) analysis using the least mean square (LMS) method. The temperature effect on break voltage, R_s and saturation current was studied. A model based on two parallel Schottky diodes with two barrier heights is presented for some devices having an inhomogeneous contact. It is shown that the excess current at low voltage can be explained by a lowering of the Schottky barrier in localized regions. We use the two series RC components electrical model in order to study the dynamic behaviour of the Schottky diode in low frequency and to improve the effect of barrier inhomogeneities in electrical properties.     

Fabrication and photosensitivity of heterojunctions based on CuIn<Subscript>3</Subscript>Se<Subscript>5</Subscript> crystals

Heterojunctions based on p-CuIn₃Se₅ crystals are fabricated by magnetron sputtering of an n-ZnO:Al target and by putting naturally cleaved n-GaSe thin wafers onto polished surfaces of p-CuIn₃Se₅ wafers. The current-voltage characteristics and mechanisms of current flow in the diodes under study are analyzed. The photovoltaic effect revealed in the fabricated structures is discussed. It is shown that the fabricated photosensitive heterojunctions are promising for the development of selective analyzers of linearly polarized radiation.     

Schottky barrier height modification in Au/n-type 6H-SiC structures by PbS interfacial layer

We have prepared the Au/PbS/n-6H-SiC Schottky diodes with interface layer and the reference Au/n-6H-SiC/Ni Schottky diodes without interface layer to realize Schottky barrier height (SBH) modification in the Au/SiC Schottky diodes. The BH reduction has been succeeded by the PbS interlayer to modify the effective BH by influencing the space charge region of the SiC. The PbS thin layer on the SiC was formed by the vacuum evaporation. The SBH values of 0.97 and 0.89 eV for the samples with and without the interfacial PbS layer were obtained from the forward bias current-voltage (I-V) characteristics. X-ray diffraction (XRD) study was carried out to determine the structural formation of the PbS on SiC. The reduction of the BH in the Au/PbS/n-6H-SiC Schottky diodes has been attributed to the fact that the interface states have a net positive interface charge in metal/n-type semiconductor contact, and thus the positive space charge Q_sc in the Au/PbS/n-6H-SiC Schottky diodes becomes smaller than if the interface state charges Q_ss were absent. The experimental carrier concentration value of 4.73 × 10¹⁷ cm⁻³ obtained from the forward and reverse bias capacitance-voltage characteristics for the Au/PbS/n-6H-SiC contacts is lower than the value of 5.52 × 10¹⁷ cm⁻³ obtained for the reference diode, and this is an evidence of the reduction of the BH by the modification of the space charge density of the SiC.     

Interface state density in Au-nGaAs Schottky diodes

A method for determining the surface state density in Schottky diodes taking into account both I–V and C–V data while considering the presence of a deep donor level is presented. The model assumes that the barrier height is controlled by the energy distribution of surface states in equilibrium with the metal and the applied potential and does not include, explicitly, an interfacial layer. The model was applied to extract interface state densities of Au-nGaAs guarded Schottky diodes fabricated from bulk and VPE (100) GaAs with carrier conentrations between 3 × 10¹⁵ and 8 × 10¹⁶ cm^?3. These diodes exhibited ideality (n) factors of approximately 1.02 and room temperature saturation current densities ～10^?8 A/cm². This model is in substantial agreement with forward bias measurements over the 77–360°K temperature range investigated, in that a temperature-independent energy distribution of interface states was obtained. In reverse bias the interface state model is most valid with the higher carrier concentration material and at high temperature and low bias voltage. Typical interface state densities from 0.07 eV above the zero bias Fermi level to 0.01 eV below the Fermi level were 2 × 10¹³ cm^?2 eV^?1. The validity of the model under reverse bias is restricted by a non-thermionic reverse current, thought to be enhance field emission from traps.     

Impedance and barrier capacitance of silicon diodes implanted with high-energy Xe ions

Characteristics of Si p⁺n diodes with non-uniformly distributed compensating defects, which were introduced by implantation with Xe²³⁺ ions, have been studied. The layer with the maximum concentration of the compensating defects was located in the vicinity of the metallurgical p-n junction. It is found that the presence of the defect layer results in non-monotonic dependences of the imaginary part of impedance (−Z″) and differential conductance (G = −dI/dU) of the implanted diodes on reverse bias voltage U. An equivalent circuit of the irradiated diode is proposed, which allows us to approximate the measured frequency dependences of capacitance and conductance of the irradiated diodes and to determine values of diode barrier capacitance C_pn at different reverse bias voltages.     

Electrical characteristics of Au/<Emphasis Type="Italic">n</Emphasis>-GaAs structures with thin and thick SiO<Subscript>2</Subscript> dielectric layer

The aim of this study, to explain effects of the SiO₂ insulator layer thickness on the electrical properties of Au/n-GaAs Shottky barrier diodes (SBDs). Thin (60 Å) and thick (250 Å) SiO₂ insulator layers were deposited on n-type GaAs substrates using the plasma enganced chemical vapour deposition technique. The current-voltage (I–V) and capacitance-voltage (C-V) characteristics have been carried out at room temperature. The main electrical parameters, such as ideality factor (n), zero-bias barrier height (? _Bo ), series resistance (R _s ), leakage current, and interface states (N _ss ) for Au/SiO₂/n-GaAs SBDs have been investigated. Surface morphologies of the SiO₂ dielectric layer was analyzed using atomic force microscopy. The results show that SiO₂ insulator layer thickness very affects the main electrical parameters. Au/n-GaAs SBDs with thick SiO₂ insulator layer have low leakage current level, small ideality factor, and low interface states. Thus, Au/n-GaAs SBDs with thick SiO₂ insulator layer shows better diode characteristics than other.