TiN/TaN 厚度变化对nMOSCAP栅叠层有效功函数的影响

We evaluated the TiN/TaN/TiA1 triple-layer to modulate the effective work function （EWF） of a metal gate stack for the n-type metal-oxide-semiconductor （NMOS） devices application by varying the TiN/TaN thickness. In this paper, the effective work function of EWF ranges from 4.22 to 4.56 eV with different thicknesses of TiN and TaN. The thinner TiN and/or thinner in situ TaN capping, the closer to conduction band of silicon the EWF is, which is appropriate for 2-D planar NMOS. Mid-gap work function behavior is observed with thicker TiN, thicker in situ TaN capping, indicating a strong potential candidate of metal gate material for replacement gate processed three-dimensional devices such as FIN shaped field effect transistors. The physical understandings of the sensitivity of EWF to TiN and TaN thickness are proposed. The thicker TiN prevents the A1 diffusion then induces the EWF to shift to mid-gap. However, the TaN plays a different role in effective work function tuning from TiN, due to the Ta-O dipoles formed at the interface between the metal gate and the high-k layer.     

利用物理气相淀积工艺制备的HfTaON薄膜热力学稳定性研究

We investigate the thermal stability of HfTaON films prepared by physical vapor deposition using high resolution transmission electronic microscope （HRTEM） and X-ray photoelectron spectroscopy （XPS）. The results indicate that the magnetron-sputtered HfTaON films on Si substrate are not stable during the post-deposition annealing （PDA）. HfTaON will react with Si and form the interfacial layer at the interface between HfTaON and Si substrate. Hf-N bonds are not stale at high temperature and easily replaced by oxygen, resulting in significant loss of nitrogen from the bulk film. SiO2 buffer layer introduction at the interface of HfraON and Si substrate may effectively suppress their reaction and control the formation of thicker interfacial layer. But SiO2 is a low k gate dielectric and too thicker SiO2 buffer layer will increase the gate dielectric＇s equivalent oxide thickness. SiON prepared by oxidation of N-implanted Si substrate has thinner physical thickness than SiO2 and is helpful to reduce the gate dielectric＇s equivalent oxide thickness.     

TDDB improvement by optimized processes on metal-insulator-silicon capacitors with atomic layer deposition of Al_2O_3 and multi layers of TiN film structure

A metal-insulator-silicon （MIS） capacitor with hemi-spherical grained poly atomic layer deposition （ALD） deposited Al2O3 and multi-layered chemical vapor deposition （CVD） TiN structure is fabricated. The impact of the deposition process and post treatment condition on the MIS capacitor＇s time-dependent dielectric breakdown （TDDB） performance is also studied. With an optimized process, it is confirmed by Auger electron spectroscopy and secondary ion mass spectrometry analysis that the Al（CH3）3/O3-based ALD Al2O3 dielectric film is carbon free and the hydrogen content is as low as 9 × 1019 cm-3. The top electrode TiN is obtained by multi-layered TiCl4/NH3 CVD deposited TiN followed by 120 s post NH3 treatment after each layer. This has higher diffusion barrier in preventing impurity diffusion through TiN into the Al2O3 dielectric due to its smaller grain size. As shown in energy dispersive X-ray analysis, there is no chlorine residue in the MIS capacitor structure. The leakage current of the capacitor is lower than 1 × 10-12 A/cm2. No early failures under stress conditions are found in its TDDB test. The novel MIS capacitor is proven to have excellent reliability for advanced DRAM technology.     

雪崩击穿条件下4.5kV IGBT器件的背面优化研究

The static avalanche breakdown behavior of 4.5 kV high-voltage IGBT is studied by theory analysis and experiment. The avalanche breakdown behaviors of the 4.5 kV IGBTs with different backside structures are investigated and compared by using the curve tracer. The results show that the snap back behavior of the breakdown waveform is related to the bipolar PNP gain, which leads to the deterioration of the breakdown voltage. There are two ways to optimize the backside structure, one is increasing the implant dose of the N C buffer layer, the other is decreasing the implant dose of the P C collector layer. It is found that the optimized structure is effective in suppressing the snap back behavior and improving the breakdown characteristic of high voltage IGBT.     

Investigation on the passivation,band alignment,gate charge,and mobility degradation of the Ge MOSFET with a GeO/Al;O;gate stack by ozone oxidation

Ge has been an alternative channel material for the performance enhancement of complementary metal-oxide-semiconductor(CMOS)technology applications because of its high carrier mobility and superior compatibility with Si CMOS technology.The gate structure plays a key role on the electrical property.In this paper,the property of Ge MOSFET with Al₂O₃/GeO_x/Ge stack by ozone oxidation is reviewed.The GeO_xpassivation mechanism by ozone oxidation and band align-ment of Al2O3/GeO_x/Ge stack is described.In addition,the charge distribution in the gate stack and remote Coulomb scatter-ing on carrier mobility is also presented.The surface passivation is mainly attributed to the high oxidation state of Ge.The en-ergy band alignment is well explained by the gap state theory.The charge distribution is quantitatively characterized and it is found that the gate charges make a great degradation on carrier mobility.These investigations help to provide an impressive un-derstanding and a possible instructive method to improve the performance of Ge devices.     

Dry etching of poly-Si/TaN/HfSiON gate stack for advanced complementary metal-oxide-semiconductor devices

A novel dry etching process of a poly-Si/TaN/HfSiON gate stack for advanced complementary metal-oxide-semiconductor（CMOS） devices is investigated.Our strategy to process a poly-Si/TaN/HfSiON gate stack is that each layer of gate stack is selectively etched with a vertical profile.First,a three-step plasma etching process is developed to get a vertical poly-Si profile and a reliable etch-stop on a TaN metal gate.Then different BCl₃-based plasmas are applied to etch the TaN metal gate and find that BCl₃/Cl₂/O₂/Ar plasma is a suitable choice to get a vertical TaN profile.Moreover,considering that Cl₂ almost has no selectivity to Si substrate, BCl₃/Ar plasma is applied to etch HfSiON dielectric to improve the selectivity to Si substrate after the TaN metal gate is vertically etched off by the optimized BCl₃/Cl₂/O₂/Ar plasma.Finally,we have succeeded in etching a poly-Si/TaN/HfSiON stack with a vertical profile and almost no Si loss utilizing these new etching technologies.     

Layer Combination Effect on Band Gap Shift of InGaAsP／InP MQWs by Impurity-free Vacancy Disordering

InGaAsP/InP multiple quantum wells with quantum well intermixing have been prepared by impurity-free vacancy disordering. The luminescent characteristics were investigated using photoluminescence and photoreflectance, from which the band gap blue shift was observed, Si3N4, SiO2 and SOG were used for the dielectric layer to enhance intermixing from the outdiffusion of group Ⅲ atoms. All samples were annealed by rapid thermal annealing. The results indicate that the band gap blue shift varies with the dielectric layers and the annealing temperature, The SiO2 capping with an InGaAs cladding layer was successfully used to induce larger band tuning effect in the InGaAsP/InP MQWs than the Si3N4 capping with an InGaAs cladding layer, On the other hand, samples with the Si3 N4- InP cap layer combination also show larger energy shifts than that with SiO2-InP cap layer combination.     

低温退火对具有HfO2/TiN栅结构的MOS电容电学性能的影响

The effects of low temperature annealing,such as post high-k dielectric deposition annealing(PDA),post metal annealing(PMA)and forming gas annealing(FGA)on the electrical characteristics of a metal–oxide–semiconductor(MOS)capacitor with a TiN metal gate and a HfO2dielectric are systematically investigated.It can be found that the low temperature annealing can improve the capacitance–voltage hysteresis performance significantly at the cost of increasing gate leakage current.Moreover,FGA could effectively decrease the interfacial state density and oxygen vacancy density,and PDA could make the flat band positively shift which is suitable for P-type MOSs.     

Electrical Properties of Ultra Thin Nitride/Oxynitride Stack Dielectrics pMOS Capacitor with Refractory Metal Gate

Electrical properties of high quality ultra thin nitride/oxynitride（N/O）stack dielectrics pMOS capacitor with refractory metal gate electrode are investigated，and ultra thin (＜2 nm＝ N/O stack gate dielectrics with significant low leakage current and high resistance to boron penetration are fabricated.Experiment results show that the stack gate dielectric of nitride/oxynitride combined with improved sputtered tungsten/titanium nitride (W/TiN) gate electrode is one of the candidates for deep sub-micron metal gate CMOS devices.     

PI/Cr钝化对提高AlGaN/GaN HEMTs 击穿电压的研究

A novel AlGaN/GaN high electric mobility transistor（HEMT） with polyimide（PI）/chromium（Cr） as thepassivationlayerisproposedforenhancingbreakdownvoltageanditsDCperformanceisalsoinvestigated.The Cr nanoparticles firstly introduced in PI thin films by the co-evaporation can be used to increase the permittivity of PI film. The high-permittivity PI/Cr passivation acting as field plate can suppress the fringing electric field peak at the drain-side edge of the gate electrode. This mechanism is demonstrated in accord with measured results. The experimental results show that in comparison with the AlGaN/GaN HEMTs without passivation, the breakdown voltage of HEMTs with the PI/Cr composite thin films can be significantly improved, from 122 to 248 V.     

不同氧化退火工艺下SiO2/SiC界面特性研究

The effect of the different re-oxidation annealing （ROA） processes on the SiO2/SiC interface charac- teristics has been investigated. With different annealing processes, the flat band voltage, effective dielectric charge density and interface trap density are obtained from the capacitance-voltage curves. It is found that the lowest interface trap density is obtained by the wet-oxidation annealing process at 1050 ℃ for 30 min, while a large num- ber of effective dielectric charges are generated. The components at the SiO2/SiC interface are analyzed by X-ray photoelectron spectroscopy （XPS） testing. It is found that the effective dielectric charges are generated due to the existence of the C and H atoms in the wet-oxidation annealing process.     

氧化铟纳米管的制备及它的甲苯气敏特性研究

Abstract： The pristine In2O3 nanotubes were synthesized by electrospinning and subsequent calcination. Scanning electron microscope, X-ray powder diffraction and transmission electron micrograph were employed to analyze the morphology and crystal structure of the as-synthesized nanotubes. Gas-sensing properties of the as-synthesized In203 nanotubes were investigated by exposing the corresponding sensors to toluene, acetone, ethanol, formalde- hyde, ammonia and carbon monoxide at 340 ℃. The results show that the gas sensor possesses a good selectivity to toluene at 340 ℃. The response of the In2O3 nanotube gas sensor to 40 ppm is about 5.88. The response and recovery times are about 3 s and 17 s, respectively.     

Ga2O3缓冲层厚度对柔性衬底沉积Cu/ITO薄膜性能的影响

Cu and Cu/ITO films were prepared on polyethylene terephthalate （PET） substrates with a Ga2O3 buffer layer using radio frequency （RF） and direct current （DC） magnetron sputtering. The effect of Cu layer thickness on the optical and electrical properties of the Cu film deposited on a PET substrate with a Ga2O3 buffer layer was studied, and an appropriate Cu layer thickness of 4.2 nm was obtained. Changes in the optoelectrical properties of Cu（4.2 nm）/ITO（30 nm） films were investigated with respect to the Ga2O3 buffer layer thickness. The optical and electrical properties of the Cu/ITO films were significantly influenced by the thickness of the Ga2O3 buffer layer. A maximum transmission of 86%, sheet resistance of 45 Ω/□ and figure of merit of 3.96 × 10^-3 Ω^ -1 were achieved for Cu（4.2 nm）/ITO（30 nm） films with a Ga2O3 layer thickness of 15 nm.     

Synthesis of In2S3 thin films by spray pyrolysis from precursors with different [S]/[In] ratios

Indium sulfide （InzS3） thin films were prepared by chemical spray pyrolysis technique from solutions with different [S]/[In] ratios on glass substrates at a constant temperature of 250 ~C. Thin films were characterized by X-ray diffraction （XRD）, scanning electron microscopy （SEM）, atomic force microscopy （AFM）, energy disper- sive X-ray spectroscopy （EDS）, Raman spectroscopy and optical transmittance spectroscopy. All samples exhibit a polycrystalline structure with a preferential orientation along （0, 0, 12）. A good stoichiometry was attained for all samples. The morphology of thin film surfaces, as seen by SEM, was dense and no cracks or pinholes were ob- served. Raman spectroscopy analysis shows active modes belonging to j3-1naS3 phase. The optical transmittance in the visible range is higher than 60% and the band gap energy slightly increases with the sulfur to indium ratio, attaining a value of 2.63 eV for [S]/[In] ： 4.5.     

TiO2 薄膜CMP表面粗糙度的研究

Abstract： Surface roughness by peaks and depressions on the surface of titanium dioxide （TiO2） thin film, which was widely used for an antireflection coating of optical systems, caused the extinction coefficient increase and affected the properties of optical system. Chemical mechanical polishing （CMP） is a very important method for surface smoothing. In this polishing experiment, we used self-formulated weakly alkaline slurry. Other process parameters were working pressure, slurry flow rate, head speed, and platen speed. In order to get the best surface roughness （1.16 A, the scanned area was 10 × 10 μm2） and a higher polishing rate （60.8 nm/min）, the optimal parameters were： pressure, 1 psi; slurry flow rate, 250 mL/min; polishing head speed, 80 rpm; platen speed, 87 rpm.     

高效太阳电池硅衬底特性对原子层沉积Al2O3薄膜钝化性能的影响

Atom layer deposition （ALD）-Al2O3 thin films are considered effective passivation layers for p-type silicon surfaces. A lower surface recombination rate was obtained through optimizing the deposition parameters. The effects of some of the basic substrate characteristics including material type, bulk resistivity and surface morphology on the passivation performance of ALD-Al2O3 are evaluated in this paper. Surface recombination velocities of 7.8 cm/s and 6.5 cm/s were obtained for p-type and n-type wafers without emitters, respectively. Substrates with bulk resistivity ranging from 1.5 to 4 Ω · cm were all great for such passivation films, and a higher implied Voc of 660 mV on the 3 Ω · cm substrate was achieved. A minority carrier lifetime （MCL） of nearly 10 μs higher was obtained for cells with a polished back surface compared to those with a textured surface, which indicates the necessity of the polishing process for high-efficiency solar cells. For n-type semi-finished solar cells, a lower effective front surface recombination velocity of 31.8 cm/s was acquired, implying the great potential of （ALD）-Al2O3 thin films for high-efficiency n-type solar cells.     

多层交替结构Ga2O3/ITO深紫外透明导电膜

Ga2O3/ITO alternating multilayer films were deposited on quartz glass substrates by magnetron sputtering.The effect of the multi-period on the structural,optical and electrical properties of Ga2O3/ITO alternating multilayer films was investigated by an X-ray diffractometer,a double beam spectrophotometer and the Hall system,respectively.A low sheet resistance of 225.5Ω/□ and a high transmittance of more than 62.9% at a 300 nm wavelength were obtained for the two-period alternating multilayer film with a thickness of 72 nm.     

Effects of defect states on the performance of CuInGaSe2 solar cells

Device modeling has been carried out to investigate the effects of defect states on the performance of ideal CulnGaSe2 （CIGS） thin film solar cells theoretically. The varieties of defect states （location in the band gap and densities） in absorption layer CIGS and in buffer layer CdS were examined. The performance parameters： open-circuit voltage, short-circuit current, fill factor, and photoelectric conversion efficiency for different defect states were quantitatively analyzed. We found that defect states always harm the performance of CIGS solar cells, but when defect state density is less than 10 14 cm-3 in CIGS or less than 10 18 cm-3 in CdS, defect states have little effect on the performances. When defect states are located in the middle of the band gap, they are more harmful. The effects of temperature and thickness are also considered. We found that CIGS solar cells have optimal performance at about 170 K and 2 μm of CIGS is enough for solar light absorption.     

基于Si3N4的电荷俘获型存储器中氧缺陷的第一性原理研究

Based on first principle calculations, a comprehensive study of substitutional oxygen defects in hexagonal silicon nitride （β-Si3N4） has been carried out. Firstly, it is found that substitutional oxygen is most likely to form clusters at three sites in Si3N4 due to the intense attractive interaction between oxygen defects. Then, by using three analytical tools （trap energy, modified Bader analysis and charge density difference）, we discuss the trap abilities of the three clusters. The result shows that each kind of cluster at the three specific sites presents very different abilities to trap charge carriers （electrons or holes）： two of the three clusters can trap both kinds of charge carriers, confirming their amphoteric property; While the last remaining one is only able to trap hole carriers. Moreover, our studies reveal that the three clusters differ from each other in terms of endurance during the program/erase progress. Taking full account of capturing properties for the three oxygen clusters, including trap ability and endurance, we deem holes rather than electrons to be optimal to act as operational charge carriers for the oxygen defects in Si3N4-based charge trapping memories.     

采用Ni/Ti/Ni多层金属在N型4H-SiC衬底改善粘附性和界面的欧姆接触

The Ni/Ti/Ni multilayer ohmic contact properties on a 4H-SiC substrate and improved adhesion with the Ti/Au overlayer have been investigated. The best specific contact resistivity of 3.16 × 10^-5 Ω.cm^2 was obtained at 1050 ℃. Compared with Ni/SiC ohmic contact, the adhesion between Ni/Ti/Ni/SiC and the Ti/Au overlayer was greatly improved and the physical mechanism under this behavior was analyzed by using Raman spectroscopy and X-ray energy dispersive spectroscopy （EDS） measurement. It is shown that a Ti-carbide and Ni-silicide compound exist at the surface and there is no graphitic carbon at the surface of the Ni/Ti/Ni structure by Raman spectroscopy, while a large amount of graphitic carbon appears at the surface of the Ni/SiC structure, which results in its bad adhesion. Moreover, the interface of the Ni/Ti/Ni/SiC is improved compared to the interface of Ni/SiC.