基于0.13μm标准逻辑工艺的1 Mb阻变存储器设计与实现

采用了SMIC 0.13μm标准CMOS工艺设计并实现了一个1 Mb容量的基于1T1R结构的阻变存储器.描述了整个芯片的基本存储单元、存储器架构以及特殊的电路设计技术,包括优化的存储器架构、用于降低reset功耗的多电压字线驱动、使电阻分布更紧凑的斜坡脉冲写驱动以及可验证的读取参考系统.芯片实现了22F<'2>的存储单...     

新型阻变存储器内的电压解决方案

相对于现在流行的FLASH型存储器,新型阻变存储器(resistive-RAM,RRAM)有很多优势,比如较高的存储密度和较快的读写速度。而针对RRAM的读写操作特性,提出了一种适用于新型阻变存储器的提供操作电压的电路。该方案解决了新型存储器需要外部提供高于电源电压的操作电压的问题,使得阻变存储器能应用于嵌入式设备。同时,对工艺波动和温度波动进行补偿,从而降低了阻变存储器的读写操作在较差的工艺和温度环境下的失败概率,具有很强的实际应用意义。该设计采用0.13μm标准CMOS 6层金属工艺在中芯国际(SMIC)流片实现,测试结果表明,采用此电路的RRAM能正确地进行数据编程和擦除等操作,测试结果达到设计要求。     

一种基于多值RRAM的快速逻辑电路

针对移动物联网设备,提出一种基于多值RRAM的快速逻辑电路,以实现非易失性存储与快速逻辑运算。利用RRAM多值存储特性,采用Crossbar结构,实现了简单快速的译码器与高存储密度查找表,使逻辑电路具有较快的运算速度和较小的面积。基于该结构实现了4位、8位和16位的乘法器,其外围电路采用SMIC 65 nm CMOS工艺实现,而其核心多值RRAM则采用Verilog-A 模型模拟。仿真结果表明,与传统CMOS逻辑电路相比,基于多值RRAM的16位乘法器的速度提高了35.7%,面积减少了14%。     

阻变存储阵列的自动化测试系统

阻变存储器(RRAM)是一种新型的不挥发存储技术,研究阻变存储器阵列规模的存储性能以及可靠性问题是推进RRAM实用化的关键.目前通用的基于微控探针台的半导体参数分析的常规测量系统无法完成对阵列的自动化测试.利用半导体参数分析仪(4200-SCS)、开关矩阵以及相关外围电路搭建了一套针对阻变存储阵列的自动测试系统,实现了1MbitRRAM芯片的初始阻态分布的读取、初始化测试、存储单元的自动化编程/擦除操作.测试结果表明,该测试系统可以实现阻变存储阵列的自动化测试,为进一步工艺参数和编程算法的优化设计奠定基础.     

Resistive switching characteristics of CMOS embedded HfO2-based 1T1R cells

This work addresses a 1T1R RRAM architecture, which allows for the precise and reliable control of the forming/set current by using an access transistor. The 1T1R devices were fabricated in a modified 0.25 μm CMOS technology. The memory cells show stable resistive switching in dc as well as pulse-induced mode with an endurance of 10³ and 10² cycles, respectively. The variation of pulse widths as a function of amplitudes in 1R devices confirmed the set process distribution over a wide range of pulse widths (300 ns-100 μA), whereas the reset process variation is confined (1-3 μs).     

1T1R结构RRAM的故障可测性设计

阻变随机存储器(RRAM)中存在的故障严重影响产品的可靠性和良率.采用精确高效的测试方法能有效缩短工艺优化周期,降低测试成本.基于SMIC 28 nm工艺平台,完成了1T1R结构的1 Mbit RRAM模块的流片.详细分析了测试中的故障响应情况,并定义了一种故障识别表达式.在March算法的基础上,提出针对RRAM故障的有效测试算法,同时设计了可以定位故障的内建自测试(BIST)电路.仿真结果表明,该测试方案具有占用引脚较少、测试周期较短、故障定位准确、故障覆盖率高的优势.     

两类阻变机理及性能改善方法的研究

在新型非易失性存储领域,结构简单、高速低耗的阻变存储器具有巨大优势和很强的竞争力.简要介绍了阻变存储器的结构及其两个电阻转变行为.总结了两类阻变机理,探讨了阻变存储器性能优化的方法,以及优化方法在阻变性能与器件的可靠性和稳定性之间如何取得平衡统一的问题,并展望了其前景.     

基于WO_x阻变材料的RRAM电路设计

采用HHNEC0.18μm标准CMOS工艺设计实现了多个1kb容量的阻变存储器电路。针对WOx阻变材料的操作特点,提出了可切换的写电路以及自调节的读参考电路,满足了单极(Unipolar)与双极(Bipolar)兼容操作需求的同时提高了读操作的成功率。引入位线限流模块解决了置位(set)过程需要字线限流的问题,进而可以实现包含‘0’和‘1’多位数据的并行写入。芯片采用高低两种电压设计,同时包含多种阵列尺寸结构的对比测试电路。     

小容量相变存储器芯片版图设计与验证分析

设计了基于1T1R结构的16 kb相变存储器(PCRAM)芯片及其版图。芯片包括存储阵列、外围读写控制电路、纠错电路(ECC)、静电防护电路(ESD)。版图上对纳米存储单元(1R)与CMOS工艺的融合作了优化处理,给出了提高存储单元操作电流热效率的具体方法。1R位于顶层金属(TM)和二层金属(TM-1)之间,包含存储材料以及上下电极,需要在传统CMOS工艺基础上添加掩膜版。读出放大器采用全对称的差分拓扑结构,大大提升了抗干扰能力、灵敏精度以及读出速度。针对模块布局、电源分配、二级效应等问题,给出了版图解决方案。采用中芯国际130 nm CMOS工艺流片,测试结果显示芯片成品率(bit yield)可达99.7%。     

Resistive random access memory and its applications in storage and nonvolatile logic

The resistive random access memory (RRAM) device has been widely studied due to its excellent memory characteristics and great application potential in different fields. In this paper, resistive switching materials, switching mechanism, and memory characteristics of RRAM are discussed. Recent research progress of RRAM in high-density storage and nonvolatile logic application are addressed. Technological trends are also discussed.     

基于I-V特性的阻变存储器的阻变机制研究

随着器件尺寸的缩小,阻变存储器(RRAM)具有取代现有主流Flash存储器成为下一代新型存储器的潜力。但对RRAM器件电阻转变机制的研究在认识上依然存在很大的分歧,直接制约了RRAM的研发与应用。通过介绍阻变存储器的基本工作原理、不同的阻变机制以及基于阻变存储器所表现出的不同I-V特性,研究了器件的阻变特性;详细分析了阻变存储器的五种阻变物理机制,即导电细丝(filament)、空间电荷限制电流效应(SCLC)、缺陷能级的电荷俘获和释放、肖特基发射效应(Schottky emission)以及普尔-法兰克效应(Pool-Frenkel);同时,对RRAM器件的研究发展趋势以及面临的挑战进行了展望。     

Current-Sweep Operation on Nonlinear Selectorless RRAM for Multilevel Cell Applications

Bilayer selectorless resistive random-access memories (RRAM) have been demonstrated by utilizing the intrinsic nonlinear resistive switching (RS) characteristics, without additional transistor or a selector integration. The bilayer structures, i.e. high-k layer/low-k layer stacks, are highly scalable while suppressing the sneak path currents (SPC) and reading error in the crossbar RRAM array. The nonlinearity (NL) modulation is also investigated by different operating schemes, and a multilevel cell application is demonstrated with the current-sweep method. The results provide additional insights into the development and optimization of bilayer selectorless RRAMs with high nonlinearity, good memory window, and low switching energy (∼ 40 pJ/bit), which enable the high-density storage and low-power crossbar array memory applications.     

A journey towards reliability improvement of TiO2 based Resistive Random Access Memory: A review

A Resistive Random Access Memory (RRAM), where the memory performance principally originated from ‘resistive’ change rather than ‘capacitive’ one (the case with conventional CMOS memory devices), has attracted researchers across the globe, owing to its unique features and advantages meeting the demands of future generation high-speed, ultra low power, nano dimensional memory devices. A large family of semiconducting oxides have been investigated as insulator for Resistive Random Access Memory (RRAM), amongst which TiO₂ is one of the potential candidate, principally owing to some of its remarkable advantages e.g. wide band gap, high temperature stability and high dielectric constant with flexibility to offer both unipolar and bipolar switching, which are essential for RRAM device applications. In this review article, we tried to represent the long voyage of TiO₂ based RRAM, towards the improvement of the reliability aspects of the device performance in a comprehensive manner. Starting with the key factors like oxygen vacancies, Ti interstitials and electroforming, which are responsible for resistive switching phenomenon, various material preparation techniques for RRAM development have been discussed with emphasis on relative merits and bottlenecks of the process. The factors like electrode material and geometry, device structuring, doping, compliance current, annealing effect etc., which play the pivotal role in determining the switching performance of the device, have been reviewed critically. Finally, the article concludes with the comparison of different TiO₂ based RRAM devices followed by the prediction of possible future research trends.     

适用于射频识别标签的64-kbit嵌入式阻变存储器

设计并实现了一颗适用于射频识别(RFID)标签的低功耗嵌入式64-kbit阻变存储器芯片.提出了新型的带尖峰电流控制功能的高压稳压电路,在提供稳定编程电压的同时降低了芯片电源上的瞬态大电流,改善了存储器电路的可靠性;设计了适用于2T2R(2 Transistors and 2 Resistive cells)单元的敏感...     

Comparison of three different architectures for active resistive memories

Resistive memory (RRAM) is one of the strong emerging technologies in modern memory field. This type of memories has the potential to be the replacement of several current memory types. As any new technology, RRAM brings new challenges concerning technology and design. This work discusses some aspects concerning the design of active resistive memories and compares three possible memory architectures.     

Thermally Stable Transparent Resistive Random Access Memory based on All‐Oxide Heterostructures

An all‐oxide transparent resistive random access memory (T‐RRAM) device based on hafnium oxide (HfO_x) storage layer and indium‐tin oxide (ITO) electrodes is fabricated in this work. The memory device demonstrates not only good optical transmittance but also a forming‐free bipolar resistive switching behavior with room‐temperature R_OFF/R_ON ratio of 45, excellent endurance of ≈5 × 10⁷ cycles and long retention time over 10⁶ s. More importantly, the HfO_x based RRAM carries great ability of anti‐thermal shock over a wide temperature range of 10 K to 490 K, and the high R_OFF/R_ON ratio of ≈40 can be well maintained under extreme working conditions. The field‐induced electrochemical formation and rupture of the robust metal‐rich conductive filaments in the mixed‐structure hafnium oxide film are found to be responsible for the excellent resistance switching of the T‐RRAM devices. The present all‐oxide devices are of great potential for future thermally stable transparent electronic applications.     

Resistance-CMOS circuits

By combining dynamic CMOS circuits with a few resistive components, very simple sequential logic circuits with static behavior are obtained (e.g., frequency dividers, flip-flops, decoders). Using silicon gate technology and reverse-biased polysilicon diodes for the resistive elements, the area is nearly half that required for corresponding standard CMOS circuits.     

On Using the Volatile Mem-Capacitive Effect of TiO<Subscript>2</Subscript> Resistive Random Access Memory to Mimic the Synaptic Forgetting Process

In this work, we report on mimicking the synaptic forgetting process using the volatile mem-capacitive effect of a resistive random access memory (RRAM). TiO₂ dielectric, which is known to show volatile memory operations due to migration of inherent oxygen vacancies, was used to achieve the volatile mem-capacitive effect. By placing the volatile RRAM candidate along with SiO₂ at the gate of a MOS capacitor, a volatile capacitance change resembling the forgetting nature of a human brain is demonstrated. Furthermore, the memory operation in the MOS capacitor does not require a current flow through the gate dielectric indicating the feasibility of obtaining low power memory operations. Thus, the mem-capacitive effect of volatile RRAM candidates can be attractive to the future neuromorphic systems for implementing the forgetting process of a human brain.     

A Parallel Circuit Model for Multi‐State Resistive‐Switching Random Access Memory

Large, rapidly growing literature is available on bipolar resistive‐switching random access memories (RRAM) made of myriad of simple and advanced materials. Many of them exhibit similar resistance switching behavior but, until now, no unifying model can allow quantification of their voltage and time responses. Using a simple parallel circuit model, these responses of a newly discovered RRAM made of a thin‐film random material are successfully analyzed. The analysis clearly reveals a large population of intermediate states with remarkably similar switching characteristics. Such modeling framework based on simple circuit constructs also appears applicable to several RRAM made of other materials. This simple approach to analyze data write/rewrite and memory retention in RRAM may aid their further understanding and development.     

Bipolar switching characteristics of low-power Geo resistive memory

We reported an ultra low-power resistive random access memory (RRAM) combining a low-cost Ni electrode and covalent-bond GeO_x dielectric. This cost-effective Ni/GeO_x/TaN RRAM device has very small set power of 2 μW, ultra-low reset power of 130 pW, greater than 1 order of magnitude resistance window, and stable retention at 85 °C. The current flow at low-resistance state is governed by Poole-Frenkel conduction with electrons hopping via defect traps, which is quite different from the filament conduction in metal-oxide RRAM.