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1.
In this work, an example of practical implementation of the auxiliary sub-circuit (ASC) for modeling of the NBTI effects in DG FinFETs is described. A good agreement between the simulated and measured electrical characteristics of p-type DG FinFETs fabricated in SOI technology has been obtained using the industry-standard BSIM-CMG model with ASC. The oxide and interface trap densities are extracted in Spice simulations by tuning the ASC trapped charge parameters to fit the NBTI experimental data. The increase of oxide and interface trapped charge in p-type DG FinFET device is found to follow the logarithmic dependence with NBTI stress time.  相似文献   

2.
A physics-based model is used to examine short-channel effects (SCEs) in undoped nanoscale independent-gate FinFETs, e.g., the MIGFET (L. Mathew, , Proc. IEEE Internat. SOI Conf., p. 187, 2004). Predicted current-voltage characteristics of MIGFETs in the single-gate mode show that the SCEs (threshold-voltage rolloff, subthreshold-swing degradation, and drain-induced barrier lowering) are actually less severe than those of the device in the double-gate mode. Insightful explanations of the results are given  相似文献   

3.
讨论了槽栅结构nMOSFET的掺杂浓度对器件特性的影响,并通过二维器件仿真程序PISCES—Ⅱ进行了计算模拟比较。结果表明,提高衬底掺杂浓度,能使源漏区与沟道之间的拐角效应增大,对热载流子效应抑制的作用明显;提高沟道掺杂浓度,能减小沟道电荷的调制效应,使阈值电压更好。调节沟道掺杂浓度比调节衬底掺杂浓度对器件的影响更大。  相似文献   

4.
采用Aixtron 2600G3MOCVD设备外延生长了GaAs/GaInP材料,并结合金相显微镜、X射线衍射仪以及二次离子质谱仪系统地研究了掺杂源Te对GaInP外延层材料特性的影响。实验发现,Te会破坏GaInP外延层的表面形貌,在GaInP表面形成丘状结构及线条,且该丘状结构的尺寸随着GaInP厚度的增加而逐渐增大。在掺杂浓度较高时,Te会破坏GaInP的晶格,造成晶格膨胀。GaInP中Te的并入效率随着厚度的增加而增加,且掺杂浓度越高就越快趋于平稳。此外,Te在As化物中的并入效率大于在P化物中的并入效率。  相似文献   

5.
元素V掺杂对ZnO压敏效应的影响机理研究   总被引:1,自引:0,他引:1  
研究了掺杂不同V_2O_5对ZnO陶瓷压敏特性的影响.实验表明,ZnO压敏电压随V元素掺杂量增加而随之升高,非线性系数随元素V掺杂量增加而先增大后减小,漏电流先减小后增大.分析认为,V元素掺杂对ZnO压敏材料电性能的影响不仅与电子的能级有关,与其自旋特性也紧密相关.ZnO陶瓷中掺杂的V元素在晶界偏析,其V元素都会产生局域磁矩,会对与其取向不同的自旋电子产生强的散射,这样可增大ZnO压敏陶瓷电阻率,使晶界产生非线性特性.  相似文献   

6.
研究不同沟道长度n 沟道MOS场效应晶体管的热载流子效应对其退化特性的影响.实验结果表明,随着器件沟道长度的减小,其跨导退化明显加快,特别是当沟道长度小于1mm时更是如此.这些结果可以用热载流子注入后界面态密度增加来解释.  相似文献   

7.
全面综述鳍式场效应晶体管(FinFET)的总剂量效应,包括辐照期间外加偏置、器件的工艺参数、提高器件驱动能力的特殊工艺、源/漏掺杂类型以及不同栅介质材料和新沟道材料与FinFET总剂量效应的关系。对于小尺寸器件,绝缘体上硅(SOI)FinFET比体硅FinFET具有更强的抗总剂量能力,更适合于高性能抗辐照的集成电路设计。此外,一些新的栅介质材料和一些新的沟道材料的引入,如HfO2和Ge,可以进一步提高FinFET器件的抗总剂量能力。  相似文献   

8.
Threshold-Voltage Modeling of Body-Tied FinFETs (Bulk FinFETs)   总被引:1,自引:0,他引:1  
The threshold voltages Vth of the body-tied double/triple-gate MOSFETs (bulk FinFETs) implemented on bulk silicon (Si) wafers were modeled systematically and compared with data obtained from 3-D device simulation. The threshold-voltage behaviors of the bulk FinFETs were modeled, for the first time, based on charge sharing. For the simplified Vth model, we considered not only short-channel effect (SCE) and narrow-width effect but also 3-D charge sharing at the corner. Only one fitting parameter is introduced to reflect the SCE in the fin body. The model predicted the Vth behavior with fin body thickness, body doping concentration, gate height, gate length, and corner shape of the fin body well. Our compact model makes an accurate prediction of Vth and shows good agreement with 3-D simulation data  相似文献   

9.
利用二维模拟软件对部分耗尽SoI器件中的非对称掺杂沟道效应进行了模拟.详细地研究了该结构器件的电学性能,如输出特性,击穿特性.通过本文模拟发现部分耗尽SOI非对称掺杂沟道相比传统的部分耗尽SOI,能抑制浮体效应,改善器件的击穿特性.同时跟已有的全耗尽SOI非对称掺杂器件相比,部分耗尽器件性能随参数变化,在工业应用上具有可预见性和可操作性.因为全耗尽器件具有非常薄的硅膜,而这将引起如前栅极跟背栅极的耦合效应和热电子退化等寄生效应.  相似文献   

10.
利用二维模拟软件对部分耗尽SoI器件中的非对称掺杂沟道效应进行了模拟.详细地研究了该结构器件的电学性能,如输出特性,击穿特性.通过本文模拟发现部分耗尽SOI非对称掺杂沟道相比传统的部分耗尽SOI,能抑制浮体效应,改善器件的击穿特性.同时跟已有的全耗尽SOI非对称掺杂器件相比,部分耗尽器件性能随参数变化,在工业应用上具有可预见性和可操作性.因为全耗尽器件具有非常薄的硅膜,而这将引起如前栅极跟背栅极的耦合效应和热电子退化等寄生效应.  相似文献   

11.
Using full 3D TCAD, an evaluation of process parameter space of bulk FinFET is presented from the point of view of DRAM, SRAM and I/O applications. Process and device simulations are performed with varying uniform fin doping, anti-punch implant dose and energy, fin width, fin height and gate oxide thickness. Bulk FinFET architecture with anti-punch implant is introduced beneath the channel region to reduce the punch-through and junction leakage. For 30 nm bulk FinFET, anti-punch implant with low energy of 15 to 25 keV and dose of 5.0 × 1013 to 1.0 × 1014 cm−2 is beneficial to effectively suppress the punch-through leakage with reduced GIDL and short channel effects. Our simulations show that bulk FinFETs are approximately independent of back bias effect. With identical fin geometry, bulk FinFETs with anti-punch implant show same ION-IOFF behavior and approximately equal short channel effects like SOI FinFETs.  相似文献   

12.
Nanoscale double-gate (DG) FinFETs with undoped fin bodies are shown to have threshold voltages (Vt) that can be adjusted for independent I ON and I OFF control by allowing limited source/drain (S/D) dopants in the channel. S/D engineering of the lateral doping profile in the extension is proposed as a viable means for effecting such channel doping [as well as gate-S/D (G-S/D) underlap] and, thus, adjusting Vt for optimal I ON/I OFF in low-power and high-performance applications of nanoscale-FinFET CMOS. Physics-based device simulations, numerical simulations, and measured current-voltage characteristics are used to demonstrate and support the proposed Vt design approach.  相似文献   

13.
General investigations and results from ratherextensive measurement campaigns are presented tocharacterize the propagation channel of SatellitePersonal Communication Systems; in the measurements the satellite was simulated by a helicopter andmeasurements at S band and L band were made. A newconceptual partitioning of the full link is introduced;the measrement equipment and the environment aredescribed. The major part of the paper deals withpresentation of the measurement results and theiranalyses. Measured and analyzed are average lossincluding satellite elevation and azimuth positiondependence, first-order statistics, Doppler characteristics, andwide-band characteristics. Finally, some rather generalconclusions are drawn.  相似文献   

14.
简单介绍了TD-SCDMA系统中相关MBMS信道和信道结构,并对基于HSDPA技术的TD-MBMS和LTE中E-MBMS的技术演进中信道的改进进行了介绍,并给出了相关分析比较.  相似文献   

15.
本文针对"通信原理"课程中数字基带系统具有理论性强且抽象枯燥的特点,提出并实现了一种基于现场可编程门阵列的数字基带系统演示及性能评估实验平台。教学实践表明,该平台加强了学生对数字基带系统及无线衰落信道的理解,为进一步学习通信理论奠定了基础。  相似文献   

16.
采用分离变量法求解柱坐标系下二维泊松方程,建立了考虑耗尽电荷和自由电荷的全耗尽阶梯掺杂沟道围栅MOSFET的二维体电势模型,并在此基础上得到阈值电压和亚阈值摆幅的解析模型。研究了不同区域长度和漏压下的表面势,分析了不同掺杂的区域长度和掺杂浓度对器件性能的影响。结果表明,与均匀掺杂的GAA MOSFET相比,阶梯掺杂结构不仅降低了漏端电场,而且能更好地抑制短沟道效应和热载流子效应;通过对掺杂区域参数进行优化,可以提高器件的可靠性。  相似文献   

17.
无线移动信道特性分析   总被引:1,自引:0,他引:1  
为了更快捷方便地搭建无线通信网络,对由多径效应和多普勒频移引起的大尺度衰落和小尺度衰落等信道特性进行了分析,总结其一般的传播规律,并利用Matlab软件对路径损耗模型及平坦衰落模型进行了仿真分析,为无线通信研究人员分析和仿真信道提供基础。  相似文献   

18.
无线体域网信道特性研究   总被引:3,自引:1,他引:2  
无线体域网(WBAN)包含一系列低功耗、微型化、侵入式或非侵入式无线传感器节点,通过短距离无线通信技术实现与外界的通信,提供医疗保健、消费电子、个人娱乐等多项服务。由于WBAN应用于人体,WBAN信道的传播特性与其他传统的无线信道特性有着显著的不同。本文从频点、环境和人体状态3个方面详细研究了WBAN的信道特性。UWB频段采用了冲激响应模型,而路径损耗模型适用于所有频段;在不同环境下,多径效应是影响信号在体外空间传播的主要因素;此外,天线的位置和人体的运动状态,也是WBAN信道建模和仿真时考虑的关键因素。  相似文献   

19.
地空信道为典型的变参信道,变参形成的根本原因是多径和遮挡,特别是在远距离低仰角通信时,多径等因素会直接影响传输质量。地空信道中引入的多径衰落情况、多径时延的分布、衰落速率、相干时间等参数以及地面站天线仰角等均会直接影响地空通信系统设计,为达到平稳传输效果,在系统设计之初,必须对相应的信道特征有比较明确的了解,以便采取相应的抗多径、抗遮挡措施。  相似文献   

20.
Boron-rich cluster compounds are studied for their potential as high-temperature thermoelectric materials with low thermal conductivity. Two B12 icosahedra systems with attractive thermoelectric properties have recently been discovered: p-type REB44Si2 (where RE stands for rare earth) and the anomalous n-type series of RE-B-C(N) homologous compounds. Three different doping effects of these compounds were investigated in this work in an attempt to control the properties: doping disorder into REB44Si2, which is a variable-range hopping system, V-doping of YB44Si2, and C-doping (carbon composition control) of YB28.5C4. The attempt to enhance the Seebeck coefficient in TbB44Si2 through disorder was inconclusive, while V-doping of YB44Si2 had a negative effect on the thermoelectric properties. Controlling the carbon composition of YB28.5C4 appeared to be a promising route for increasing the absolute value of the Seebeck coefficient.  相似文献   

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