Shallow junction formation on p-like CdTe crystals by indium diffusion using excimer laser annealing

Excimer laser annealing has been investigated to form a shallow junction on p-like CdTe crystals by indium diffusion. By evaporating a thin layer of indium on the CdTe crystals in a physical vapor deposition system without heating the crystals, and then irradiating them with an excimer laser, we could produce a highly conductive thin surface layer on the crystal. These layers showed n-type conductivity in Hall measurements, and an increase on the donor-acceptor pair band, possibly due to indium incorporation, was also observed in the photoluminescent spectrum. The best value of resistivity, carrier concentration and electron mobility of the layer thus obtained was 5 10⁻³ cm, 9 10¹⁸ cm⁻³, and 138 cm²/Vs, respectively. The carrier transport properties of the shallow p-n junction formed were then investigated by means of current-voltage measurements at different temperatures. Furthermore, applicability of this junction in a gamma-ray detector was also investigated.     

Minority Carrier Diffusion Lengths in Silicon Slices and Shallow Junction Devices

Measurements of surface photovoltage as a function of the wavelength of incident light provide a convenient method for the determination of minority carrier diffusion length in semiconductors. The diffusion length in silicon slices with a thickness greater than twice the diffusion length has been measured by the steady-state surface photovoltage method with a single laboratory reproducibility of ± 10% over a long period of time. Radial variations in diffusion length in silicon slices as well as the effects of heat treatment have been studied. The diffusion length in the base region of shallow junction devices has been measured by the collection of short-circuit current as a function of the wavelength of incident light. The single laboratory reproducibility of this method for the determination of diffusion length in single crystalline and polycrystalline silicon solar cells is also about ± 10%. Prepared for the Division of Solar Energy of the U. S. Energy Research and Development Administration under Con-tract No. E(04-3)1285.     

The role of drift,diffusion, and recombination in time‐resolved photoluminescence of CdTe solar cells determined through numerical simulation

Time‐resolved photoluminescence (TRPL) measurements are one of the key metrics available to determine the minority‐carrier lifetime in the absorber layer of direct band gap photovoltaic devices. Direct measurement of the minority‐carrier lifetime is essential to understanding the impact of changes in deposition and processing on material quality. Unfortunately, the TRPL signal is determined by a complex convolution of multiple physical factors including bulk carrier lifetime, interface recombination velocity, electric field, doping density, photo‐excited carrier density, and carrier mobility. To gain clarity, we have used numerical simulations to analyze the carrier dynamics after a CdTe device is illuminated with a short light pulse. After the light pulse, the photo‐generated carriers undergo complex dynamics including drift, diffusion, interface, and bulk recombination. In this work, we develop a new formalism that enables much greater insight into which factors dominate the TRPL decay dynamics. By breaking down the carrier dynamics into drift, diffusion, and recombination terms, we have developed six‐factor, four‐factor, and two‐factor analyses that provide clear understanding of which physical factors dominate the decay dynamics under various conditions and at different times during the decay. We show that in a typical CdTe device under the typical experimental conditions used in our laboratories, the faster part of the decay is dominated by charge separation, whereas the slower part is dominated by carrier recombination. Therefore, under the conditions investigated in this study, the slower part of the decay is a better parameter to explain the defect density in the CdTe layer. Copyright © 2013 John Wiley & Sons, Ltd.     

一种双扩散p阱nMOS器件新结构

本文介绍了一种适用于ＶＤＭＯＳ功率集成电路的双扩散ｐ阱ｎＭＯＳ器件新结构，该结构具有与ＶＤＭＯＳ工艺完全兼容和加工工艺简单的特点。利用这种结构可实现ｎＭＯＳ处理电路与衬底间的ｐｎ结隔离，并且隔离电压接近ＶＤＭＯＳ管的耐压。通过调节源、漏扩散窗口间距，可以在小范围内调整ｎＭＯＳ管的阈值电压。这种双扩散ｎＭＯＳ器件结构，特别适合于制作单驱动器件的ＭＯＳ功率集成电路。     

Two Steps B Ion-Implantation of Diamond Film Grown on an n-Type Si Substrate and Its p-n Junction Effects

Polycrystalline diamond thin films are deposited on an n-type Si substrates by hot filament chemical vapor deposition,and then are implanted with boron ions in a 200keV ion implanter.In order to achieve a better distribution of the implanted element,boron ions are implanted by two steps:implanting boron ions with the energy of 70keV first,and then with the energy of 100keV.The homogeneous distribution of the B ion is gained.The current-voltage characteristics of the samples are studied.It is found that the p-n heterojunction effect is achieved in these samples.     

在n型硅基底上二次注入硼离子金刚石膜的p-n结效应

在n型Si衬底上用热丝化学气相沉积方法制备了多晶金刚石膜,用200keV的离子注入机在金刚石膜中进行了二次硼离子注入,第一次注入能量为70keV,第二次注入能量为120keV,获得了硼离子的均匀分布,测试了样品的I-V特性,发现其具有明显的p-n异质结效应.     

Photoluminescence and raman studies of high quality CdTe:I Epilayers

Low-temperature photoluminescence (PL) studies of iodine-doped CdTe epilayers have been performed. A compensating acceptor center which gives rise to deep-level PL emission at 1.491 eV is identified. From selective excitation PL studies, we assign this 1.491 eV line to the recombination of an associate donor-acceptor close pair, consisting of nearest neighbor substitutional sodium and iodine atoms (Na_Cd-I_Te). This neutral defect complex has a localized mode of 36.5 meV, which is much larger than the bulk CdTe lattice mode of 21.3 meV. The electronic energy level associated with this defect is 115 meV below the conduction band. Also, we use a combination of selective excitation PL and Raman spectroscopies to determine the ionization energy of the isolated shallow iodine donor (I_Te) in CdTe. We find that the donor binding energy of this anion-site hydrogenic donor is 15.0 (±0.2) meV.     

In situ monitoring of photovoltaic properties in organic solar cells during thermal annealing

This paper reports a simple and useful technique that monitors the changes of poly(3-hexylthiophene) (P3HT):1-(3-methoxycarbonyl)-propyl-1-phenyl-(6,6)C₆₁-based organic solar cells (OSCs) during thermal annealing in situ. Thermal annealing was divided into five stages in which the variations of the cell parameters were obtained in detail. Annealing temperature that was higher than the glass transition temperature of P3HT (127 °C) was found critical to the improvement of open-circuit voltage. The initial rise of the short-circuit current was explained by in situ monitoring of the transport behaviors of electrons and holes. Finally, in situ monitoring was adopted to compare OSCs that were or were not solvent-annealed, indicating the effectiveness in optimizing, modeling and understanding in depth the effects of the thermal annealing of OSC with a blended active layer.     

Impact of annealing treatment on structural and dc electrical properties of spin coated tungsten trioxide thin films for Si/WO3/Ag junction diode

We report on the effect of the thermal annealing on structural and electrical properties of p-Si/n-WO₃/Ag junction diode. According to the XRD pattern, the WO₃ films exposed that the crystalline phase transformation of monoclinic to orthorhombic structure for an increasing annealing temperature. The SEM images show an abrupt change in the plate like grain growth and surface morphology. From the UV–visible analysis, the band gap energy decreases for the higher annealing temperature. The dc electrical characterization shows that the conductivity (σ_dc), activation energy (E_a) and pre-exponential factor (σ₀) values vary function of temperature. The Si/WO₃/Ag contact junction diode parameters of ideality factor (n), barrier height (Φ_B), leakage current density (J₀) and series resistance (R_s) were examined by the J-V method, Cheung's and Norde functions as a function of annealing temperature according to the thermionic emission method (TE). The values of n and Φ_B decrease with increasing annealing temperature and better the device performance on an optimized annealing temperature at 873 K. The temperature dependent of experimental n and Φ_B revealed the presence of inhomogeneity at WO₃-Ag interface. This behavior is modeled by assuming the existence of Gaussian distribution (GD) of barrier heights in temperature range 303–423 K.     

中性空位引起的本征扩散对硅中注入砷离子在退火过程中再分布的影响

本文对硅中砷扩散系数考虑了中性空位引起的本征扩散项D~0的影响,推导而得出D~0对表面浓度N_s,结深x_j(t)等的影响大约为5-10％。在离子注入退火的解析模型中考虑其影响是有实际意义的。     

Rapid thermal annealing of ion implanted cdte

Rapid thermal annealing of ion implantedn-type CdTe has been investigated. Samples were implanted with 60 keV Ar⁺ and As⁺ ions to a dose of 1 × 10¹⁴ cm⁻² and subjected to anneal sequences of 5-100s at temperatures of 350-650° C. Photoluminescence measurements have indicated that the implantation completely quenches the photoluminescence; however, anneals for only 5s at 350° C are sufficient to recover most of the features of the photoluminescence spectrum to that equivalent of unimplanted material. Luminescence spectral features associated with thermal annealing damage and substitutional As in inferred. Type conversion of the As⁺ implanted layer is observed and it has been shown that good diodes can be made, with the best behaviour resulting from a 5s anneal at 450° C. Research supported by the Natural Sciences and Engineering Research Council of Canada     

HgCdTe光伏器件反常I－V特性分析

对ＨｇＣｄＴｅ光伏器件研制中出现的光电二极管伏安特性反常现象提出了寄生ｐ－ｎ结模型，并以此模型为基点，结合工艺实验对此现象进行了解释和分析。     

用EBIC法观察InSb半导体器件中的p-n结

能够直观地\     

Diffusion of phosphorus in CdTe

The diffusion of phosphorus in CdTe was measured as a function of anneal time and temperature in the temperature range 600–900°C. The diffusion anneals were carried out in evacuated silica capsules mainly with traces of radioactive phosphorus in the capsule along with sufficient cadmium metal to maintain a saturated vapor pressure over the CdTe slice throughout each anneal. The concentration profiles were measured using a radiotracer sectioning technique. Diffusion anneals were carried out also using other conditions, including some with excess tellurium in the capsule in place of the cadmium. The diffusion profiles were single component. The standard erfc function gave satisfactory fits to the profiles which were Fickian in nature except for short anneal times at intermediate temperatures. When the diffusivity was plotted on an Arrhenius graph, a straight line was obtained giving an activation energy of 2.0 eV. The surface concentration at each temperature was independent of time and varied in value between 1.5×10¹⁶ cm⁻³ at 600°C to 1×10¹⁸ cm⁻³ at 900°C. When the results were plotted on an Arrhenius graph, the results gave a straight line with an activation energy of 1.3 eV.     

Characterization of small area laser beam annealing

The structure of small area (∼10 micron diameter) spots produced by Q-switched pulsed laser irradiation of n-type silicon covered by a thin film of sputtered aluminum have been studied. Spatially resolved SIMS analysis has been combined with SEM observations to characterize the resulting microstructure. Careful analysis of the SIMS results indicate the spots display subsurface alloying and deep (∼1 μm) aluminum penetration.     

从多子角度阐述p-n结理论

传统方法在分析p-n结理论时仅仅关注了过剩少子的扩散电流,但是随着其浓度梯度的降低,扩散电流趋于零,则电流的连续性将难以理解。另外,如果仅仅考虑过剩少子的注入,则无法理解"中性区"的电中性(即电中性条件将被破坏)。针对以上矛盾,以基本的器件物理为基础,分析并得到过剩多子必然存在于中性区,且其分布和数量与过剩少子相同,因而过剩多子的扩散电流也参与p-n结的电流输运。在充分考虑过剩多子的基础上,对p-n结的工作机理可以有更好、更深刻的理解。理想二极管方程在一些假设下仅仅考虑了空间电荷区两边过剩少子的扩散电流,提供了一个很巧妙地计算总电流的方法。     

快速热退火温度对纳米晶氢-硅薄膜及其p-n结性能的影响

采用快速热退火(RTA)对热丝化学气相沉积HWCVD制 备的非晶氢-硅(a-Si:H)薄膜进行晶化处理,并在此基础上制备了 纳米晶氢-硅(nc-Si:H)薄膜p-n结。利用拉曼(Raman)光谱、X射线衍射(XRD)、 扫描电子显微镜(SEM)和分光光 度计研究了所制备(nc-Si:H)薄膜的结构、光学性能与退火温度的关系;同时, 研究了不同RTA条 件下制备p-n结的整流特性随温度变化的规律。研究发现,随RTA温度由700℃升高至 1100℃,薄膜的晶化率由46.3%提高到96%,拉曼峰半高宽(FWHM)由19.7cm－1降低至7. 1cm－1。当退火 温度为700℃时,薄膜的XRD谱中只有一个较弱的Si(111)峰;当退火 温度高于900 ℃时,薄膜 的XRD谱中除Si(111)峰外,还出现了Si(220)、Si(311)峰。同时,随退火温度的升高,薄膜 的禁 带宽度由1.68eV升高至2.05eV。由于禁带宽 度的增加,相应的p-n结最高工作温度也由180℃升高至300℃。     

Growth and optical characterization of strained CdZnTe/ CdTe quantum wells

We have grown strained Cd_1-xZn_xTe(x ≈ 0.2)/CdTe single and multiple quantum wells by molecular beam epitaxy. GaAs was used as a substrate. The well widths were systematically increased until the critical thickness was exceeded. Low-temperature (liquid helium) photoluminescence (PL) spectroscopy was used to characterize the films. Two prominent PL peaks were observed: one arising from the quantum well and the other from the barrier material. The energy of the quantum well luminescence is consistent with theory when strain is included. The critical layer thickness for the CdTe quantum wells was found to be between 150 and 175 å, in agreement with the model of Matthews and Blakeslee.     

Rapid capless annealing of28Si,64Zn,and9Be implants in GaAs

We report the use of tungsten-halogen lamps for rapid (−10 s) thermal annealing of ion-implanted (100) GaAs under AsH₃/Ar and N₂ atmospheres. Annealing under flowing AsH₃/Ar was carried out without wafer encapsulation. Rapid capless annealing activated implants in GaAs with good mobility and surface morphology. Typical mobilities were 3700–4500 cm²/V-s for n-layers with about 2×10¹⁷cm⁻³ carrier concentration and 50–150 cm²/v-s for 0.1–5xl0¹⁹ cm⁻³ doped p-layers. Rapid thermal annealing was performed in a vertical quartz tube where different gases (N₂, AsH₃/H₂, AsH₃/Ar) can be introduced. Samples were encapsulated with SiO when N₂ was used. Tungsten-halogen lamps of 600 or 1000 W were utilized for annealing GaAs wafers ranging from 1 to 10 cm² in area and 0.025 to 0.040 cm in thickness. The transient temperature at the wafer position was monitored using a fine thermocouple. We carried out experiments for energies of 30 to 200 keV, doses of 2×10¹² to 1×10¹⁵ cm⁻², and peak temperatures ranging from 600 to 1000‡C. Most results quoted are in the 700 to 870‡C temperature range. Data on implant conditions, optimum anneal conditions, electrical characteristics, carrier concentration profiles, and atomic profiles of the implanted layers are described. Presented at the 25th Electronic Materials Conference, Burlington, VT, June 22, 1983.     

窄禁带半导体的P-N结的间接隧道电容

采用通过深能级杂质的间接隧道过程与热激发、俘获过程之间的细致平衡,推导出间接隧道过程所引起的电容的理论表达式.这一电容仅出现在零偏压附近,不是电压的单调上升函数,有极大值及负值出现.作了数值计算,所得 C-V曲线的形状与窄禁带 Hg_(1-x)Cd_xTe P-N结的实测的C-V曲线的形状相似.