Miniaturized dual-band bandpass filter with good frequency selectivity using SIR and DGS

A miniaturized dual-band bandpass filter (BPF) using stepped impedance resonator (SIR) and defected ground structure (DGS) is presented. In order to get two desired passbands, two different transmission paths and source–load cross coupling have been implemented. One path is the SIR, and the other is the DGS. Meanwhile, it is easy to obtain good frequency selectivity by introducing several transmission zeros. The coupling scheme and current distributions are applied to demonstrate the flexible design approach. A dual-band BPF is designed, simulated, and fabricated to demonstrate the performance of the proposed dual-band filter. The measured results show that the fabricated dual-band BPF has two passbands centered at 2.41 and 3.52 GHz with the fractional bandwidth of 5.8 and 7.7%, respectively. The measured insertion loss is about 2 dB and 2.2 dB at the lower and upper passbands. The measured results show good agreement with the simulated ones.     

双频带通滤波器的优化设计

利用阶跃阻抗谐振器优化,设计了一个工作在无线局域网(2.4/5.2GHz)的双频带通滤波器。通过奇、偶模分析,在阶跃阻抗谐振器理论计算公式基础上,根据不同的阻抗比条件,阶跃阻抗谐振器谐振频率比与阶跃阻抗高、低阻抗电长度之比的关系曲线,可以方便地确定阶跃阻抗谐振器的谐振频率和电长度,通过sonnet电路仿真软件验证了设计的合理性,并给出了用于无线通信2.4、5.2 GHz双频带通滤波器的设计结果。该带通滤波器可以分别在2.4、5.2 GHz处得到较好的通带性。由于交叉耦合的存在,该双频带通滤波器在两个通带端各有一个传输零点,以此来提高滤波器的通带频率选择性。最后,测量结果与仿真结果基本吻合。     

3-D-integrated RF and millimeter-wave functions and modules using liquid crystal polymer (LCP) system-on-package technology

Electronics packaging evolution involves system, technology, and material considerations. In this paper, we present a novel three-dimensional (3-D) integration approach for system-on-package (SOP)-based solutions for wireless communication applications. This concept is proposed for the 3-D integration of RF and millimeter (mm) wave embedded functions in front-end modules by means of stacking substrates using liquid crystal polymer (LCP) multilayer and /spl mu/BGA technologies. Characterization and modeling of high-Q RF inductors using LCP is described. A single-input-single-output (SISO) dual-band filter operating at ISM 2.4-2.5 GHz and UNII 5.15-5.85 GHz frequency bands, two dual-polarization 2/spl times/1 antenna arrays operating at 14 and 35 GHz, and a WLAN IEEE 802.11a-compliant compact module (volume of 75/spl times/35/spl times/0.2 mm/sup 3/) have been fabricated on LCP substrate, showing the great potential of the SOP approach for 3-D-integrated RF and mm wave functions and modules.     

基于90nm CMOS工艺的60GHz射频接收前端电路设计

设计了一款用于中国60 GHz标准频段的射频接收前端电路。该射频接收前端采用直接变频结构,将59～64 GHz的微波信号下变频至5～10 GHz的中频信号。射频前端包括一个四级低噪声放大器和电流注入式的吉尔伯特单平衡混频器。LNA设计中考虑了ESD的静电释放路径。后仿真表明,射频接收前端的转换增益为13.5～17.5 dB,双边带噪声因子为6.4～7.8 dB,输入1 dB压缩点为-23 dBm。电路在1.2 V电源电压下功耗仅为38.4 mW。该射频接收前端电路采用IBM 90 nm CMOS工艺设计,芯片面积为0.65 mm2。     

一个双频带可重构的直接变频接收机射频前端

A dual-band reconfigurable wireless receiver RF front-end is presented, which is based on the directconversion principle and consists of a low noise amplifer （LNA） and a down-converter. By utilizing a compact switchable on-chip symmetrical inductor, the RF front-end could be switched between two operation frequency bands without extra die area cost. This RF front-end has been implemented in the 180 nm CMOS process and the measured results show that the front-end could provide a gain of 25 dB and IIP3 of 6 dBm at 2.2 GHz, and a gain of 18.8 dB and IIP3 of 7.3 dBm at 4.5 GHz. The whole front-end consumes 12 mA current at 1.2 V voltage supply for the LNA and 2.1 mA current at 1.8 V for the mixer, with a die area of 1.2 × 1 mm^2.     

Compact and Low Loss Dual-Band Bandpass Filter Using Pseudo-Interdigital Stepped Impedance Resonators for WLANs

In this letter, pseudo-interdigital stepped impedance resonators (PI-SIRs) are used to design the bandpass filter (BPF) with dual-band response. By tuning the impedance ratio (K) and physical length of SIRs, the BPF has good dual-passband performances at 2.4/5.2GHz and high isolation between the two passbands. It is shown that the dual-band BPF has a smaller area and lower insertion loss in comparison of previous works. Good agreement is shown between the full-wave electromagnetic simulation and the measurement     

Design of the Compact Dual-Band Bandpass Filter With High Isolation for GPS/WLAN Applications

In this letter, a novel compact dual-band bandpass filter (BPF) is designed to achieve the characteristic of low insertion loss and high isolation for global position system (GPS)/wireless local area network (WLAN) applications. This BPF is implemented by properly selecting the impedance ratio (R) and physical length ratio $(alpha)$ of the asymmetric stepped-impedance resonator (SIR) with one step discontinuity. The coupling coefficient between the coupled asymmetric SIRs is calculated by using full-wave simulator IE3D. The proposed filter has very good measured characteristics including a low insertion loss of 1.1 dB for both passbands, a high isolation insertion loss of 55 dB between the two passbands and a wide stopband rejection of 38 dB from 2.7 to 5.3 GHz. Good agreement with responses of electromagnetic (EM) simulation and measurement is compared.      

一种3.5 GHz频段双通道射频前端设计

随着5G商用网络的快速建设,国内5G网络测试设备存在大量空缺。为此,设计了一种适用于5G终端模拟器的3.5 GHz频段双通道射频前端。该射频前端结合了ADRV9009芯片,可同时支持双通道收发,具有器件数少、设计复杂度低的特点。实测结果表明,该射频前端性能稳定,接收灵敏度为-85 d Bm,噪声系数小于2.6 dB,256QAM调制下发射信号的误差矢量幅度为1.43%,达到了5G终端模拟器的设计要求。     

Ultra Wideband Bandpass Filter Using Embedded Stepped Impedance Resonators on Multilayer Liquid Crystal Polymer Substrate

This letter proposes an ultra wideband (UWB) bandpass filter (BPF) based on embedded stepped impedance resonators (SIRs). In this study, broad side coupled patches and high impedance microstrip lines are adopted as quasi-lumped elements for realizing the coupling between adjacent SIRs, which are used to suppress stopband harmonic response. An eight-pole UWB BPF is developed from lump-element bandpass prototype and verified by full-wave simulation. The proposed filter is fabricated using multilayer liquid crystal polymer (LCP) process and measured using vector network analyzer. Good agreement between simulated and measured response is observed. The measurement results show that the fabricated filter has a low insertion loss of 0.18 dB at center frequency 6.05 GHz, an ultra wide fractional bandwidth of 127.3% and excellent stopband rejection level higher than 32.01 dB from 10.9 to 18.0 GHz.      

A single-chip dual-band tri-mode CMOS transceiver for IEEE 802.11a/b/g wireless LAN

A single-chip dual-band tri-mode CMOS transceiver that implements the RF and analog front-end for an IEEE 802.11a/b/g wireless LAN is described. The chip is implemented in a 0.25-/spl mu/m CMOS technology and occupies a total silicon area of 23 mm/sup 2/. The IC transmits 9 dBm/8 dBm error vector magnitude (EVM)-compliant output power for a 64-QAM OFDM signal. The overall receiver noise figure is 5.5/4.5 dB at 5 GHz/2.4 GHz. The phase noise is -105 dBc/Hz at a 10-kHz offset and the spurs are below -64 dBc when measured at the 5-GHz transmitter output.     

A 0.7-7 GHz wideband reconfigurable receiver RF front-end in CMOS

In this paper,a 0.7-7 GHz wideband RF receiver front-end SoC is designed using the CMOS process.The front-end is composed of two main blocks:a single-ended wideband low noise amplifier (LNA) and an inphase/quadrature (I/Q) voltage-driven passive mixer with IF amplifiers.Based on a self-biased resistive negative feedback topology,the LNA adopts shunt-peaking inductors and a gate inductor to boost the bandwidth.The passive down-conversion mixer includes two parts:passive switches and IF amplifiers.The measurement results show that the front-end works well at different LO frequencies,and this chip is reconfigurable among 0.7 to 7 GHz by tuning the LO frequency.The measured results under 2.5-GHz LO frequency show that the front-end SoC achieves a maximum conversion gain of 26 dB,a minimum noise figure (NF) of 3.2 dB,with an IF bandwidth of greater than 500 MHz.The chip area is 1.67 × 1.08 mm2.     

基于LTCC技术的WLAN射频前端的研制

采用低温共烧陶瓷(LTCC)集成技术,设计和制作了具有立体化新型结构的无线局域网(WLAN)射频前端,并对制得的产品模块进行了测试。结果表明:采用LTCC技术制得的WLAN射频前端的外形尺寸仅为29 mm×18 mm×5 mm,远小于传统同类型WLAN射频前端的尺寸。在2.4～2.5 GHz的工作频率范围内,所制WLAN射频前端的最大输出功率为27 dBm,噪声系数小于1.7 dB,接收增益大于15 dB,发射增益大于20 dB。     

一个应用于卫星导航接收机的低功耗可配置双频多模射频前端

本文给出了一个应用于GPS、北斗、伽利略和Glonass四种卫星导航接收机的高性能双频多模射频前端。该射频前端主要包括有可配置的低噪声放大器、宽带有源单转双电路、高线性度的混频器和带隙基准电路。详细分析了寄生电容对源极电感负反馈低噪声放大器输入匹配的影响,通过在输入端使用两个不同的LC匹配网络和输出端使用开关电容的方法使低噪声放大器可以工作在1.2GHz和1.5GHz频带。同时使用混联的有源单转双电路在较大的带宽下仍能获得较好的平衡度。另外,混频器采用MGTR技术在低功耗的条件下来获得较高的线性度,并不恶化电路的其他性能。测试结果表明：在1227.6MHz和1557.42MHz频率下,噪声系数分别为2.1dB和2.0dB,增益分别为33.9dB和33.8dB,输入1dB压缩点分别0dBm和1dBm,在1.8V电源电压下功耗为16mW。     

Balanced Dual-Band BPF With Stub-Loaded SIRs for Common-Mode Suppression

A new fourth-order balanced dual-band band-pass filter (BPF) designed using four coupled bi-section half-wavelength ( $lambda /2$) stepped-impedance resonators (SIRs) is presented. To obtain the required differential-mode (DM) operation with suppressed common-mode (CM) transmission, the SIRs were designed to have the same odd-mode, but different even-mode, resonant frequencies. For that purpose, the two inner SIRs were loaded at the center with T-shaped open stubs of different dimensions so that their even-mode resonant frequencies are shifted away from those of the outer SIRs and that their odd-mode ones remain almost intact. For the fabricated prototype BPF, the measured minimum DM insertion losses for the first and second bands are 2.4 and 2.82 dB, respectively, whereas the measured CM insertion loss is larger than 25 dB in 1–7 GHz.      

Dual-band RF receiver for GPS-L1 and compass-B1 in a 55-nm CMOS

A fully integrated dual-band RF receiver with a low-IF architecture is designed and implemented for GPS-L 1 and Compass-Bl in a 55-nm CMOS process. The receiver incorporates two independent IF channels with 2 or 4 MHz bandwidth to receive dual-band signals around 1.57 GHz respectively. By implementing a flexible frequency plan, the RF front-end and frequency synthesizer are shared for the dual-band operation to save power consumption and chip area, as well as avoiding LO crosstalk. A digital automatic gain control （AGC） loop is utilized to improve the receiver＇s robustness by optimizing the conversion gain of the analog-to-digital converter （ADC）. While drawing about 20 mA per channel from a 1.2 V supply, this RF receiver achieves a minimum noise figure （NF） of about 1.8 dB, an image rejection （IMR） of more than 35 dB, a maximum voltage gain of about 122 dB, a gain dynamic range of 82 dB, and an maximum input-referred 1 dB compression point of about -36.5 dBm with an active die area of 1.5 × 1.4 mm2 for the whole chip.     

一种S波段LTCC带通滤波器的改进设计

设计了一种小型化的低温共烧陶瓷(LTCC)滤波器,该滤波器电路由电容耦合的二阶谐振腔组成。设计了该滤波器的三维多层结构,利用组件间的耦合效应,产生一个传输零点,提高了滤波器性能。仿真结果表明,该滤波器中心频率为3.41GHz,相对带宽为5.9%(200MHz),体积为3.8mm×2.8mm×0.8mm,在S波段的通讯,雷达等射频系统有广泛的应用。     

应用于GSM/EDGE零中频接收机的CMOS射频前端

介绍了一个零中频接收机CMOS射频前端,适用于双带(900MHz/1800 MHz)GSM/EDGE;E系统.射频前端由两个独立的低噪声放大器和正交混频器组成,并且为了降低闪烁噪声采用了电流模式无源混频器.该电路采用0.13 μm CMOS工艺流片,芯片面积为0.9 mm×1.0 mm.芯片测试结果表明:射频前端在90...     

应用于S波段AESA的射频收发前端设计

采用0．18μm Si RFCMOS工艺设计了应用于s波段AESA的高集成度射频收发前端芯片。系统由发射与接收前端组成,包括低噪声放大器、混频器、可变增益放大器、驱动放大器和带隙基准电路。后仿真结果表明,在3．3V电源电压下,发射前端工作电流为85mA,输出ldB压缩点为5．0dBm,射频输出在2～3．5GHz频带内电压增益为6．3～9．2dB,噪声系数小于14．5dB;接收前端工作电流为50mA,输入1dB压缩点为-5．6dBm,射频输入在2～3．5GHz频带内电压增益为12—14．5dB,噪声系数小于11dB;所有端口电压驻波比均小于1．8：芯片面积1．8×2．6mm0。     

Monolithic InGaP-GaAs HBT receiver front-end with 6 mW DC power consumption for 5 GHz band WLAN applications

A very low power consumption (6 mW) 5 GHz band receiver front-end using InGaP-GaAs HBT technology is reported. The receiver front-end is composed of a cascode low noise amplifier followed by a double-balanced mixer with the RF transconductor stage placed above the Gilbert quad for direct-coupled connection. The RF band of this receiver front-end is set to be 5.2 GHz, being downconverted to 1 GHz IF frequency. Input-return-loss (S/sub 11/) in RF port smaller than -12 dB and excellent power-conversion-gain of 35.4 dB are achieved. Input 1 dB compression point (P/sub 1dB/) and input third-order intercept point (IIP3) of -24 and -3 dBm, respectively, are also achieved.     

五位RF MEMS开关延迟线移相器

设计并研制了一种6～11GHz、超宽带5位RF MEMS开关延迟线移相器,器件实现了5位延迟:λ、2λ、4λ、8λ、16λ。该器件采用微带混合介质多层板技术,分4层制作,尺寸为45mm×20 mm。整个器件包括20个RFMEMS悬臂梁开关,用60～75V的静电压驱动。6～11GHz频带内,对32个相移态的测试结果表明:一般回波损耗S11<-10dB,各状态平均插入损耗为-8～-10dB;中心频率处,器件可实现的最大延迟位时延为1680ps,总时延为3255ps。