Aberration evaluation of alignment optics in lithographic tools by use of a step-height structure highly sensitive to the asymmetry of an optical image

To satisfy the increasing demand for extremely tight overlay accuracy in semiconductor manufacturing processes, all the measurement error factors in alignment systems and overlay measurement tools need be identified and eliminated. The principle of most alignment systems is based on image processing of target marks on the wafer under bright-field illumination. Although the phenomenon that the sensitivity to the alignment error varies with the step height (SH) of the mark has been known and used for evaluating the performance of the alignment optics, no investigation has been made into the origin and the physical mechanism of the phenomenon. We propose a simplified optical model that can account for the origin of the asymmetric image and clarify its relation to the SHs. The model is validated with simulation and experimental results. The improved performance of an alignment system using marks with optimally designed SHs is demonstrated.     

一种长基线中野值点判定、剔除及修正方法

为准确获取水下目标的位置和速度信息,需要对长基线定位中的野值点进行剔除和修正。提出了改进残差检测法用于对野值点的剔除和修正,以卡尔曼滤波的残差绝对值作为判别标准,对野值点进行判别和剔除,以调整后的卡尔曼滤波估计值作为野值点的修正值,针对滤波模型与实际运动不匹配导致滤波前后数据偏差较大的问题,选择对正常点的数据不做处理。湖上实验结果表明,对存在野值点的定位轨迹,未剔除野值点的定位均方根误差为55.68 m,使用残差检测法处理后的定位均方根误差为8.11 m,使用改进残差检测法处理后的定位均方根误差为2.04 m。改进残差检测法可以对长基线定位轨迹中的野值点进行判定、剔除和修正,减小定位误差,提升长基线系统定位精度。     

System for enhancing supply chain agility through exception handling

With the emergence of a new business era characterized by continuous and unpredictable changes and tough global competition, an agile supply chain has been recognized as a competitive strategy for companies to survive and prosper. Co-OPERATE, an on-going IST project, is aimed at developing concepts and tools for coordination of production planning and control activities in the complex and distributed supply network, and is targeted in the automotive supply and the semiconductor industries. Since the work reported here is based on the project, a framework for manufacturing coordination in the distributed supply network is proposed for the project. As an important part of the project, exception handling is further described. First, through boundary investigation, the scope of this business solution is clarified. Second, a methodology is developed to help understand the mechanism behind the exception handling process. Third, guiding design principles are described to direct the detailed business process design. Finally, rush-order handling is chosen as part of the concept prototype for implementation and evaluation. Extensive feedback from industrial business partners has been collected and taken into account for further implementation.     

Sub-20-nm alignment in nanoimprint lithography using Moiré fringe

Accurate multi-level overlay capability for nanoimprint lithography (NIL) is essential to integrated circuit manufacturing and other multilayer imprint applications. Using the "beat" grating image (Moiré fringe) generated by overlaying two sets of gratings that have slightly different periods, we obtained an alignment signal with a sensitivity better than 10 nm in nanoimprint lithography. The alignment signal is, as expected, independent of the size of the gap between the wafer and the imprint mold. We achieved a single-point overlay accuracy (error distribution) of sub-20 nm between the first and second imprinted layers by using two sets of Moiré fringes. With higher precision nanopositioning stages, better single-point alignment accuracy is expected. Furthermore, we achieved sub-150 nm alignment over an area of 1 sq in and sub-250 nm over the entire area of a 4 in wafer using simple low-resolution stages without temperature control or wafer-mold mismatch compensation. With better stages, precision temperature control, and wafer-mold mismatch compensation, we believe that much higher overlay alignment accuracy over large areas (either in a 1 sq in die or a full wafer) is feasible.     

A machine learning approach to yield management in semiconductor manufacturing

Yield improvement is one of the most important topics in semiconductor manufacturing. Traditional statistical methods are no longer feasible nor efficient, if possible, in analysing the vast amounts of data in a modern semiconductor manufacturing process. For instance, a typical wafer fabrication process has more than 1000 process parameters to record on a single wafer and one manufacturing plant may produce tens of thousands wafers a day. Traditional approaches have limits in extracting the full benefits of the data. Therefore, the manufacturing data is poorly exploited even in the most sophisticated processes. Now it is widely accepted that machine learning techniques can provide powerful tools for continuous quality improvement in a large and complex process such as semiconductor manufacturing. In this work, memory based reasoning (MBR) and neural network (NN) learning are combined for yield improvement and an integrated framework is proposed for a yield management system based on hybrid machine learning techniques. In this hybrid system of NN and MBR, the feature weight set which is calculated from the trained neural network plays the core role in connecting both learning strategies and the explanation on prediction can be given by obtaining and presenting the most similar examples from the case base. The proposed system has advantages in typical semiconductor manufacturing problems such as scalability to large datasets, high dimensions and adaptability to dynamic situations.     

Sequential Monte Carlo-based fidelity selection in dynamic-data-driven adaptive multi-scale simulations

In a simulation-based planning and control framework, timely monitoring, analysis, and control is important not to disrupt a dynamically changing system. To meet this temporal requirement, a dynamic-data-driven adaptive multi-scale simulation (DDDAMS) paradigm was proposed earlier, where the fidelity of a complex simulation model adapts to available computational resources by incorporating dynamic data into the executing model, which then steers the measurement process for selective data update. In this work, a sequential Monte Carlo method (sequential Bayesian inference technique) is proposed and embedded into the simulation to enable its ideal fidelity selection given massive datasets under the DDDAMS framework. As dynamic information becomes available, the proposed method makes efficient inferences to determine the sources of abnormality in the system (a shop floor in this paper). A parallelisation framework is also discussed to further reduce the number of data accesses while maintaining the accuracy of parameter estimates. A prototype DDDAMS involving the proposed algorithm has been implemented successfully for preventive maintenance scheduling and part routing scheduling in a semiconductor manufacturing supply chain, reducing the average waiting time of batches and increasing the machine utilisation significantly.     

A unified approach on residuals,leverages and outliers in the linear mixed model

Although the linear mixed model can be viewed as a direct extension of multiple regression, it is not obvious how to generalize the standard diagnostic tools such as residual analysis and detection of leverage points and outliers, which are available in the linear regression situation. A unified approach to residuals, leverages and outliers in the linear mixed model is developed. Formal and informal procedures are proposed to display the general features of residuals and leverages in order to detect outliers and high-leverage points in the linear mixed models. The relationship between the best linear unbiased predictor (BLUP) and residuals is established. Some properties of BLUPs are formulated and their use in detecting outlying observations are investigated.      

小型微纳米图形电子束曝光制作系统(英文)

为了满足科学实验过程中对制作半导体器件和微纳米结构的需要,同时避免受到昂贵的工业级电子束曝光(electron beam lithography,EBL)机的条件制约,构建了一种基于普通扫描电子显微镜(scanning electron microsco-py,SEM)的桌面级小型电子束曝光系统.建立了以浮点DSP为控制核心的高速图形发生器硬件系统.利用线性计算方法实现了电子束曝光场的增益、旋转和位移的校正算法.在本曝光系统中应用了新型压电陶瓷电机驱动的精密位移台来实现纳米级定位.利用此位移台所具有的纳米定位能力,采用标记追逐法实现了电子束曝光场尺寸和形状的校准.电子束曝光实验结果表明,场拼接及套刻精度误差小于100 nm.为了测试曝光分辨率,在PMMA抗蚀剂上完成了宽度为30 nm的密集线条曝光实验.利用此系统,在负胶SU8和双层PMMA胶表面进行了曝光实验;并通过电子束拼接和套刻工艺实现了氮化物相变存储器微电极的电子束曝光工艺.     

A model-based clustering approach to the recognition of the spatial defect patterns produced during semiconductor fabrication

Defects on semiconductor wafers tend to cluster and the spatial defect patterns of these defect clusters contain valuable information about potential problems in the manufacturing processes. This study proposes a model-based clustering algorithm for automatic spatial defect recognition on semiconductor wafers. A mixture model is proposed to model the distributions of defects on wafer surfaces. The proposed algorithm can find the number of defect clusters and identify the pattern of each cluster automatically. It is capable of detecting defect clusters with linear patterns, curvilinear patterns and ellipsoidal patterns. Promising results have been obtained from simulation studies.     

The Use of Ozone in Advanced Chip Manufacturing.

Ozonized Water Generator has been developed for use in semiconductor manufacturing processes. The use of ozonized water produced with this system permits effective wafer cleaning at room temperature. It is this possible to dispense with RCA cleaning that requires high temperatures and highly concentrated chemicals. Ozonized water has a promising application potential not only in the semiconductor industry but also in the liquid crystal display industry.     

Effective vehicle dispatching method minimising the blocking and delivery times in automatic material handling systems of 300 mm semiconductor fabrication

This paper proposes an efficient vehicle dispatching rule which minimises the vehicle blocking and delivery times in automatic material handling systems of 300 mm semiconductor manufacturing. In order to evaluate the performance of the proposed dispatching method, discrete event simulation models were developed. The results show that the proposed method has a significant impact on average delivery time, throughput and vehicle utilisation. In particular, it reduces the variance of the delivery time remarkably.     

On the computation of semiconductor device current characteristics by finite difference methods

Summary An analysis is presented of the error in numerical approximations to a system of elliptic equations describing the steady-state distribution of mobile carriers in a semiconductor device. Although this system has been extensively studied by finite difference methods, the accuracy of the numerical methods employed has not been previously established. Computation schemes are presented for which suitable error estimates are obtained, without assuming an unreasonably small mesh size. In addition, for the one-dimensional problem, the effect of the inexact solution of the discrete equations is estimated.     

Optimization of sensing parameters for a confocal signal-based wavefront corrector in microscopy

The accuracy of a confocal signal-based wavefront corrector depends on several parameters such as spatial variation of optical properties within the specimen, aberration magnitude and composition, time required for the correction, etc. Here, a numerical analysis has been performed with the aim to improve system performance. The goal of the search algorithm in a confocal signal-based wavefront corrector is to estimate the Zernike coefficients of the aberrations. High-magnitude aberrations show low Strehl ratios. Repeating the correction process results in higher Strehl ratios, but at the cost of increased time. An in-focus on-axis specimen results in higher Strehl ratio compared to an out-of-focus and off-optical-axis specimen. For all cases, the wavefront correction accuracy is better, when the diameter of the pinhole is chosen to be equal to that of the Airy disk. The lower limit on the pinhole size for detecting small magnitude aberrations is set by noise.     

A performance analytical model of automated material handling system for semiconductor wafer fabrication system

To effectively analyse and evaluate the performances of closed-loop automated material handling system (AMHS) with shortcut and blocking in semiconductor wafer fabrication system, a modified Markov chain model (MMCM) has been proposed. The system characteristics, such as vehicle blockage and system’s shortcut configuration, are well considered in the MMCM. The state space explosion problem and computational challenge due to the increase of AMHS scale can be effectively eliminated. With production data from Interbay material handling system of a 300-mm semiconductor wafer fabrication line, the proposed MMCM is compared with simulation analysis model. The results demonstrate that the proposed MMCM is an effective modelling methodology for AMHS’s performance analysis at system design stage.     

Lean-pull strategy in a re-entrant manufacturing environment: a pilot study for TFT-LCD array manufacturing

The increase of a panel's size in thin film transistor – liquid crystal display (TFT-LCD), results in an increase in stock space and increased cost from work-in-process (WIP). This paper proposes a lean-pull strategy, combining buffers with CONWIP (CONstant work-in-process), which results in shared resources to a re-entrant process in TFT-LCD manufacturing. The buffer size and CONWIP levels are the decision variables and are solved by simulation optimisation. The proposed procedure is applied to a factory that manufactures TFT-LCD. The study shows that the proposed lean-pull strategy can reduce the cycle time and achieve a reduction of 34.57% in WIP. The automated material handling systems (AMHS) stocker utilisation can be reduced from 62.13% to 18.49% without additional investment or facilities. Sensitivity analysis indicates the maximum daily throughput will achieve over 10% improvement. The empirical results from this pilot study provide useful managerial insights for the production control of array manufacturing.     

Analysing semiconductor manufacturing big data for root cause detection of excursion for yield enhancement

With the shrinking feature size of integrated circuits driven by continuous technology migrations for wafer fabrication, the control of tightening critical dimensions is critical for yield enhancement, while physical failure analysis is increasingly difficult. In particular, the yield ramp up stage for implementing new technology node involves new production processes, unstable machine configurations, big data with multiple co-linearity and high dimensionality that can hardly rely on previous experience for detecting root causes. This research aims to propose a novel data-driven approach for Analysing semiconductor manufacturing big data for low yield (namely, excursions) diagnosis to detect process root causes for yield enhancement. The proposed approach has shown practical viability to efficiently detect possible root causes of excursion to reduce the trouble shooting time and improve the production yield effectively.     

Part dimension deviation control in batch manufacturing process for monitoring error sources

In a batch manufacturing process a cross-correlation exists among dimension deviations of different parts. The modelling and control of these deviations are essential to improve product dimension quality. Traditional dimension deviation statistical control methods have been focused on retrospectively analysing part dimension feature, while based on the spatial relationship between part dimensional features and error sources showed in part dimension error propagation model, this paper presents a method to control part dimension deviation in batch manufacturing that focuses on error sources. At each operation, total part deviation is separated into three components corresponding to three error sources. Therefore, a multivariate exponentially weighted moving average (MEWMA) chart for error sources is proposed to control part dimension deviations with identified error sources attribute to part dimension deviation. Efficiency and reliability of this model were verified by simulation analysis in common error source abnormal patterns, and the model is proved to be effective for detecting small deviations in a batch manufacturing process.     

Combining on-line experiment and process control methods for changes in a dynamic model

During the past decade, a variety of ‘run-to-run’ (R2R) control schemes have been proposed and investigated extensively using various semiconductor manufacturing methods. However, such control has a problem when it is suddenly faced with a larger process change that does not satisfy the control requirements. In view of this situation, a new process control framework is proposed, which integrates response surface modelling, evolutionary operation (EVOP) and R2R control principles. The primary objective of this study is to improve dynamic model parameter prediction, enabling more effective optimized recipe calculations. The recursive least squares (RLS) algorithm is used to evaluate changes in the process parameters. If the evaluated parameter values exceed a joint parameter threshold, the recipe moves to a new optimum point. This movement, which continuously applies the design of experiment (DOE) concepts to collect process data in the experimental range, uses this data with the least squares error (LSE) method to estimate the new model parameters. Then, the renewed model applies the minimized total cost principle (the cost function structure includes an expected off-target and controllable factors adjustment) and uses the Broyden–Fletcher–Goldfarb–Shanno (BFGS) algorithm to obtain a recipe for the next period. Simulation studies show that the proposed system has better control performance than the traditional self-tuning controller. In the relevant chemical mechanical planarization (CMP) application of semiconductor manufacturing, one critical chip fabrication step is also used to illustrate the proposed control procedure in a dynamic process.     

Fuzzy neural network based yield prediction model for semiconductor manufacturing system

Accurate die yield prediction is very useful for improving yield, decreasing cost and maintaining good relationships with customers in the semiconductor manufacturing industry. To improve prediction accuracy of die yield, a novel fuzzy neural networks based yield prediction model is proposed in which the impact factors of yield and critical electrical test parameters are considered simultaneously and are taken as independent variables. The mapping between these independent variables and yield is constructed in the fuzzy neural network (FNN). The lineal regression between FNN-based yield predicting output and actual yield demonstrates the effectiveness of the proposed approach by historical experimental data of semiconductor fabrication line in Shanghai. The comparison experiment verifies the proposed yield prediction method improves on three traditional yield prediction methods with respect to prediction accuracy.     

Finding Bad Values in Factorial Designs—Revisited

An outlier in an unreplicated factorial experiment is difficult to detect, and its presence reduces the power for detecting significant effects. This poses a problem for data analysts since methods for detecting outliers and testing effects in the presence of outliers are not available in popular statistical software. In this article we compare three methods that have been proposed in the literature for detecting outliers and testing effects for significance in the presence of an outlier. We illustrate the methods with data from a real experiment, comment on the ease of implementing them in standard statistical packages, and use a simulation study to compare their performance over a wider range of circumstances. We make recommendations about when each method should be used in practice.