A 1-V RF-CMOS LNA design utilizing the technique of capacitive feedback matching network

In this paper, a CMOS low-noise amplifier (LNA) with a new input matching topology has been proposed, analyzed and measured. The input matching network is designed through the technique of capacitive feedback matching network. The proposed LNA which is implemented in a technology is operated at the frequency of 12.8 GHz. It has a gain S21 of 13.2 dB, a noise figure (NF) of 4.57 dB and an NF_min of 4.46 dB. The reverse isolation S12 of the LNA can achieve and the input and output return losses are better than . The input 1-dB compression point is and IIP3 is . This LNA drains 10 mA from the supply voltage of 1 V.     

Low-voltage nanopower clock generator for RFID applications

The design of an on-chip RC-based oscillator, implemented in a standard BiCMOS process, without any external component, is presented. The proposed oscillator provides a clock signal at a frequency of 50 kHz with a temperature coefficient smaller than 0.3%/^°C over a temperature range from 0 to , without any external trimming. The proposed oscillator operates with a supply voltage of 0.8 V and has a power consumption of at room temperature. The chip area is .     

Ionic outgassing from photoacid generators upon irradiation at 13.5 nm

Photoresist outgassing is considered a possible source of contamination of optics in extreme ultraviolet (EUV) lithography at 13.5 nm. We measured the relative proportions of ionic outgassing from 18 commercially available photoacid generators (PAG), which is a key component of chemically amplified photoresists, upon irradiation at 13.5 nm. These PAG include 17 triarylsulfonium or diaryliodonium salts, which contain or as the anion, and one PAG of molecular type. The overall outgassed ions in the range 10-200 u were counted in relative proportions. Outgassing of F⁺ is found to be dominant, and for most PAG the extent of F⁺ outgassing shows a satisfactory correlation with the ratio of F atomic photoabsorption to the overall PAG photoabsorption. Outgassed ions F⁺, CF⁺, and from PAG containing the anion and additional such as , and from those containing are identified. Triphenylsulfonium perfluoro-1-butanesulfonate is one PAG to emit the most abundant F⁺ and total ionic fragments, and a PAG of molecular type (N-hydroxy-5-norbornene-2,3-dicarboximide perfluoro-1-butanesulfonate) also emits abundantly both hydrocarbon ions and F⁺. Ionic outgassing of PAG cations includes (C₆H₅)₂S⁺ from R(C₆H₅)₂S⁺ salts and I⁺ from diaryliodonium salts. For PAG containing t-C₄H₉, significantly less F⁺ outgassing is observed; additional outgassing pathways are proposed. The pressure rise caused by PAG shows no dependence on the anion identity, but is correlated with cation photoabsorption, and ascribed to neutral aryl outgassing. Other minor outgassing species include from sulfonates; and ‘photostable’ PAH cations are identified for the first time and provide evidence of concurrent outgassing from, and polymerization of, PAG upon irradiation at 13.5 nm.     

High-mobility pentacene thin-film transistors with copolymer-gate dielectric

Pentacene thin-film transistors have been obtained using polymethyl-methacrylate-co-glyciclyl-methacrylate (PMMA-GMA) as the gate dielectric. The optimum active layer thickness in thin-film transistors (OTFTs) was investigated. The present devices show a wide operation voltage range. The on/off current ratio is as high as 10⁵. In linear region (), the field-effect mobility of device increases with the increase in gate field at low-voltage region (), and a mobility of 0.33 cm²/V s can be obtained when . In saturation region, the mobility increases linearly with the gate field, and a high mobility of 1.14 cm²/V s can be obtained at . The influence of voltage on mobility of device was investigated.     

A high precision low dropout regulator with nested feedback loops

A high precision low dropout regulator (LDO) with nested feedback loops is proposed in this paper. By nesting a zero-tracking compensation loop inside of the negative feedback loop comprising an error amplifier, the independence of off-chip capacitor and effective series resistance (ESR) is ensured for different load currents and operating voltages. This circuit is designed and fabricated using a standard CMOS process. The die area is a . The measurement results show that the total error of the output voltage caused by line and load variations is less than ±3% in low quiescent current (Iddq) or low voltage scenarios. Besides, the smallest dropout of the LDO, 0.11 V, while the output current is 165 mA, the output load is and 20 in parallel.     

Self-aligned In0.49Ga0.51P/GaAs HBT DC and RF characteristics related with orientations

A self-aligned InGaP/GaAs HBT DC and RF characteristics related with orientations were studied. The DC current gain was greater for the [0 1 1] emitter orientation compared to orientation. However, it also showed slightly better RF performance for orientation with a cutoff frequency f_T 69 GHz compared to the f_T of 62 GHz for the [0 1 1] orientation. This experimental work has been proposed that the dependence of the characteristics could be attributed to both piezoelectric effect and the difference between lateral etched profiles in different directions.     

Properties of wurtzite GaN MESFETs studied by two-dimensional full band Monte Carlo approach

The properties of a GaN Metal-Semiconductor Field Effect Transistor were studied based on two-dimensional full band Monte Carlo simulations. The dependences of the distributions of the electric potential, electron concentration, electric field, drift velocity, and average electron energy on the gate-source voltage (V_GS) and drain-source voltage (V_DS) were obtained, then the characteristics of the drain current (I_DS) versus the drain-source voltage (V_DS) and the transconductance (G_m) versus V_GS characteristics were determined. At and I_DS is 5.03 A/cm, which is higher value. The G_m−V_GS curve shows bell shaped and the maximum G_m is 112 ms/mm at and The current gain cutoff frequency (f_T) is 98 GHz at and      

A CMOS image sensor with light-controlled oscillating pixels for an investigative optobionic retinal prosthesis system

This paper presents a high-dynamic range CMOS image sensor architecture incorporating light-controlled oscillating pixels which can act as front-end for an investigative optobionic retinal prosthesis research effort. Each pixel acts as an independent oscillator, whose frequency is proportional to the local light intensity. A 9×9 pixel array has been fabricated in the AMS CMOS opto process. Each pixel's area amounts to , each pixel photodiode area is while the array occupies . Measured results show that the sensor can achieve a linear optical dynamic range of 80 dB (from 0.24 Hz to 2.2 kHz). Its linear electrical dynamic range exceeds 134 dB (from 100 mHz to 502 kHz). The nominal power dissipation is about 50 nW per pixel.     

A mixed-signal demodulator for a low-complexity IR-UWB receiver: Methodology, simulation and design

This works presents an integrated CMOS 2-PPM demodulator based on a switched capacitor network for an energy detection impulse-radio UWB receiver. The circuit has been designed using a top-down methodology that allows to discover the impact of low-level non-idealities on system-level performance. Through the use of a mixed-signal simulation environment, performance figures have been obtained which helped evaluate the influence at system level of the non-idealities of the most critical block. Results show that the circuit allows the replacement of the ADC typically employed in energy detection receivers and provides about infinite equivalent quantization resolution. The demodulator achieves 190 pJ/bit at 1.8 V.     

YBCO superconducting tapes by melt-annealing method on metallic Ni%5W substrates

Superconducting tapes of YBCO-123 were produced by melt-annealing method on metallic Ni%5W substrates. YBCO thick films of about thick were deposited on Ni%5W tapes previously CeO₂ coated using different thermal treatments. A final architecture of the tapes like Ni%5W/CeO₂/YBCO/Au-Pd was achieved.Critical temperatures (T_c) of the superconducting tapes around 89 K and critical current densities (J_c) of at 77 K and were determined by resistive methods. All the samples displayed a granular character and the crystalline structure of the superconducting YBCO-123 with and preferential orientation along the c-axis as determined by SEM and XRD analysis, respectively. Both grain sizes and c-axis orientation are dependent of the thermal treatments.     

On VLSI design of rank-order filtering using DCRAM architecture

This paper addresses on VLSI design of rank-order filtering (ROF) with a maskable memory for real-time speech and image processing applications. Based on a generic bit-sliced ROF algorithm, the proposed design uses a special-defined memory, called the dual-cell random-access memory (DCRAM), to realize major operations of ROF: threshold decomposition and polarization. Using the memory-oriented architecture, the proposed ROF processor can benefit from high flexibility, low cost and high speed. The DCRAM can perform the bit-sliced read, partial write, and pipelined processing. The bit-sliced read and partial write are driven by maskable registers. With recursive execution of the bit-slicing read and partial write, the DCRAM can effectively realize ROF in terms of cost and speed. The proposed design has been implemented using TSMC 1P6M technology. As shown in the result of physical implementation, the core size is and the VLSI implementation of ROF can operate at 256 MHz for 1.8 V supply.     

A low-power 2 GHz data conversion using delta modulation for portable application

This paper describes a new bandpass delta modulator dedicated to low-power and portable applications. The proposed modulator can convert a wide range of frequency, 500 MHz to 2.6 GHz, into an IF as low as 20 MHz by using under-sampling. Design issues in excess loop delay, linearity, and high frequency operation are discussed and some circuit solutions are proposed for a continuous-time modulator. Simulation and experimental results obtained using CMOS IBM technology are presented and discussed. Total power consumption is 37.2 mW when the voltage supply is 1.2 V.     

A sub 1 V high PSRR CMOS bandgap voltage reference

A Bandgap circuit capable of generating a reference voltage of less than 1 V with high PSRR and low temperature sensitivity is proposed. High PSRR achieved by means of an improved current mode regulator which isolates the bandgap voltage from the variations and the noise of the power supply. A vigorous analytical approach is presented to provide a universal design guideline. The analysis unveils the sensitivity of the circuit characteristic to device parameters. The proposed circuit is fabricated in a CMOS technology and operates down to a supply voltage of 1.2 V. The circuit yields 20 ppm/°C of temperature coefficient in typical case and 50 ppm/°C of temperature coefficient in worst case over temperature range −40 to 140°C, 60 ppm/V of supply voltage dependence and 60 dB PSRR at 1 MHz without trimming or extra circuits for the curvature compensation. The entire circuit occupies 0.027 mm² of die area and consumes from a 1.2 V supply voltage at room temperature. Twenty chips are tested to show the robustness of the topology and the measurement results are compared with Monte Carlo simulation and analysis.