Effect of AlN buffer thickness on GaN epilayer grown on Si(1 1 1)

We studied the influence of high temperature AlN buffer thickness on the property of GaN film on Si (1 1 1) substrate. Samples were grown by metal organic chemical vapor deposition. Optical microscopy, atomic force microscopy and X-ray diffraction were employed to characterize the samples. The results demonstrated that thickness of high temperature AlN buffer prominently influenced the morphology and the crystal quality of GaN epilayer. The optimized thickness of the AlN buffer is found to be about 150 nm. Under the optimized thickness, the largest crack-free range of GaN film is 10 mm×10 mm and the full width at half maximum of GaN (0 0 0 2) rocking curve peak is 621.7 arcsec. Using high temperature AlN/AlGaN multibuffer combined with AlN/GaN superlattices interlayer we have obtained 2 μm crack-free GaN epilayer on 2 in Si (1 1 1) substrates.     

Growth and fabrication of AlGaN/GaN HEMT based on Si(1 1 1) substrates by MOCVD

AlGaN/GaN high electron mobility transistor (HEMT) hetero-structures were grown on the 2-in Si (1 1 1) substrate using metal-organic chemical vapor deposition (MOCVD). Low-temperature (LT) AlN layers were inserted to relieve the tension stress during the growth of GaN epilayers. The grown AlGaN/GaN HEMT samples exhibited a maximum crack-free area of 8 mm×5 mm, XRD GaN (0 0 0 2) full-width at half-maximum (FWHM) of 661 arcsec and surface roughness of 0.377 nm. The device with a gate length of 1.4 μm and a gate width of 60 μm demonstrated maximum drain current density of 304 mA/mm, transconductance of 124 mS/mm and reverse gate leakage current of 0.76 μA/mm at the gate voltage of −10 V.     

Effect of AlN buffer layer thickness on the properties of GaN films grown by pulsed laser deposition

The GaN films are grown by pulsed laser deposition (PLD) on sapphire, AlN(30 nm)/Al₂O₃ and AlN(150 nm)/Al₂O₃, respectively. The effect of AlN buffer layer thickness on the properties of GaN films grown by PLD is investigated systematically. The characterizations reveal that as AlN buffer layer thickness increases, the surface root-mean-square (RMS) roughness of GaN film decreases from 11.5 nm to 2.3 nm, while the FWHM value of GaN film rises up from 20.28 arcmin to 84.6 arcmin and then drops to 31.8 arcmin. These results are different from the GaN films deposited by metal organic chemical vapor deposition (MOCVD) with AlN buffer layers, which shows the improvement of crystalline qualities and surface morphologies with the thickening of AlN buffer layer. The mechanism of the effect of AlN buffer layer on the growth of GaN films by PLD is hence proposed.     

AlN成核层厚度对Si上外延GaN的影响

采用低温AlN成核层,在Si(111)衬底上,用金属有机化学气相沉积(MOCVD)法生长了GaN薄膜。采用高分辨X射线衍射(XRD)、椭圆偏振光谱仪和原子力显微镜(AFM)研究了AlN成核层的厚度对GaN外延层的影响。对AlN的测试表明,AlN的表面粗糙度(RMS)随着厚度增加而变大。对GaN的测试表明,所有GaN样品在垂直方向处于压应变状态,并且随AlN厚度增加而略有减弱。GaN的(0002)_ω扫描的峰值半宽(FWHM)随着AlN成核层厚度增加而略有升高,GaN(10-12)_ω扫描的FWHM随着厚度增加而有所下降。(10-12)_ω扫描的FWHM与GaN的刃型穿透位错密度相关,A1N成核层的厚度较大时会降低刃型穿透位错密度,并减弱c轴方向的压应变状态。     

PAMBE growth of (1 1 2¯ 2)-oriented GaN/AlN nanostructures on m-sapphire

We report on the plasma-assisted molecular-beam epitaxial growth of (1 1 2¯ 2)-oriented GaN/AlN nanostructures on (1 1¯ 0 0) m-plane sapphire. Moderate N-rich conditions enable to synthesize AlN(1 1  2) directly on m-sapphire, with in-plane epitaxial relationships [1 1 2¯ 3¯]_AlN∥[0 0 0 1]_sapphire and [1  0 0]_AlN∥[1 1 2¯ 0]_sapphire. In the case of GaN, a Ga-excess of one monolayer is necessary to achieve two-dimensional growth of GaN(1 1 2¯ 2). Applying these growth conditions, we demonstrate the synthesis of (1 1 2¯ 2)-oriented GaN/AlN quantum well structures, showing a strong reduction of the internal electric field. By interrupting the growth under vacuum after the deposition of few monolayers of GaN under slightly Ga-rich conditions, we also demonstrate the feasibility of quantum dot structures with this orientation.     

Yttrium silicide formation and its contact properties on Si(1 0 0)

Yttrium silicide formation and its contact properties on Si(1 0 0) have been studied in this paper. By evaporating a yttrium metal layer onto Si(1 0 0) wafer in conventional vacuum condition and rapid thermal annealing, we found that YSi_2-x begins to form at 350 °C, and is stable to 950 °C. Atomic force microscopy characterization shows the pinholes formation in the formed YSi_2-x film. By current-voltage measurement, the Schottky barrier height (SBH) of YSi_2-x diode on p-type Si(1 0 0) was shown to be between 0.63 and 0.69 eV for annealing temperature from 500 to 900 °C. By low temperature current-voltage measurement, the SBH of YSi_2-x diode on n-type Si(1 0 0) was directly measured and shown to be 0.46, 0.37, 0.32 eV for annealing temperature of 500, 600, and 900 °C, respectively, and possibly even lower for annealing at 700 or 800 °C.     

Growth and structural properties of crystalline LaAlO3 on Si (0 0 1)

Crystalline LaAlO₃ was grown by oxide molecular beam epitaxy (MBE) on Si (0 0 1) surfaces utilizing a 2 ML SrTiO₃ buffer layer. This SrTiO₃ buffer layer, also grown by oxide MBE, formed an abrupt interface with the silicon. No SiO₂ layer was detectable at the oxide-silicon interface when studied by cross-sectional transmission electron microscopy. The crystalline quality of the LaAlO₃ was assessed during and after growth by reflection high energy electron diffraction, indicating epitaxial growth with the LaAlO₃ unit cell rotated 45° relative to the silicon unit cell. X-ray diffraction indicates a (0 0 1) oriented single-crystalline LaAlO₃ film with a rocking curve of 0.15° and no secondary phases. The use of SrTiO₃ buffer layers on silicon allows perovskite oxides which otherwise would be incompatible with silicon to be integrated onto a silicon platform.     

Epitaxy of BaTiO3 thin film on Si(0 0 1) using a SrTiO3 buffer layer for non-volatile memory application

In this study we report the epitaxial growth of BaTiO₃ films on Si(0 0 1) substrate buffered by 5 nm-thick SrTiO₃ layer using both MBE and PLD techniques. The BaTiO₃ films demonstrate single crystalline, (0 0 1)-oriented texture and atomically flat surface on SrTiO₃/Si template. The electrical characterizations of the BaTiO₃ films using MFIS structures show that samples grown by MBE with limited oxygen pressure during the growth exhibit typical dielectric behavior despite post deposition annealing process employed. A ferroelectric BaTiO₃ layer is obtained using PLD method, which permits much higher oxygen pressure. The C-V curve shows a memory window of 0.75 V which thus enable BaTiO₃ possibly being applied to the non-volatile memory application.     

Investigations of GaN growth on the sapphire substrate by MOCVD method with different AlN buffer deposition temperatures

The effects of different AlN buffer deposition temperatures on the GaN material properties grown on sapphire substrate was investigated. At relatively higher AlN buffer growth temperature, the surface morphology of subsequent grown GaN layer was decorated with island-like structure and revealed the mixed-polarity characteristics. In addition, the density of screw TD and leakage current in the GaN film was also increased. The occurrence of mixed-polarity GaN material result could be from unintentional nitridation of the sapphire substrate by ammonia (NH₃) precursor at the beginning of the AlN buffer layer growth. By using two-step temperature growth process for the buffer layer, the unintentional nitridation could be effectively suppressed. The GaN film grown on this buffer layer exhibited a smooth surface, single polarity, high crystalline quality and high resistivity. AlGaN/GaN high electron-mobility transistor (HEMT) devices were also successfully fabricated by using the two-step AlN buffer layer.     

Effect of deposition rate and thickness on the structural and electrical properties of evaporated Ni/glass and Ni/Si(1 0 0) thin films

We have studied the effect of substrates [glass and Si(1 0 0)], of Ni thickness (t_Ni) and of the deposition rate [v₁=13 nm/min and v₂=22 nm/min] on the structural and electrical properties of evaporated Ni thin films. The Ni thickness, measured by the Rutherford backscattering (RBS) technique, ranges from 28 to 200 nm. From X-ray diffraction, it was found that all samples are polycrystalline and grow with the 〈1 1 1〉 texture. From the measure of the lattice constant, we inferred that Ni/Si samples are under a higher tensile stress than the Ni/glass ones. Moreover, in Ni/glass deposited at v₁, stress is relived as t_Ni increases while those deposited at v₂ are almost stress-free. The grain size (D) in Ni/glass with low deposition rate monotonously increases (from 54 to 140 Å) as t_Ni increases and are lower than those corresponding to Ni/Si. On the other hand, samples grown at v₂ have a constant D, for small t_Ni with D in Ni/glass larger than D in Ni/Si. Ni/glass deposited at low v₁ are characterized by a higher electrical resistivity (ρ) than those deposited at v₂. For the latter series, ρ is practically constant with t_Ni but decreases with increasing grain size, indicating that diffusion at the grain boundaries rather than surface effect is responsible for the variation of ρ in this thickness range. For the Ni/glass deposed at v₁ and the Ni/Si series, ρ has a more complex variation with thickness and deposition rate. These results will be discussed and correlated.     

Crystalline orientation dependence of electrical properties of Mn Germanide/Ge(1 1 1) and (0 0 1) Schottky contacts

We have investigated the crystalline orientation dependence of the electrical properties of Mn germanide/Ge(1 1 1) and (0 0 1) Schottky contacts. We prepared epitaxial and polycrystalline Mn₅Ge₃ layers on Ge(1 1 1) and (0 0 1) substrates, respectively. The Schottky barrier height (SBH) estimated from the current density-voltage characteristics for epitaxial Mn₅Ge₃/Ge(1 1 1) is as low as 0.30 eV, while the SBH of polycrystalline Mn₅Ge₃/Ge(0 0 1) is higher than 0.56 eV. On the other hand, the SBH estimated from capacitance-voltage characteristics are higher than 0.6 eV for both samples. The difference of these SBHs can be explained by the local carrier conduction through the small area with the low SBH regions in the epitaxial Mn₅Ge₃/Ge(1 1 1) contact. This result suggests the possibility that the lowering SBH takes place due to Fermi level depinning in epitaxial germanide/Ge(1 1 1) contacts.     

Electron tunneling in MIS capacitors with the MBE-grown fluoride layers on Si(1 1 1) and Ge(1 1 1): Role of transverse momentum conservation

The current-voltage characteristics of the metal-insulator-semiconductor tunneling structures with calcium fluoride are simulated using different theoretical models. The results are compared to the data of current measurements on the fabricated capacitors with 1-3 nm epitaxial fluorides. Best agreement is achieved imposing a condition of transverse momentum k_⊥ conservation for a tunneling electron. This fact may be treated as an experimental proof for the k_⊥ conservation in the examined high-quality structures which was not directly confirmed on more traditional structures with oxide dielectrics.     

Formation speed of atomically flat surface on Si (1 0 0) in ultra-pure argon

The flattening speed of the low temperature atomically flattening technology is evaluated in order to apply atomically flat surface of (1 0 0) orientation on large-diameter silicon wafers to the LSI manufacturing. The atomically flatness of the whole surface of wafers with the diameter of 200 mm can be obtained after annealing at 800 °C or above. The process time required to obtain the atomically flatness for the whole wafer surface can be shortened by increasing the annealing temperature as well as by increasing the gas flow rate. With the off angle of 0.50° or below, it was found that only mono-atomic steps appear on the surfaces and the flattening speed is independent of the off angle. These indicate that the process speed is independent of the migration speed of Si atoms on the surface, but depends on the gas replacement efficiency near the Si surface in this technique.     

AP-MOVPE of InGaAs on GaAs (0 0 1): Analysis of in situ reflectivity response

We have investigated in situ monitoring of growth rate and refractive index by laser reflectometry during InGaAs on GaAs (0 0 1) substrate growth in atmospheric pressure metalorganic vapour-phase epitaxy (AP-MOVPE). The indium solid composition (x_In^s) was varied by changing the substrate temperature or the indium vapour composition (x_In^v). The refractive index of InGaAs alloys as a function of temperature and composition was quantified and compared which that of GaAs for 632.8 nm wavelength by simulation of experimental reflectivity responses. Composition analyses were carried out by high-resolution X-ray diffraction (HRXRD) and optical absorption (OA). The layers thicknesses were estimated by scanning electron microscopy (SEM) observations. The temperature dependence of InGaAs growth rate has been investigated in the temperature range 420-680 °C using trimethylgallium (TMGa), trimethylindium (TMIn) and arsine (AsH₃) sources. It shows Arrhenius-type behaviour with an apparent activation energy E_a of 0.62 eV (14.26 kcal/mol). This value is close to that determinate in the AP-MOVPE of GaAs.     

High quality relaxed Ge layers grown directly on a Si(0 0 1) substrate

After a long period of developing integrated circuit technology through simple scaling of silicon devices, the semiconductor industry is now embracing technology boosters such as strain for higher mobility channel material. Germanium is the logical supplement to enhance existing technologies, as its material behaviour is very close to silicon, and to create new functional devices that cannot be fabricated from silicon alone (Hartmann et al. (2004) [1]). Germanium wafers are, however, both expensive and less durable than their silicon counterparts. Hence it is highly desirable to create a relaxed high quality Ge layer on a Si substrate, with the provision that this does not unduly compromise the planarity of the system. The two temperature method, proposed by Colace et al. (1997) [2], can give smooth (RMS surface roughness below 1 nm) and low threading dislocation density (TDD <10⁸ cm⁻²) Ge layers directly on a Si(0 0 1) wafer (Halbwax et al. (2005) [3]), but these are currently of the order of 1-2 μm thick (Hartmann et al. (2009) [4]).We present an in depth study of two temperature Ge layers, grown by reduced pressure chemical vapour deposition (RP-CVD), in an effort to reduce the thickness. We report the effect of changing the thickness, of both the low temperature (LT) and the high temperature (HT) layers, emphasising the variation of TDD, surface morphology and relaxation.Within this study, the LT Ge layer is deposited directly on a Si(0 0 1) substrate at a low temperature of 400 °C. This low temperature is known to generate monolayer islands (Park et al. (2006) [5]), but is sufficiently high to maintain crystallinity whilst keeping the epitaxial surface as smooth as possible by suppressing further island growth and proceeding in a Frank-van der Merwe growth mode. This LT growth also generates a vast number of dislocations, of the order of 10⁸-10⁹ cm⁻², that enable the next HT step to relax the maximum amount of strain possible. The effect of varying the HT layer thickness is studied by depositing on a LT layer of fixed thickness (100 nm) at a higher growth temperature of 670 °C. We find that the HT layer allows Ge-on-Ge adatom transport to minimise the surface energy and smooth the layer. The final step to the technique is annealing at a high temperature that allows the dislocations generated to glide, increasing the degree of relaxation, and annihilate. We find that annealing can reduce the TDD to the order of 10⁷ cm⁻², but at a cost of a significantly roughened surface.     

An efficient wet-cleaning of SiGe virtual substrates and of thick, pure Ge layers on Si(0 0 1) after a chemical mechanical planarization step

The aim of this study is to propose an efficient wet cleaning of the surfaces of the SiGe virtual substrates just after a chemical mechanical polishing step. We have first of all studied the chemical compatibility of miscellaneous solutions, such as the standard cleaning 1 (SC1), the Standard Cleaning 2 (SC2), the CARO one etc with SiGe. A definite, logarithmic-like increase of the etch rate with the Ge content has been obtained for the SC1, the SC2 and the CARO solutions (with values 1000-10,000 those of Si evidenced for pure Ge), making them unsuitable for Ge contents above 30%. We have thus investigated the efficiency of new cleaning sequences (named “DDC-SiGe” for SiGe and “HF/O₃” for pure Ge) that call upon diluted HF and ozone solutions spiked with HCl, on SiGe and pure Ge. The overall material consumption of those cleaning sequences, which increases from 10 Å for pure Si up to 130 Å for pure Ge, is quite low. The particle removal efficiency of such cleanings is around 99% for Si_0.8Ge_0.2 and Si_0.7Ge_0.3. It drops down to 83% for Si_0.5Ge_0.5 and to 65% for pure Ge. This is most probably due to pre-existing epitaxy defects which are revealed during the wet cleaning then wrongly assimilated to particles by our surface inspection tool. The metallic contaminants present on the surface after the use of our wet cleaning sequences have a surface density lower than 10¹⁰ atoms cm⁻², this whatever the Ge content of the underlying layer.     

Study of Ni/Si(1 0 0) solid-state reaction with Y addition

The characteristics of Ni/Si(1 0 0) solid-state reaction with yttrium (Y) addition are studied in this paper. Film stacks of Ti(20 nm)/TiN(40 nm)/Ni(8 nm)/Y(4 nm)/Ni(8 nm)/Si(1 0 0) and Ti(20 nm)/TiN(40 nm)/Ni(7 nm)/Y(6 nm)/Ni(7 nm)/Si(1 0 0) were prepared by physical vapor deposition. After solid-state reaction between metal films and Si was performed by rapid thermal annealing, various material analyses show that NiSi forms even with the addition of Y, and Ni silicidation is accompanied with Y diffusion in Ni film toward its top surface. The electrical characteristic measurements reveal that no significant Schottky barrier height modulation with the addition of Y occurs.     

Photomodulated transmittance of GaBiAs layers grown on (0 0 1) and (3 1 1)B GaAs substrates

In this work, photomodulated transmittance (PT) has been applied to investigate the energy gap of GaBiAs layers grown on (0 0 1) and (3 1 1)B GaAs substrates. In PT spectra, a clear resonance has been observed below the GaAs edge. This resonance has been attributed to the energy gap-related absorption in GaBiAs. The energy and broadening of PT resonances have been determined using a standard approach in electromodulation spectroscopy. It has been found that the crystallographic orientation of GaAs substrate influences on the incorporation of Bi atoms into GaAs and quality of GaBiAs layers. The Bi-related energy gap reduction has been determined to be ∼90 meV per percent of Bi. In addition to PT spectra, common transmittance spectra have been measured and the energy gap of GaBiAs has been determined from the square of the absorption coefficient α² around the band-gap edge. It has been found that the tail of density of states is significant for GaBiAs and influences the accuracy of energy gap determination from the α² plot. In the case of PT spectra, the energy gap is determined unambiguously since this technique is directly sensitive to singularities in the density of states.     

Growth mechanism of iron nanoparticles on (0 0 0 1) sapphire wafers

Laser ablation of a high purity (99.7%) iron target was used to accomplish the depositions of iron nanoparticles on the (0 0 0 1) face of single crystal sapphire wafers. The nanoparticles were characterized in situ by means of X-ray photoelectron spectroscopy (XPS). The growth mechanism was determined by applying the QUASES-Tougaard methodology to the extended part of the background intensity of the Fe KMM peak in XPS spectra. The heights of nanoparticles obtained are between 3.5 and 6.5 nm. In the first 150 laser pulses, the height of the nanoparticles remained constant while the coverage was increased.     

NiSi contact metallization using electroless Ni deposition on Pd-activated self-assembled monolayer (SAM) on p-type Si(1 0 0)

In this paper we describe a method to form NiSi contacts using electroless plating of Nickel or Ni alloy on Pd activated self-assembled monolayer (SAM) on p-type Si(1 0 0). Such method allows uniform deposition of very thin, <30 nm, Ni or Ni alloy films. Clean, oxide free, Si substrate was covered with aminopropyltriethoxysilane (APTES) self-assembled monolayer. The surface was activated with Pd-citrate solution followed by electroless plating. The samples were annealed for 1 h in vacuum (∼10⁻⁶ Torr) forming the silicide layer. The annealing temperatures were 400 °C for NiP alloy and 500 °C for NiPW alloy. X-ray diffraction (XRD) measurement confirmed the presence of NiSi phase after annealing. The silicides material properties were characterized using secondary electron microscopy (SEM) analysis, X-ray diffraction (XRD) and X-ray photon spectroscopy (XPS) profiling. The results are reported and summarized.