Wire-bond failure mechanisms in plastic encapsulated microcircuits and ceramic hybrids at high temperatures

Ceramic hybrids are the preferred solution when long-term high-temperature reliability is required, but standard plastic encapsulated microcircuits (PEMs) are an interesting alternative due to low price and high availability. Test vehicles with standard PEMs were subjected to thermal ageing at 150–175 °C. Six of eight vehicles failed after only three weeks at 175 °C, and the cause of failure was found to be microcracking at the interface between gold ball and aluminium bond pad giving rise to resistance increase. The intermetallic region was formed during high-temperature lead soldering and continued to develop during thermal ageing. The high-temperature performance of aluminium wire bonding to a selection of thick film metallizations on ceramic substrate was also investigated. Gold–palladium has previously been reported as a high-temperature solution, but we found that the mechanical strength of aluminium to gold–palladium (AuPd) degraded seriously at temperatures above 200 °C due to intermetallic formation. Aluminium to silver thick film plated with copper and nickel showed good mechanical strength and unaltered electrical resistance after four weeks thermal ageing at 250 °C.     

Wire bonding characteristics of gold conductors for low temperature co-fired ceramic applications

Low temperature co-fired ceramic (LTCC) with gold conductors has been used for high reliability applications, such as satellite communications. When the gold metallization is co-fired with the LTCC tape, inorganic adhesion additives in the gold conductor interact with the LTCC glass. This interaction is essential to provide adequate adhesion for the gold metallization. However, this interaction can also reduce the softening point of the LTCC glass. The reaction product can migrate to the surface of the gold conductor and affect the wire bondability of the gold conductor.Effort has been made to develop surface gold conductors with optimized interaction with LTCC. The new gold conductor shows significant reduction of inorganic particles on the surface and improvement of wire bondability. A systematic wire bonding study has been performed on gold conductors under various wire bonding conditions. It is demonstrated that the wire bonding window can be improved significantly by reducing the interaction between LTCC and gold metallization. This paper reports the results of the wire bonding study.     

Interconnecting to aluminum- and copper-based semiconductors (electroless-nickel/gold for solder bumping and wire bonding)

Electroless nickel and immersion gold plating technologies (e-Ni/Au) have traditionally been used almost exclusively within the electronics industry to create a solderable surface on substrate materials, e.g. laminate boards. Recent advances in these plating technologies, along with the inherent low costs associated with electroless plating processes, have enabled the extension of their utilization into a variety of semiconductor applications, e.g. wafer level pad metallization. This paper describes the electroless nickel and immersion gold processes for both aluminum- and copper-based semiconductors. The nickel plating bath is a hypophosphite-based solution and the gold bath is a cyanide-free sulfate-based solution. For aluminum-based integrated circuits a zincation process is used to initiate nickel growth, and for copper, palladium is used to catalyze the surface. Tight control of the chemistries, equipment, and run-time process variables are required to ensure repeatability. Thin film Auger analysis of the as-plated films shows well-defined layers of high purity gold and nickel/phosphorous. Adhesion of the e-Ni/Au layers was evaluated by measuring the load required to shear I/O pads plated with tall nickel bumps. Integrity of the nickel was further evaluated by subjecting the structures to multiple temperature cycles and test for pad shear strength. Results show no degradation in shear load or failure mode.The deposition of nickel and gold onto the I/O pad surfaces enables the subsequent use of both wire bond and flip chip (lead-based and lead-free alloys) interconnect methods. The integrity of gold wire bonds to the e-Ni/Au plated I/O pad was evaluated using ball shear, wire pull, and the corresponding failure analysis of each. Results show values well above product specifications, with wire pull failure modes in the wire and intermetallic failure in the ball shear studies. For flip chip applications, the e-Ni/Au layer was evaluated using stencil-printing technology to deposit several different solder alloys. In the current investigation, two test vehicles were successfully bumped with both 63Sn/37Pb and 90Pb/10Sn lead-based solder alloys, as well as the 95.5Sn/3.8Ag/0.7Cu lead-free alloy. In order to evaluate the compatibility of these alloys with the electroless nickel layer, solder bump shear tests were performed as a function of number of reflow cycles. Results show no degradation in shear load or failure mode among all three of the alloys tested, indicating no critical nickel consumption (i.e., excessive intermetallic growth) during reflow. Additional tests were performed comparing nickel under-bump-metallurgy (UBM) thicknesses of 1, 2 and 5 μm. Again, no critical nickel consumption was detected.     

Carbon nanotubes for nanoscale low temperature flip chip connections

In this work we demonstrate a new approach for ultra fine flip chip interconnections based on carbon nanotubes as a wiring material. In contrast to other works we show patterned growth of multi walled CNTs on substrates with pre-structured bond pads including a complete metallization system for electrical characterization. Furthermore, we succeeded achieving a reliable flip chip connection between CNT-covered contact pads and metal pads at temperatures lower than 200 °C. Our goal is a reversible electrical and mechanical chip assembly with CNT bumps.For bonding experiments and electrical characterization a test structure with a damascene metallization including a layer stack of TiN/Cu/TiN was prepared. For CNT growth a thin nickel catalyst layer was selectively deposited with sputtering and a lift-off technique on the contact pads. The CNTs were grown by thermal CVD with ethylene as carbon source. CNT growth parameters like catalyst thickness, gas composition, growth time and temperature were optimized to get dense CNT growth. The metal bumps of the counter chip consist of electroless deposited Ni. With the selected layout we can obtain daisy chain and four-point measurements for lossless determination of single contact resistance. We have obtained reliable electrical contacts with relatively small resistance reaching values as low as 2.2 Ω. As CNT-quality is strongly dependent on the growth temperature we observed a strong change in resistivity of the flip chip connection as the growth temperature was varied. Reliability tests showed long time stability under thermal stress proving a reliable electrical contact between the contact pads. There is an appropriate potential for further optimization of the CNT bump resistance and applying this technology for IC-devices.     

Inkjet printed silver source/drain electrodes for low-cost polymer thin film transistors

Silver tracks for source/drain (S/D) electrodes in low-cost polymer thin film transistors (TFTs) have been realized through inkjet printing technique, using heavily n-doped silicon wafer with thermally grown silicon dioxide as the substrate and poly(3-hexylthiophene) (P3HT) as the channel material. Spin coating a layer of poly-4-vinylphenol (PVPh) onto the substrate was found to enhance the silver track uniformity and lower the cure temperature (from 300 to 210 °C). The surface roughness of the PVPh film was optimized to improve the device performance. The fabricated P3HT TFT with a channel length of 20 μm exhibited a saturation mobility of 3.5 × 10⁻2 cm²/V/s which was three times higher than that obtained in P3HT TFTs with gold S/D electrodes.     

The effect of thin film structure and properties on gold ball bonding

The gold ball bonding process is widely used for making interconnections between integrated circuit chips and package lead frames, yet the relationships between the wire/substrate materials properties and the bond formation processes are not yet well understood. While the creation of a metallurgical bond at the interface between the wire and substrate is required, the deformation of the wire and substrate also play an important role in bond formation. Bonding to thin film substrates is of particular interest, since thin films often exhibit mechanical behavior distinctly different from bulk materials. In the present study, a systematic investigation has been conducted to understand the effects of the structure and properties of aluminum thin films on the quality of gold ball bonds. A series of aluminum thin films was fabricated with systematic variations in hardness, roughness, thickness, and composition. Gold wires were ball bonded to these substrates, and the bondability and bond shear strengths were assessed. Metallographic sections of several of these specimens were made and examined in the scanning electron microscope. The results show that the film thickness has the most dominant effect on the bondability and bond strength; films that were 0.5 μm thick often exhibited low strength or poor bondability. Very hard films also gave poor results. Ultimately, these results can be used to predict the wire bond reliability expected from various types of thin film metallization.     

Electromigration resistance and long term stability of textured silver thin films on LTCC

Silver (Ag) is regarded as advanced material for metallization purposes in microelectronic devices because of its high conductivity and its enhanced electromigration resistance. Besides the typical use of silicon based substrate materials for device fabrication, thin film metallization on ceramic and glass-ceramic LTCC (low temperature co-fired ceramics) substrates gets more and more into focus as only thin film technology can provide the required lateral resolutions of structures in the μm-range needed for e.g. high frequency applications. Therefore, the reliability of Ag thin films is investigated under accelerated aging conditions, utilizing test structure which consists of 5 parallel lines stressed with current densities up to 1.5 × 10⁷ A cm⁻² at temperatures ranging from room-temperature up to 300 °C. To detect the degradation via the temporal characteristics of the current signal a constant voltage is applied taking the overall resistance of the test structure into account. The mean time to failure of the Ag metallization substantially depends on the degree of (1 1 1)-orientation which, in turn, is strongly affected by the plasma power P_P during deposition. Therefore, Ag thin films deposited at P_P = 1000 W feature a 7 times higher reliability than those deposited at P_P = 100 W. Due to the enhanced stability of grains being (1 1 1)-oriented in textured thin films the material transport predominantly occurs along grain boundaries, whereas in Ag films without a (1 1 1)-orientation volume-related diffusion effects dominate due to the lower stability of these grains.     

LTCC基板金丝热超声楔焊正交试验分析

引线键合是微组装技术中的关键工艺,广泛应用于军品和民品芯片的封装。特殊类型基板的引线键合失效问题是键合工艺研究的重要方向。低温共烧陶瓷(LTCC)电路基板在微波多芯片组件中使用广泛,相对于电镀纯金基板,该基板上金焊盘楔形键合强度对于参数设置非常敏感。文章进行了LTCC基板上金丝热超声楔焊的正交试验,在热台温度、劈刀安装长度等条件不变的情况下,分别设置第一键合点和第二键合点的超声功率、超声时间和键合力三因素水平,试验结果表明第一点超声功率和第二点超声时间对键合强度影响明显。     

Li-doped (Ba,Sr)TiO3 thick film interdigital capacitors for microwave applications

Microwave properties of Li-doped (Ba,Sr)TiO₃ thick film interdigital capacitors have been investigated. According to the reported papers, BaSrTiO₃ materials, paraelectric state at the room temperature, have high dielectric permittivity (>500 @ 1 MHz) and low loss tangent (<0.01 @ 1 MHz) in epitaxial thin film form; however, the sintering temperature of BaSrTiO₃ is over 1350 °C. In order to reduce the sintering temperature, Li (3 wt%) was added to the BaSrTiO₃ materials, and 10 μm thick Li-doped (Ba,Sr)TiO₃ films were screen printed on the alumina (Al₂O₃) substrate and sintered at 900 °C. Interdigital capacitor patterns with five fingers of 200 μm gap and 250 μm length were also designed and fabricated by employing the screen printing method with Ag electrode. The structural feature was analyzed with X-ray diffraction method. Frequency and temperature-dependent dielectric properties were characterized from 1 kHz to 1 MHz and 303-403 K, respectively. Also, current-voltage characteristics were investigated with an elevated temperature. Microwave transmission and reflectance properties of thick film interdigital capacitors will be discussed, and frequency dispersion of dielectric properties will be presented. Specially, designed Au/Li-doped (Ba,Sr)TiO₃/Ag-Pd/Al₂O₃ vertical structure was prepared to measure the tunability. In this sandwich type structure, Li-doped (Ba,Sr)TiO₃ films showed tenability of 7.15% at a bias electric field of 20 kV/cm.     

Low temperature synthesis and characterization of NTC powder and its ‘lead free’ thick film thermistors

A general and simple chemical approach has been proposed to prepare negative temperature coefficient (NTC) powder material using commercially available tetra hydrated acetates of Mn, Co, Ni and oxalic acid. The thermal decomposition of Mn-Co-Ni oxalate at 700 °C leads to formation of spinel phases with fine powder material. Lead free thick film thermistor pastes were formulated using the synthesized spinel powders. Planar thick film thermistor patterns of the formulated pastes were screen printed on alumina substrates. The microstructure and electrical properties of these thick film thermistors were determined. Depending on the powder preparation, the prepared thick film NTC thermistors showed room temperature resistance in the range of 12-29 MΩ. The values of thermistor constant, β_25/300 ranged from 4014 to 4223 K.     

Room temperature wedge-wedge ultrasonic bonding using aluminum coated copper wire

The purpose of this work is to evaluate the feasibility of room temperature wedge-wedge bonding using commercially available copper wires, coated with aluminum. Bonding quality, reliability and aging resistance of the wire bonds have been investigated using standard wire pull tests immediately after bonding and after accelerated life tests, including temperature storage at 125 °C, 150 °C, and 200 °C for up to 2000 h. Using focused ion beam (FIB-) preparation and high resolution electron microscopy (SEM, TEM combined with EDX X-ray analysis), results of microstructure investigations of the Al-coating/Cu wire interface as well as of the bonding interconnect formed between the coated wire and the metallization on ceramic substrate will be presented. These investigations provide background information regarding the binding mechanisms and material interactions, and contribute to assess and to avoid potential reliability risks. Due to the found advantageous bond processing behavior and increased reliability properties, our results indicate that room temperature wedge-wedge bonding of coated copper wires has a remarkable application potential, for instance in medical and other high reliability as well as high power applications. It combines all known advantages of usual copper bonding like excellent contacting behavior, high reliability and favorable material price with the possibility of processing temperature damageable components and considerable improved storage capability. Therefore, room temperature bonding using coated copper wire can also reduce cycle time, manufacturing and material costs.     

以钯作扩散阻挡层——一种多功能线路板表面处理方法

电子工业不断的小型化,数种不同互联技术于线路板上电子零件连接及电接点被应用范畴不断增加。基于此用途,线路板组装垫位需被一层最后表面处理保护,如这最后表面处理层可用于不同互联技术,可被称为多功能表面层。钯是一个艮好的镍扩散阻挡层,故此层膜能抵受如焊接及键接之严酷老化测试条件。其两大优点为具有良好热超声波键接性及于无铅焊料之非常优艮焊接性。从预镀导线架过往多年经验已知即使很薄贵金属钯层及金层已可有保证可靠的金线键接性。从这一知识,沉镍浸钯浸金层膜系统（ENIPIG）被研发出来。此崭新表面处理ENIPIG三种金属镀液需互相配合才能于线路板工艺上达成理想多功能层膜。因着其薄贵金属层膜,相对于其他表面处理,可节省颇大的成本。     

Permittivity of modified polyimide layers on LTCC

In this work, the permittivity of a tailored compound material was investigated consisting of a polyimide matrix in which hollow glass microspheres with a mean diameter of 30 μm are implemented as filler material. Choosing this approach the dielectric constant compared to that of the pure polyimide material is further decreased due to the enclosed air targeted to improve the high-frequency performance of patch antennas operated in the GHz range. Furthermore, the thickness of one single layer can be increased substantially from a maximum of about 10 μm for pure polyimide films to values above 80 μm by simply adding this type of filler material to the liquid polyimide precursor so that cavities in LTCC (low temperature co-fired ceramics) substrates can be filled more reliable. Two different variations of this compound material with filler to polymer ratios of 1:7.5 and 1:10 are realized. Basically, the film thickness depends on the spin coating speed and the microsphere content, respectively. The high initial surface roughness can be decreased to an average value of about 3 μm by applying additional layers of pure polyimide on top enabling thin film technology. The dielectric constant of the complete substrate comprising the LTCC and the compound material is measured using a ring resonator in microstrip configuration. From the resonances occurring in the transmission S-parameter |S₂₁| spectrum between 1 and 10 GHz, the relative dielectric constant can be determined. Using 820 μm thick LTCC substrates the permittivity can be reduced from originally ε_r = 7.8-6.6. By applying numerical calculations, a reduced permittivity of the pure polymer film from ε_r = 3.3 to about 2.9 can be determined when adding the glass microspheres.     

Role of bonding time and temperature on the physical properties of coupled anisotropic conductive-nonconductive adhesive film for flip chip on glass technology

Using thermosetting epoxy based conductive adhesive films for the flip chip interconnect possess a great deal of attractions to the electronics manufacturing industries due to the ever increasing demands for miniaturized electronic products. Adhesive manufacturers have taken many attempts over the last decade to produce a number of types of adhesives and the coupled anisotropic conductive-nonconductive adhesive film is one of them. The successful formation of the flip chip interconnection using this particular type of adhesive depends on, among factors, how the physical properties of the adhesive changes during the bonding process. Experimental measurements of the temperature in the adhesive have revealed that the temperature becomes very close to the required maximum bonding temperature within the first 1 s of the bonding time. The higher the bonding temperature the faster the ramp up of temperature is. A dynamic mechanical analysis (DMA) has been carried out to investigate the nature of the changes of the physical properties of the coupled anisotropic conductive-nonconductive adhesive film for a range of bonding parameters. Adhesive samples that are pre-cured at 170, 190 and 210 °C for 3, 5 and 10 s have been analyzed using a DMA instrument. The results have revealed that the glass transition temperature of this type of adhesive increases with the increase in the bonding time for the bonding temperatures that have been used in this work. For the curing time of 3 and 5 s, the maximum glass transition temperature increases with the increase in the bonding temperature, but for the curing time of 10 s the maximum glass transition temperature has been observed in the sample which is cured at 190 °C. Based on these results it has been concluded that the optimal bonding temperature and time for this kind of adhesive are 190 °C and 10 s, respectively.     

厚膜片式电阻器硫化机理及失效预防

通过DC/DC模块电源失效分析和电阻硫化实验,采用扫描电镜和能谱分析等手段,研究了厚膜片式电阻器的硫化机理。结果表明:厚膜片式电阻器端电极和二次保护包覆层之间存在缝隙,空气中的硫化物通过灌封硅胶吸附进入到厚膜片式电阻器内电极,导致内电极材料中的银被硫化,生成电导率低的硫化银,从而使电阻的阻值变大甚至开路。结合DC/DC模块电源提出了几种预防电阻硫化的措施。     

Silver grid transparent conducting electrodes for organic light emitting diodes

Polymer organic light emitting diodes (OLEDs) were fabricated using thin silver hexagonal grids replacing indium tin oxide (ITO) as the transparent conducting electrodes (TCE). Previous literature has assumed that thick metal grids (several hundred nanometres thick) with a lower sheet resistance (<10 Ω/□) and a similar light transmission (>80%) compared to thinner grids would lead to OLEDs with better performance than when thinner metal grid lines are used. This assumption is critically examined using OLEDs on various metal grids with different thicknesses and studying their performances. The experimental results show that a 20 nm thick silver grid TCE resulted in more efficient OLEDs with higher luminance (10 cd/A and 1460 cd/m² at 6.5 V) than a 111 nm thick silver grid TCE (5 cd/A and 159 cd/m² at 6.5 V). Furthermore, the 20 nm thick silver grid OLED has a higher luminous efficiency than the ITO OLED (6 cd/A and 1540 cd/m² at 6.5 V) at low voltages. The data shows that thinner metal grid TCEs (about 20 nm) make the most efficient OLEDs, contrary to previous expectations.     

取代化学镍金用于线宽线距小于30μm高密度印制板的新技术

化学镀镰/金具有优良的性能,已在印制电路板上获得广泛应用。但随着线路的线宽线距越来越小耙催化剂会夹杂在线路之间造成化学镀镖经常出现超镀现象,使化学镀腺/金工艺无法应用。为了解决此问题,我们发现用0.2μm厚的微碱性化学镀银层具有化学镀镖/金层相同的可焊性和打线功能,证明微碱性化学镀银工艺可以取代超高密度PCB的化学镀牒/金工艺。     

Highly controllable dual-gate microcrystalline silicon thin film transistor processed at low temperature (T < 180 °C)

The addition of a top-gate to a bottom gate microcrystalline silicon thin film transistor (TFT) that is processed at a maximum temperature of 180 °C, is shown to lead to a very efficient control of the threshold voltage V_TH. A real time control of CMOS pairing is then possible. The value of the coupling coefficient that is the ratio of the variation of V_TH on the variation of the voltage of the top-gate control is 0.7. This efficient control is mainly due to the use of very thin, 50 nm thick, active layer and to its electrical quality that leads to a full depletion.     

Anisotropic conductive film flip chip joining using thin chips

In this study, flip chip interconnections were made on very flexible polyethylene naphthalate substrates using anisotropic conductive film. Two kinds of chips were used: chips of normal thickness and thin chips. The thin chips were very thin, only 50 μm thick. Due to the thinness of the chips they were flexible and the entire joint was bendable. The reliability properties of the interconnections established with these two different kinds of chips were compared. In addition, the effect of bending of the chip and joint area on the joint reliability was studied. Furthermore, part of the substrates was dried before bonding and the effect of that on the joint performance was investigated.The pitch of the test vehicles was 250 μm and the chips had 25 μm high gold bumps. For resistance analysis there were two four-point measuring positions in each test vehicle. For finding the optimal bonding conditions for the test vehicles, the bonding was done using two different bonding pressures, of which the better one was chosen for the final tests.Furthermore, the test vehicles were subjected to thermal cycling tests between −40 and +125 °C (half-an-hour cycle) and to a humidity test (85%/85 °C). Part of the test vehicles were bent during the tests. Finally, the structures of the joints were studied using scanning electron microscopy.     

The microwave properties of Li doped 0.7(Ba,Sr)TiO3-0.3MgO thick film interdigital capacitors on the alumina substrates

The crystalline and electrical properties of Li doped 0.7(Ba,Sr)TiO₃-0.3MgO thick film interdigital capacitors have been investigated. Screen printing method was employed to fabricate Li doped 0.7(Ba,Sr)TiO₃-0.3MgO thick films on the alumina substrates. (Ba,Sr)TiO₃ materials have high dielectric permittivity (>500 @ 1 MHz) and low loss tangent (0.01 @ 1 MHz) in the epitaxial thin film form. To improve dielectric properties and reduce sintering temperature, MgO and Li were added, respectively. 10 μm thick films were screen printed on the alumina substrates and then interdigital capacitors with seven fingers of 200 μm finger gap were patterned with Ag electrode. Current-voltage characteristics were analyzed with elevated temperature range. Up to 50 °C, the thick films showed positive temperature coefficient of resistivity (dρ/dT) of 6.11 × 10⁸ Ω cm/°C, then film showed negative temperature coefficient of resistivity (dρ/dT) of −1.74 × 10⁸ Ω cm/°C. From the microwave measurement, the relative dielectric permittivity of Li doped 0.7(Ba,Sr)TiO₃-0.3MgO thick films interdigital capacitors were between 313 at 1 GHz and 265 at 7 GHz.