A Symbolic Circuit Analysis-Oriented Algorithm for Finding a Common Tree of the Current and Voltage Graphs

A fundamental problem of symbolic analysis of electric networks when using the signal-flow (SFG) graph method is to find the common tree of the current and voltage graph ( and , respectively). In this paper we introduce a novel method in order to determine a common tree of both graphs, which may be used to obtain the symbolic network transfer function when carrying out the small-signal analysis of linear(ised) circuits.     

BIBO Stability of D-Dimensional Filters

Consider the class of d-dimensional causal filters characterized by a d-variate rational function analytic on the polydisk . The BIBO stability of such filters has been the subject of much research over the past two decades. In this paper we analyze the BIBO stability of such functions and prove necessary and sufficient conditions for BIBO stability of a d-dimensional filter. In particular, we prove if a d-variate filter H(z) analytic on has a Fourier expansion that converges uniformly on the closure of , then H(z) is BIBO stable. This result proves a long standing conjecture set forth by Bose in [3].     

Finite-Memory Systems

Let K be a field, k and n positive integers and let matrices with coefficients in K. For any function

VLSI architecture for fast 2D discrete orthonormal wavelet transform

The discrete wavelet transform (DWT) provides a new method for signal/image analysis where high frequency components are studied with finer time resolution and low frequency components with coarser time resolution. It decomposes a signal or an image into localized contributions for multiscale analysis. In this paper, we present a parallel pipelined VLSI array architecture for 2D dyadic separable DWT. The 2D data array is partitioned into non-overlapping groups of rows. All rows in a partition are processed in parallel, and consecutive partitions are pipelined. Moreover, multiple wavelet levels are computed in the same pipeline, and multiple DWT problems can be pipelined also. The whole computation requires a single scan of the image data array. Thus, it is suitable for on-line real-time applications. For anN×N image, anm-level DWT can be computed in time units on a processor costing no more than , whereq is the partition size,p is the length of corresponding 1D DWT filters,C _m andC _a are the costs of a parallel multiplier and a parallel adder respectively, and a time unit is the time for a multiplication and an addition. Forq=N m, the computing time reduces to . When a large number of DWT problems are pipelined, the computing time is about per problem.     

Can One Control the Vibrations of a Drum?

This paper considers the problem of constructing feedback stabilizing controllers for the wave operator on ⁿ (more generally AR systems determined by a hyperbolic operator). In order to accomplish this, it must first clarify the notion of an input-output structure on a distributed system, as well as what it means to interconnect two such systems. Both these notions are shown to be consequences of a structure which generalizes the standard causal structure of lumped systems determined by the flow of time. Given this apparatus, the paper then constructs feedback controllers which stabilize the wave equation along directions given by a proper cone in ⁿ.     

A Small Area Charge Sensitive Readout Chain with a Dual Mode of Operation

A charge sensitive readout chain has been designed and fabricated in acommercially available 0.8 m CMOS technology. The readout chain is optimizedfor pixel detectors measuring soft X-ray energies up to 20 KeV. In the first modean analog signal proportional to input charge is generated and processed in realtime. In the second mode a peak-and-hold operation is enabled and therelevant signal is processed in later time. This dual mode of operation iscontrolled by an external digital signal. The readout chain consists of a chargeamplifier, a shaper, an operational amplifier which can either operate as avoltage amplifier or a peak detector and an output buffer. Its area is . The gain at the shaper output is 378 mv/fC, theENC is 16 rms at 160 nsec shaping time. The overall gainis 557 mV/fC, the ENC is rms with 240 nsec peaking timeand 1.4 sec recovery time. The overall power dissipation is 1.5 mWatt with aload capacitance of 25 pF.     

The Design of a 2-V 900-MHz CMOS Bandpass Amplifier

A 900 MHz low-power CMOS bandpassamplifier suitable for the applications of RFfront-end in wireless communication receiversis proposed and analyzed. In this design, thetemperature compensation circuit is used tostabilize the amplifier gain so that theoverall amplifier has a good temperaturestability. Moreover, the compact tunablepositive-feedback circuit is connected to theintegrated spiral inductor to generate thenegative resistance and enhance its value. The simple diode varactor circuit isadopted for center-frequency tuning. These twoimproved circuits can reduce the powerdissipation of the amplifier. An experimentalchip fabricated by 0.5 mdouble-poly-double-metal CMOS technologyoccupies a chip area of ; chip area. The measuredresults have verified the performance of thefabricated CMOS bandpass amplifier. Under a2-V supply voltage, the measured quality factoris tunable between 4.5 and 50 and the tunablefrequency range is between 845 MHz and 915 MHz. At , the measured is 20 dB whereas thenoise figure is 5.2 dB in the passband. Thegain variation is less than 4 dB in the rangeof 0–80^°C. The dc powerdissipation is 35 mW. Suitable amplifier gain,low power dissipation, and good temperaturestability make the proposed bandpass amplifierquite feasible in RF front-endapplications.     

A Fully Integrated, Low Noise and Low Power BiCMOS Front-end Readout System for Capacitive Detectors

Bipolar transistors are interesting for low noise front-end readout systems when high speed and low power consumption are required. This paper presents a fully integrated, low noise front-end design for the future Large Hadron Collider (LHC) experiments using the radiation hard SOI BiCMOS process. In the present prototype, the input-referred Equivalent Noise Charge (ENC) of 990 electrons (rms) for 12 pF detector capacitance with a shaping time of 25 ns and power consumption of 1.4 mW/channel has been measured. The gain of this front-end is 90 mV/MIP (Minimum Ionisation Particle: 1 fC) with non-linearity of less than 3% and linear input dynamic range is MIP. These results are obtained at room temperature and before irradiation. The measurements after irradiations by high intensity pion beam with an integrated flux of pions/cm² are also presented in this paper.     

On the Use of Symbolic Analyzers in Circuit Synthesis

In this paper several examples of circuits obtained with an automatic synthesis algorithm will be shown. The algorithm, described in a companion paper [1] and outlined here for clarity, has been implemented in the Mathematica language. We applied the new algorithm to classical problems of inmittance synthesis, obtaining well known topologies and also non-reported structures. When the algorithm is applied to challenging new problems, novel and practically useful inmittances are synthesized.     

Use of TCP Decoupling in Improving TCP Performance over Wireless Networks

We propose using the TCP decoupling approach to improve a TCP connection's goodput over wireless networks. The performance improvement can be analytically shown to be proportional to , where MTU is the maximum transmission unit of participating wireless links and HP_Sz is the size of a packet containing only a TCP/IP header. For example, on a WaveLAN [32] wireless network, where MTU is 1500 bytes and HP_Sz is 40 bytes, the achieved goodput improvement is about 350%. We present experimental results demonstrating that TCP decoupling outperforms TCP reno and TCP SACK. These results confirm the analysis of performance improvement.     

Computing Moments by Prefix Sums

Moments of images are widely used in pattern recognition, because in suitable form they can be made invariant to variations in translation, rotation and size. However the computation of discrete moments by their definition requires many multiplications which limits the speed of computation. In this paper we express the moments as a linear combination of higher order prefix sums, obtained by iterating the prefix sum computation on previous prefix sums, starting with the original function values. Thus the pth moment can be computed by O (N · p) additions followed by p multiply-adds. The prefix summations can be realized in time O(N) using p + 1 simple adders, and in time O(p log N) using parallel prefix computation and O(N) adders. The prefix sums can also be used in the computation of two-dimensional moments for any intensity function f(x,y). Using a simple bit-serial addition architecture, it is sufficient with 13 full adders and some shift registers to realize the 10 order 3 image moment computations for a 512 × 512 size image at the TV rate. In 1986 Hatamian published a computationally equivalent algorithm, based on a cascade of filters performing the summations. Our recursive derivation allows for explicit expressions and recursive equations for the coefficients used in the final moment calculation. Thus a number of alternative forms for the moment computation can be derived, based on different sets of prefix sums. It is also shown that similar expressions can be obtained for the moments introduced by Liao and Pawlak in 1996, forming better approximations to the exact geometric moments, at no extra computational cost.     

Effects of substrate orientation and surface reconstruction on patterned substrate OMVPE of GaAs

Organometallic vapor phase epitaxial growth of GaAs on 320 nm high mesas was used to study the dependence of lateral growth upon the substrate misorientation from (100) and the mesa wall orientation on the substrate. GaAs (100) substrates were misoriented by 3° toward eight major crystallographic directions, consisting of the four nearest [111] and [110] directions. The mesa sidewalls were oriented either parallel to the 〈011〉 and 〈01 〉 directions or rotated by 45° to be parallel to the 〈001〉 and 〈010〉 directions. GaAs films were grown with TMGa and TBA at T=575°C. The lateral growth rates were up to 25 times higher than the vertical growth rate of 1.3 μm/hour. Optical microscopy and atomic force microscopy (AFM) showed that under the given growth conditions lateral growth off mesa sidewalls is most rapid in the 〈011〉 and/or 〈0 〉 directions and less in the perpendicular 〈01 〉 and 〈0 1〉 directions (lateral growth anisotropy). By raising the temperature to 625°C lateral growth in the 〈01 〉 -〈0 1〉 directions increased while it remained almost constant in the 〈011〉 -〈0 〉 directions. Published results show that the partial pressure of As also affects lateral growth. Differences in the lateral growth rates in the 〈011〉 and its opposite 〈0 〉 directions result from substrate misorientation but not from the orientation of the mesa walls on the substrate. Anisotropic lateral growth rates in different crystallographic directions appear to be caused by both, (1) 1-dimensional Ga diffusion defined by surface reconstruction, and (2) a relatively low energy barrier to atoms flowing over high-to-low terrace steps. A lateral growth model is proposed that describes anisotropic lateral growth at mesa sidewalls in terms of growth conditions and substrate misorientations. The model also explains the difference in the preferential lateral growth directions between MBE and OMVPE.     

Optimizing CMOS Transconductor-C Filters for Low Power Wide Band Operation

A novel figure of merit to describe the bandwidth power efficiency of CMOS transconductors— is proposed and optimized for cross-coupled differential pair transconductor structures. The optimization is done in two different ways: univariable unconstrained and multivariable constrained. It is revealed that not only dc biases but also ac input phases can affect the bandwidth power efficiency of the transconductor. The bias voltages which can lead to best ratio at different ac phase combinations are obtained and presented in the article. HSPICE simulations are conducted to verify the theoretical predictions. On the basis of the cross-coupled differential pair transconductor, a biquadratic transconductor-C filter configuration is implemented. The frequency vs. power characteristic of the filter is studied for both optimally- and non-optimally-biased transconductor. It is shown that the optimization of the transconductor structure can result in performance improvement of the transconductor-C filter. The deviation of the optimal bias condition between the transconductor alone and the transconductor-C filter due to the inclusion of peripheray circuitries in the filter is discussed in the article.     

A 5.8 GHz Low Noise Amplifier for Wireless LAN Applications in Silicon Bipolar Technology

A monolithic integrated low-noise amplifier for operation in the 5.8-GHzband is described. Two different versions have been implemented where the biasing wasadapted to allow operation over a different range of supply voltage. At 5-V, theamplifiers gain is about 17-dB, with a noise figure of 4.2-dB and 1-dB compressionpoint at –15-dBm input power. The circuits have been designed utilizing a0.6-micron silicon bipolar production technology, featuring npn transistors with and of about20-GHz.     

On the Scalability of 2-D Discrete Wavelet Transform Algorithms

The ability of a parallel algorithm to make efficient use of increasing computational resources is known as its scalability. In this paper, we develop four parallel algorithms for the 2-dimensional Discrete Wavelet Transform algorithm (2-D DWT), and derive their scalability properties on Mesh and Hypercube interconnection networks. We consider two versions of the 2-D DWT algorithm, known as the Standard (S) and Non-standard (NS) forms, mapped onto P processors under two data partitioning schemes, namely checkerboard (CP) and stripped (SP) partitioning. The two checkerboard partitioned algorithms (Non-standard form, NS-CP), and as (Standard form, S-CP); while on the store-and-forward-routed (SF-routed) Mesh and Hypercube they are scalable as (NS-CP), and as (S-CP), respectively, where M ² is the number of elements in the input matrix, and (0,1) is a parameter relating M to the number of desired octaves J as . On the CT-routed Hypercube, scalability of the NS-form algorithms shows similar behavior as on the CT-routed Mesh. The Standard form algorithm with stripped partitioning (S-SP) is scalable on the CT-routed Hypercube as M ² = (P ²), and it is unscalable on the CT-routed Mesh. Although asymptotically the stripped partitioned algorithm S-SP on the CT-routed Hypercube would appear to be inferior to its checkerboard counterpart S-CP, detailed analysis based on the proportionality constants of the isoefficiency function shows that S-SP is actually more efficient than S-CP over a realistic range of machine and problem sizes. A milder form of this result holds on the CT- and SF-routed Mesh, where S-SP would, asymptotically, appear to be altogether unscalable.     

Creep rupture of lead-free Sn-3.5Ag-Cu solders

Creep-rupture properties of lead-free Sn-3.5Ag-based alloys with varying amount of Cu were investigated using rolled and heat-treated dog-bone-shaped specimens. Nominal compositions of added copper were 0 wt.%, 0.5 wt.%, 0.75 wt.%, 1.0 wt.%, and 1.5 wt.%. During creep tests, the matrix hardness dropped significantly, and the minimum strain rates ( ) were lowest for the 0.75Cu specimens. The stress exponents (n) of were usually around 4, with the exception of the 0.5Cu and 0.75Cu alloys, which showed somewhat higher values of n. Fractographic analyses revealed typical creep rupture by the nucleation and growth of cavities in the matrix except the 1.5Cu specimens, which showed cavity nucleation at brittle Cu₆Sn₅ particles.     

Growth of oriented diamond film on single crystalline 6H-SiC substrates

The bias-enhanced nucleation (BEN) technique in hot-filament chemical vapor deposition (HF-CVD) has been applied to single crystalline 6H-SiC substrates for the deposition of oriented diamond. The results of scanning electron microscopy (SEM) showed that on (000 ) face not only oriented diamond with relationship (111) Dia.//(000 )6H-SiC and 〈110〉Dia.//(11 0)6H-SiC, but also high nucleation density (>10⁹ cm⁻²) have been achieved. In the case of deposition on (0001) face of 6H-SiC under the same experimental conditions, although the nucleation density of diamond was enhanced, however, oriented diamond was not found. Diamond nucleation density is higher on (0001) face than that on (000 ) face. The differences in diamond oriented nucleation and nucleation density on these two faces are attributed to the difference of their specific free surface energy. The experimental results have shown that the 6H-SiC substrate surfaces are etched by the accelerated H-ions during BEN process, and many micro-triangular crystals with the faces of the kind {01 4} are formed on the substrate surface. Diamonds nucleate on the top of the micro-triangular crystals. Micro-Raman spectrum shows a strong feature of diamond crystals at 1334 cm⁻¹.     

Creep behavior of eutectic Sn-Cu lead-free solder alloy

Tensile creep behavior of precipitation-strengthened, tin-based eutectic Sn-0.7Cu alloy was investigated at three temperatures ranging from 303–393 K. The steady-state creep rates cover six orders of magnitude (10⁻³−10⁻⁸ s⁻¹) under the stress range of σ/E=10⁻⁴−10⁻³. The initial microstructure reveals that the intermetallic compound Cu₆Sn₅ is finely dispersed in the matrix of β-Sn. By incorporating a threshold stress, σ _th, into the analysis, the creep data of eutectic Sn-Cu at all temperatures can be fitted by a single straight line with a slope of 7 after normalizing the steady-state creep rate and the effective stress, indicating that the creep rates are controlled by the dislocation-pipe diffusion in the tin matrix. So the steady-state creep rate, , can be expressed as exp , where Q_c is the activation energy for creep, G is the temperature-dependent shear modulus, b is the Burgers vector, R is the universal gas constant, T is the temperature, σ is the applied stress, A is a material-dependent constant, and , in which σ _OB is the Orowan bowing stress, and k_R is the relaxation factor. An erratum to this article is available at .