磁性材料在EMI滤波器中的应用

磁性材料是EMI滤波器的关键材料。文章简单介绍了EMI滤波器所用磁性材料的特点,详细分析了共模滤波电感和差模滤波电感所用磁芯的基本特性,给出了共模滤波电感磁芯和差模滤波电感磁芯的温度特性。     

磁性材料在EMI滤波器中的应用

磁性材料是EMI滤波器中关键材料。本文在简单介绍EMI滤波器所用磁性材料特点基础上,详细分析了共模滤波电感和差模滤波电感所用磁芯的基本特性,并讨论了共模滤波电感磁芯和差模滤波电感磁芯的温度特性。     

EMI滤波器在反激式开关电源中的研究与实现

EMI滤波器是由电感、电容等构成的无源双向多端口网络,能衰减共模和差模干扰,提高电子仪器、计算机和测控系统的抗干扰能力及可靠性.本文在研究了EMI滤波器原理基础上,提出了EMI滤波器在反激式开关电源中的设计与实现.     

飞机直流母线变换器的输入电磁干扰滤波器设计

针对飞机直流270 V至直流28 V电源变换器的应用需求,分析了电源变换器输入端的传导及辐射电磁干扰源.通过对电源变换器的电磁干扰（electromagnetic interference,EMI）频谱进行分析,确定了滤波器的参数.为了抑制滤波器振荡,提出在差模电感两端并联电阻电感网络的方法,替代使用液态铝电容的传统方法,提升滤波器的可靠性.根据差模电感中电流直流分量远高于交流分量的特点,提出采用扁铜漆包线来实现绕组的方法,使差模电感的体积降低.根据锰锌铁氧体低频磁导率高,镍锌铁氧体高频磁导率稳定的特点,提出双磁芯共模电感的设计方法,实现共模电感宽频率和小体积.实测结果证明输入电磁干扰滤波器可使电源变换器符合GJB 151中CE102要求.     

EMI滤波器特性分析

文中给出了一般EMI滤波器的拓扑结构,分别指出其共模和差模等效电路,并对共模和差模等效电路进行化简。且分别对共模和差模电路中电容大小与插损的关系以及共模,差模电路两端输入输出阻抗与插损的关系作了仿真分析。结果表明,共模电容越大,插入损耗越大;共模滤波器两端的阻抗越小,插入损耗越大;差模电容越大,插入损耗越大;差模滤波器两端阻抗越大,插入损耗越大。     

平面集成LC结构及差模电容的优化设计

针对滤波器当前小型化和集成化的发展趋势,在简述现有平面集成EMI滤波器设计缺陷基础上,对其集成LC结构和差模电容分别进行了优化设计。提出了环形集成LC结构,仿真和计算结果表明其在电磁特性及几何尺寸上相对于矩形的优点。为了优化设计差模电容,对一种采用较小介电常数的材料实现较大差模电容值且可以降低等效电感的方法进行研究分析,应用ANSYS软件进行建模计算,并验证了方法的可行性。     

基于AC-link技术的充电电源EMI滤波器改进设计

一款基于AC-link技术的90 kW三相开关电源的传导干扰超标。通过建立电感及电容的高频等效电路,提取印制板走线寄生参数;建立EMI滤波器共模和差模滤波模型,仿真分析其插入损耗;并根据其传导干扰测试结果和滤波器仿真结果,改进设计了EMI滤波器。实验结果证明,优化后的EMI滤波器满足开关电源的滤波需求。     

EMI电源滤波器的插入损耗分析

在一般EMI滤波器的共模和差模等效电路的基础上,分析了源阻抗和负载阻抗对滤波器插入损耗的影响.提出了共模插入损耗和差模插入损耗的计算方法,推导了滤波器插入损耗与阻抗关系的表达式,并且对这一关系作了仿真分析,仿真结果验证了理论计算和分析的正确性.     

平面磁集成EMI滤波器的等效并联电容分析

针对滤波器小型化、轻型化、薄型化的发展趋势,介绍了采用电感和电容并运用MAXWELL软件在PCB板上建立平面型PCBEMI集成滤波器的方法,同时根据仿真所需参数,重点分析了如何去除等效并联电容,并用Maxwell3D软件分析了不同嵌入长度对电容的影响．最后用Pspice软件分析了共模和差模插入损耗。     

EMI滤波器在反激式开关电源中的研究与实现

电源技术的发展使得体积小、高效能、高可靠性“绿色电源”成为下一代电源的发展趋势。但开关电源由于本身工作特性使得电磁干扰问题相当突出,电源作为一个电子系统中重要的部件,其可靠性决定了整个系统的可靠性。EMI（Electromagnetic Interference）滤波器是由电感、电容等构成的无源双向多端口网络,能衰减共模和差模干扰。提高电子仪器、计算机和测控系统的抗干扰能力及可靠性。在研究了EMI滤波器原理基础上,提出了EMI滤波器在反激式开关电源中的设计与实现。     

Improving the Characteristics of integrated EMI filters by embedded conductive Layers

Discrete electromagnetic interference (EMI) filters have been used for power electronics converters to attenuate switching noise and meet EMI standards for many years. Because of the unavoidable structural parasitic parameters of the discrete filter components, such as equivalent parallel capacitance (EPC) of inductors and equivalent series inductance (ESL) of capacitors, the effective frequency range of the discrete filter is normally limited. Aiming at improving high frequency performance and reducing size and profile, the integrated EMI filter structure has been proposed based on advanced integration and packaging technologies , . Some improvements have been made but further progress is limited by EPCs of the filter inductors, which is restricted by dimension, size and physical structure. In this paper, a new structural winding capacitance cancellation method for inductors is proposed. Other than trying to reduce EPCs, a conductive ground layer is embedded in the planar inductor windings and the structural capacitance between the inductor winding and this embedded layer is utilized to cancel the parasitic winding capacitance. In order to obtain the best cancellation effect, the structural winding capacitance model of the planar spiral winding structure is given and the equivalent circuit is derived. The design methodology of the layout and area of the embedded ground layer is presented. Applying this method, an improved integrated EMI filter is designed and constructed. The experimental results show that the embedded conductive layer can effectively cancel the parasitic winding capacitance, hence ideal inductor characteristics can be obtained. With the help of this embedded conductive layer, the improved EMI filter has much smaller volume and profile and much better characteristics over a wide frequency range, compared to the former integrated EMI filter and the discrete EMI filter.     

改进EMI滤波器的高频寄生效应方法

针对滤波器小型化、轻型化、薄型化方向发展的趋势,介绍了平面集成滤波器的概念,通过比较分立元器件滤波器与集成滤波器的异同,分析分立元器件的高频寄生效应,介绍了平面PCB如何构建电感和电容及有效去除其高频寄生效应。并用MAXWELL软件对其仿真,得出其高频寄生参数。最后通过ADS软件对其高频寄生参数建模,验证了该方法是有效的。     

交错并联Boost PFC电路的研究

提出了一种单相并联交错BoostPFC电路,升压电感采用分立式电感。详细论述电感电流断续模式下的BoostPFC交错并联电路,减小单个电感容量和前级EMI滤波器尺寸,提高PFC电路的功率等级和效率。仿真与实验结果表明,该PFC电路具有良好的校正效果,较小的输入电流纹波,较低的开关应力。     

电磁干扰中元件的高频特性研究

电力电子设备产生的电磁干扰都会超过可接受的水平,所以要利用滤波电路降低他们产生的EMI,这些滤波电路由串联扼流圈和并联电容器构成低通滤波器,文章对EMI滤波元件的高频特性进行分析,给出了电容、电感、电阻等的高频特性、等效电路以及仿真曲线。得出的结论体现出与工频下不同的特性,对滤波设计有重要指导意义。     

Filters with inductance cancellation using printed circuit board transformers

Capacitor parasitic inductance often limits the high-frequency performance of filters for power applications. However, these limitations can be overcome through the use of specially-coupled magnetic windings that effectively ify the capacitor parasitic inductance. This paper explores the use of printed circuit board (PCB) transformers to realize parasitic inductance cancellation of filter capacitors. Design of such inductance cancellation transformers is explored, and applicable design rules are established and experimentally validated. The high performance of the proposed inductance cancellation technology is demonstrated in an electromagnetic interference (EMI) filter design.     

A unified RLC model for high-speed on-chip interconnects

In this paper, we propose a compact on-chip interconnect model for full-chip simulation. The model consists of two components, a quasi-three-dimensional (3-D) capacitance model and an effective loop inductance model. In the capacitance model, we propose a novel concept of effective width (W/sub eff/) for a 3-D wire, which is derived from an analytical two-dimensional (2-D) model combined with a new analytical "wall-to-wall" model. The effective width provides a physics-based approach to decompose any 3-D structure into a series of 2-D segments, resulting in an efficient and accurate capacitance extraction. In the inductance model, we use an effective loop inductance approach for an analytic and hierarchical model construction. In particular, we show empirically that high-frequency signals (above multi-GHz) propagating through random signal lines can be approximated by a quasi-TEM mode relationship, leading to a simple way to extract the high-frequency inductance from the capacitance of the wire. Finally, the capacitance and inductance models are combined into a unified frequency-dependent RLC model, describing successfully the wide-band characteristics of on-chip interconnects up to 100 GHz. Non-orthogonal wire architecture is also investigated and included in the proposed model.     

变压器耦合式直流固体继电器传导发射分析与抑制

在采用变压器耦合作为隔离电路的固体继电器中,变压器工作在自激振荡状态,通过磁芯将高频信号传递到变压器次级。这使得变压器成为对外传导发射的主要干扰源,严重时会影响到其他电子设备的正常工作。文中以某型号变压器耦合式直流固体继电器为研究对象,首先根据GJB1515A 中CE102(10kHz-10MHz 电源线传导发射要求)的规定,试验测量得到输入端电源线对外传导发射。首先,将传导发射分为差模干扰和共模干扰两种形式,并分析了传导发射的干扰源和主要传播通道。其次,在建立考虑铁心损耗和绕组铜损的变压器高频模型的基础上,利用ANSOFT Q3D 和Orcad Pspice 仿真软件得到该固体继电器用于传导发射分析的等效电路模型。仿真结果与试验结果相吻合,均表明该继电器输入端电源线对外传导发射超出国军标的要求。为抑制传导发射,文中提出在固体继电器输入端串入EMI 滤波器的优化方案。试验结果显示,优化后输入端电源线对外传导发射低于国军标的规定,提高了变压器耦合式固体继电器的电磁兼容性能。     

无隔模带磁控管谐振系统的理论分析与仿真

为了提高磁控管稳定性,需要研究各耦合因素对磁控管谐振频率及模式分隔度的影响。该文采用等效电路的方法,给出了无隔模带磁控管在电容、电感耦合下的谐振频率及模式分隔度的表达式,并分析谐振频率随模数的变化趋势及电感、电容耦合强弱对模式分隔度的影响。采用CST-MWS软件对不同阴极半径及顶盖高度的谐振系统的谐振频率进行仿真,并将仿真结果与理论结果进行对比。理论分析与计算机仿真表明,对于无隔模带磁控管谐振系统,电容耦合使谐振频率随模数的增大而增大,电感耦合使谐振频率随模数的增大而减小;两者分别通过增大和降低模频率从而增大模式分隔度,两者共同作用时模谱图取决于占主导地位的耦合因素。