Monte Carlo simulation of impact ionization in SiGe HBTs

Measurements and Monte Carlo simulations of impact ionization in the base-collector region of SiGe HBTs are presented. A device with low germanium concentration (graded from 0 to 12%) is considered and no differences are found between the experimental multiplication factor in that device and the corresponding silicon control. Because impact ionization (II) occurs inside the bulk-Si collector, phonon and II scattering rates for bulk silicon can be used in the Monte Carlo simulation, avoiding the need to model the strained SiGe layers. Full-Band Monte Carlo simulations are shown to reproduce the multiplication factors measured in SiGe devices featuring different collector profiles     

BV/sub CEO/--BV/sub CBO/ separation and sharpness of breakdown in high-speed bipolar transistors

The effect of secondary impact ionization by the noninitiating carrier on the near avalanche behavior of high-speed n-p-n bipolar transistors is studied. We show that secondary collector ionization by generated holes traveling back toward the base layer significantly reduces BV/sub CBO/ if the hole ionization coefficient is higher than that of electrons [/spl beta//sub p/(E)>/spl alpha//sub n/(E)]: positive feedback associated with a strong secondary ionization sharpens the breakdown characteristic by speeding up carrier multiplication and decreases separation between the open-base collector-emitter (BV/sub CEO/) and the open-emitter base-collector (BV/sub CBO/) breakdown voltages. The effect of secondary ionization on the BV/sub CEO/-BV/sub CBO/ separation has not previously been described. Multiplication coefficient comparisons for representative InP, GaAs, and Si collectors indicate all structures can sustain low-current above BV/sub CEO/ operation from a transport (nonthermal) point of view, although the different degrees of secondary ionization in various semiconductors lead to fundamental differences when InP is compared to GaAs and Si since for the latter materials /spl beta//sub p/(E)相似文献   

Impact ionization in thin silicon diodes

We study the breakdown behavior of thin, abrupt silicon pin-diodes, using a low-power optical technique which can directly measure the avalanche multiplication factors even in the presence of large tunneling currents. Our measurements agree with a simple model for nonlocal avalanche generation, and we use this model to extend the breakdown predictions to a broad class of doped diodes similar to those found in the base-collector region of bipolar devices. Based on this analysis, we make quantitative estimates for the BV/sub CEO/ breakdown of modern Si and SiGe high-speed bipolar transistors.     

P型张应变Si/SiGe量子阱红外探测器的能带设计

提出P型张应变Si/SiGe量子阱红外探测器(QWIP)结构,应用k·P方法计算应变Si/SiGe量子阱价带能带结构和应变SiGe合金空穴有效质量.结果表明量子阱中引入张应变使轻重空穴反转,基态为有效质量较小的轻空穴态,因此P型张应变Si/SiGe QWIP与n型QWIP相比具有更低的暗电流;而与P型压应变或无应变QWIP相比光吸收和载流子输运特性具有较好改善.在此基础上讨论了束缚态到准束缚态子带跃迁型张应变p-Si/SiGe QWIP的优化设计.     

Temperature dependence of impact ionization in GaAs

The temperature dependence of electron and hole impact ionization in gallium arsenide (GaAs) has been determined from photomultiplication measurements at temperatures between 20 K and 500 K. It is found that impact ionization is suppressed by increasing temperature because of the increase in phonon scattering. Temperature variations in avalanche multiplication are shown to decrease with decreasing avalanching region width, and the effect is interpreted in terms of the reduced phonon scattering in the correspondingly reduced ionization path length. Effective electron and hole ionization coefficients are derived and are shown to predict accurately multiplication characteristics and breakdown voltage as a function of temperature in p/sup +/in/sup +/ diodes with i-regions as thin as 0.5 /spl mu/m.     

SiGe/Si单光子雪崩光电二极管仿真

通过理论模拟CMOS工艺兼容的SiGe/Si 单光子雪崩二极管,研究并讨论了掺杂条件对于电场分布、频宽特性、以及器件量子效率的影响。设计出具有浅结结构、可在盖革模式下工作、低击穿电压(30 V)的1.06 m单光子技术雪崩光电二极管。器件采用分离吸收倍增区结构,其中Si材料作为倍增区、SiGe材料作为吸收区,这充分利用了硅材料较高的载流子离化比差异,降低了器件噪声;在1.06 m波长下,SiGe探测器的量子效率为4.2%,相比于Si探测器的效率提高了4 倍。仿真表明优化掺杂条件可以优化电场分布,从而在APD击穿电压处获得更好的带宽特性。     

Avalanche multiplication properties of GaAs calculated from spatially transient ionisation coefficients

In this paper the high field phenomenon of avalanche multiplication in a GaAs p-i-n infrared detector is studied using a Monte-Carlo simulation. The Lucky-Drift model of impact ionization is used to give the characteristic lengths for transport through the device. The transport is then modelled by generating motion consistent with the probability functions derived from the mean free paths. This produces a spatially transient ionization coefficient for each carrier and allows the realistic statistical simulation of avalanche multiplication. Properties such as mean gain, multiplication noise and the transient response to a photonic pulse have been calculated and explained for a length of i-GaAs, with an emphasis on short active region phenomena. The effect on the ionization coefficients of a periodic field change has been investigated. It has been found that the effective carrier deadspace is approx. 1.35 times the absolute deadspace. The transient current calculations indicate the narrow bandwidth of this type of device. The presence of a periodic field change, caused by periodic δ-doping, was found to increase both electron and hole ionization coefficients by different proportions.     

Thickness Dependence of Hole Mobility in Ultrathin SiGe-Channel p-MOSFETs

A fundamental understanding of the mechanisms responsible for the dependence of hole mobility on SiGe channel layer thickness is presented for channel thicknesses down to 1.8 nm. This understanding is critical to the design of strained SiGe p-MOSFETs, as lattice mismatch limits the thickness of SiGe that can be grown on Si and as Ge outdiffusion during processing reduces the Ge fraction. Temperature-dependent measurements are used to extract the phonon-limited mobility as a function of SiGe channel thickness for strained Si_0.57Ge_0.43 heterostructures on bulk Si. The hole mobility is shown to degrade significantly for channel thickness below 4 nm due to a combination of phonon and interface scattering. Due to the finite nature of the quantum-well barrier, SiGe film thickness fluctuation scattering is not significant in this structure for channel thickness greater than 2.8 nm.     

Hg0.56 Cd0.44 Te 1.6- to 2.5-μm avalanchephotodiode and noise study far from resonant impact ionization

An investigation was made on the avalanche multiplication and impact ionization processes in p-n^--n⁺ junctions formed in Hg_0.56Cd_0.44Te solid solutions. Photocurrent multiplication was determined at 300 K in planar p-n^- -n⁺ structures characterized by a breakdown voltage of 30 V. The experimental results were used to calculate the electron, α, and hole, β, ionization coefficients. It was found that α is greater than β because Δ, the spin-orbit splitting energy, is higher than the bandgap energy. These experimental results were in satisfactory agreement with multiplication noise measurements using separate electron and hole injection     

应变Si1-xGex沟道PMOSFET空穴局域化研究

为充分利用应变 Si Ge材料相对于 Si较高的空穴迁移率 ,研究了 Si/Si Ge/Si PMOSFET中垂直结构和参数同沟道开启及空穴分布之间的依赖关系。在理论分析的基础上 ,以数值模拟为手段 ,研究了栅氧化层厚度、Si帽层厚度、Si Ge层 Ge组分及厚度、缓冲层厚度及衬底掺杂浓度对阈值电压、交越电压和空穴分布的影响与作用 ,特别强调了 δ掺杂的意义。模拟和分析表明 ,栅氧化层厚度、Si帽层厚度、Si Ge层 Ge组分、衬底掺杂浓度及 δ掺杂剂量是决定空穴分布的主要因素 ,而 Si Ge层厚度、缓冲层厚度和隔离层厚度对空穴分布并不敏感。最后总结了沟道反型及空穴分布随垂直结构及参数变化的一般规律 ,为优化器件设计提供了参考。     

A deep submicron Si1-xGex/Si vertical PMOSFETfabricated by Ge ion implantation

We report a deep submicron vertical PMOS transistor using strained Si_1-xGe_x channel formed by Ge ion implantation and solid phase epitaxy. These vertical structure Si_1-xGe_x /Si transistors can be fabricated with channel lengths below 0.2 μm without using any sophisticated lithographic techniques and with a regular MOS process. The enhancement of hole mobility in a direction normal to the growth plane of strained Si_1-xGe_x over that of bulk Si has been experimentally demonstrated for the first time using this vertical MOSFET. The drain current of these vertical MOS devices has been found to be enhanced by as much as 100% over control Si devices. The presence of the built-in electric field due to a graded SiGe channel has also been found to be effective in further enhancement of the drive current in implanted-channel MOSFET's     

Hole and electron mobility enhancement in strained SiGe verticalMOSFETs

We have fabricated strained SiGe vertical P-channel and N-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) by Ge ion implantation and solid phase epitaxy. No Si cap is needed in this process because Ge is implanted after gate oxide growth. The vertical MOSFETs are fabricated with a channel length below 0.2 μm without sophisticated lithography and the whole process is compatible with a regular CMOS process. The enhancement for the hole and electron mobilities in the direction normal to the growth plane of strained SiGe over that of bulk Si has been demonstrated in this vertical MOSFET device structure for the first time. The drain current for the vertical SiGe MOSFETs has been found to be enhanced by as much as 100% over the Si control devices and the drain current for the vertical SiGe NMOSFETs has been enhanced by 50% compared with the Si control de, ices on the same wafer. The electron mobility enhancement in the normal direction is not as significant as that for holes, which is in agreement with theoretical predictions     

Experimental determination of the avalanche region of one-sided abrupt barriers

In this paper is presented an experimental method for the determination of the width of the avalanche region of one-sided abrupt barriers at breakdown. The ionization rates of both electrons and holes are determined using the same experiments. The method is based on multiplication measurements corresponding to a primary current coming from the highly doped side of the junction. This primary current is obtained by varying the wavelength of a light spot applied to the highly doped side. This method is used to control the avalanche behaviour of P⁺N and N⁺P Si abrupt junctions. The avalanche region and ionization rates obtained are in good agreement with values already published.     

Photo carrier generation in bipolar transistors

Anomalous substrate currents have been observed in SiGe bipolar NPN-transistors, dependent on the collector bias, at high current levels. These currents appear to originate from light that is generated in the collector base junction when it is reverse biased. This light generates electron hole pairs in the n⁺ buried layer-substrate diode, yielding a considerable substrate current. This paper will show that these substrate currents can be used as a useful monitor for the occurrence of avalanche multiplication and high-level injection (Kirk effect) in heterojunction bipolar transistors (HBTs)     

Low avalanche noise characteristics in thin InP p+-i-n+ diodes with electron initiated multiplication

We have performed electron initiated avalanche noise measurements on a range of homojunction InP p⁺-i-n⁺ diodes with “i” region widths, w ranging from 2.40 to 0.24 μm. In contrast to McIntyre's noise model a significant reduction in the excess noise factor is observed with decreasing w at a constant multiplication in spite of α, the electron ionization coefficient being less than β, the hole ionization coefficient. In the w=0.24 μm structure an effective β/α ratio of approximately 0.4 is deduced from the excess noise factor even when electrons initiate multiplication, suggesting that hole initiated multiplication is not always necessary for the lowest avalanche noise in InP-based avalanche photodiodes     

Analytical model of drain current of Si/SiGe heterostructure p-channel MOSFETs for circuit simulation

An analytical model of drain current of Si/SiGe heterostructure p-channel MOSFETs is presented. A simple polynomial approximation is used to model the sheet carrier concentration (p/sub s//sup H/) in the two-dimensional hole gas at the Si/SiGe interface. The interdependence of p/sub s//sup H/ and the hole concentration at the Si/SiO/sub 2/ interface (p/sub s//sup S/) is taken into account in the model, which considers current flow at both the Si/SiGe and the Si/SiO/sub 2/ interfaces. This model is applicable to compressively strained SiGe buried-channel heterostructure PMOSFETs as well as tensile-strained surface-channel PMOSFETs. The model has been implemented in SABER, a circuit simulator. The results from the model show an excellent agreement with the experimental data.     

Extremely Low Excess Noise in InAs Electron Avalanche Photodiodes

Measurements of the avalanche multiplication noise in InAs p-i-n and n-i-p diodes at room temperature demonstrate unambiguously that the avalanche multiplication process is dominated by impact ionization of electrons. This results in the excess noise factor for electron initiated multiplication asymptotically approaching a maximum value just less than two and becoming virtually gain-independent for higher gains. Measurements for predominantly hole initiated multiplication show corresponding high excess noise factors suggesting the electron to hole ionization coefficient ratios are comparable to those reported for $hbox{Hg}_{1-{x}}hbox{Cd}_{x}hbox{Te}$ electron avalanche photodiodes.      

Theoretical small-signal performance of Si/SiGe/Si HBT

Application of the Monte Carlo technique to analyze electron and hole transport in bulk Si_0.8Ge_0.2 and strained Si _0.8Ge_0.2/Si is discussed. The computed minority- and majority-carrier transport properties were used in a comprehensive small-signal model to evaluate the high-frequency performance of a state-of-the-art n-p-n heterostructure bipolar transistors (HBT) fabricated with SiGe as the base material. The valence band discontinuity of a SiGe-base HBT reverses the degradation in emitter injection efficiency caused by bandgap narrowing in the base, and permits a higher ratio of base doping to emitter doping than would be practical for a bipolar transistor. Any degradative effect of increased base doping on electron and hole mobilities is offset by improved transport in the strained SiGe base, resulting in a marked decrease in the base resistance and base transit time. Compared to the Si BJT, the use of Si_0.8Ge_0.2 for the base region of an HBT leads to significant improvements in low-frequency common emitter current gain, low-frequency unilateral power gain, and maximum oscillation frequency     

Effect of dead space on gain and noise in Si and GaAs avalanchephotodiodes

The effect of dead space on the mean gain, the excess noise factor, and the avalanche breakdown voltage for Si and GaAs avalanche photodiodes (APDs) with nonuniform carrier ionization coefficients are examined. The dead space, which is a function of the electric field and position within the multiplication region of the APD, is the minimum distance that a newly generated carrier must travel in order to acquire sufficient energy to become capable of causing impact ionization. Recurrence relations in the form of coupled linear integral equations are derived to characterize the underlying avalanche multiplication process. Numerical solutions to the integral equations are obtained and the mean gain and the excess noise factor are computed     

Study of avalanche breakdown and impact ionization in 4H silicon carbide

Epitaxial p-n diodes in 4H SiC are fabricated with uniform avalanche multiplication and breakdown. Photomultiplication measurements were performed to determine electron and hole ionization rates. Theoretical values of critical fields and breakdown voltages in 4H SiC are calculated using the ionization rates obtained. We discuss ionization mechanisms in 4H SiC and make a comparison between silicon carbide and gallium nitride.