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1.
DW设备中电气焊点的形状很多,为了实现其焊接过程的自动化,必须能准确地定位和识别这些焊点。出于对实际情况的考虑,本文提出了一种基于图像处理的自动定位和识别方法。首先,采用自适应阈值分割技术实现对图像特征区域的增强;其次,采用Canny边缘检测算子精确定位特征区域边缘;再次,在特征区域边缘内执行膨胀算法获得闭合完整的特征区域;最后,利用模板匹配技术实现焊点特征的定位和识别。实验结果表明,本文提出的方法有效地解决了DW设备中焊点的定位和识别问题。  相似文献   

2.
芯片封装是保护芯片和增强芯片电热性能的重要工艺,在芯片粘贴在引线框架的贴片基板上后,用金属引线将芯片焊点与引线框架的管脚连接起来实现芯片功能。为了提高芯片引线键合的精度,确保键合机的焊头能够实现准确定位,采用基于紧支集双正交小波的多分辨率分析方法实现芯片和贴片基板边缘的快速检测和特征匹配,实现芯片和引线框架焊点的快速定位。这种方法能够实现芯片图像边缘特征的准确提取、识别和特征匹配。采用紧支集双正交小波进行芯片焊点和引线框架定位时,简化了算法的复杂度,提高了芯片引线框架焊点位置的检测效率和定位精度。  相似文献   

3.
三、从外观判断质量及不良焊点的修改方法用万用表测量电阻可检查焊点的导电性能;用轻微晃动的方法可检查焊点的牢固程度,这里再教大家一种简单直观的检查方法,即从焊点的外观形态大致判断焊接的质量好坏,从而可以边焊接,边对不良焊点进行修改。 1.良好的焊点:如图4(a)。它应该表面光滑、圆润、像小山一样,并且高度与底面积应成比例。元件的引线要尽量垂直于印刷板,以它为中心,周围的焊锡要匀称。元件的引线要露出少许,以便确认其高度。如果  相似文献   

4.
分析了图像处理中模板匹配技术计算量大的问题。在高精度的芯片焊点定位应用中,文章提出了一种新的结合遗传算法的快速变形模板匹配算法。该算法在应用中有很高的执行效率,而且还克服遗传算法应用的结果不确定性,通过变形模板匹配精确的计算出芯片与水平线夹角和芯片焊点相对位置。最后通过试验证明这种方法的高效性和准确性。  相似文献   

5.
针对BGA(Ball Grid Array)封装FPGA(Field Programmable Gate Array)焊接点连接失效的故障诊断问题,提出了一种故障检测系统设计方案;该方案分别从焊点级、芯片级和系统级故障诊断3个层次构建故障检测系统;方案基于Altera公司的DE2硬件平台构建单个焊点健康信息提取IP核;针对芯片焊点众多,难以全部监控的问题采用Canary故障检测法监测4个角落的敏感焊点的健康信息;敏感焊点的健康信息经菊花链式通信链路实现了不同FPGA芯片之间的信息互联,完成整个系统的焊点健康信息整合。  相似文献   

6.
基于视觉的薄钢板焊接机器人起始点识别与定位控制   总被引:3,自引:0,他引:3  
针对集装箱薄钢板对接焊,提出一种新颖的焊接机器人起始点识别和焊枪精确对中焊缝起始点的视觉控制方法.首先提出一种迭代圆形霍夫变换方法,自动确定了包含焊枪特征点的圆形感兴趣区域,第2次迭代可实现焊枪特征点的识别和提取,具有鲁棒性和快速性的优点.接着使用直线霍夫变换方法实现了焊缝直线的识别和焊缝特征点的提取,进而设计了基于图像空间的焊缝起始点视觉控制方案,实现了焊缝起始点的精确定位控制.实验结果表明,提出的方法具有很好的鲁棒性,能够精确地识别出焊枪和焊缝特征坐标.视觉控制法能够快速地将焊枪定位到焊缝起始点位置.集装箱厂现场焊接测试也证实了这些方法的有效性,得到了满意的结果.  相似文献   

7.
钱俊磊  杨志刚  刘利平 《控制工程》2003,10(Z2):169-170
应用PLC系统实现高强度管桩钢筋骨架滚焊机自动控制过程,通光电检测装置跟踪环筋和纵筋的交叉点并发出焊接信号,实现滚焊机焊点的自动检测,滚焊机收到焊接信号后对焊点进行焊接.牵引机构使焊接结束的钢筋骨架脱离焊机,并且根据检测骨架的长度支起托架支撑骨架,使其全长保持在同一水平线上直到焊接结束.该系统能够实现准确检测焊点、控制焊接过程和钢筋骨架牵引机构等功能,使焊接过程更加精确、效率更高.  相似文献   

8.
电池模组极片焊点的检测与定位是电池模组拆解成功的第一步.基于工人肉眼的焊点检测误差较大且效率低下,基于深度学习模型的检测价格昂贵且计算代价极大.对此,提出了基于Yolov3的小样本智能电池模组焊点检测与定位方法.对样本图像进行灰度化及高斯模糊处理,采用Yolov3算法对样本的目标数据集进行特征提取训练,再调整训练的网络模型参数,由训练数据所得到的模型用于电池模组焊点检测.实验表明,使用Yolov3网络的焊点检测准确率达到90%以上,且焊点定位具有极高的精度,能够满足实际应用的需求.  相似文献   

9.
韦玉科  陈玉  田洪金 《测控技术》2015,34(1):138-141
在点焊机的焊接生产线上,由于焊接工艺的不成熟,往往会导致虚焊、漏焊、焊穿等现象,会极大地影响产品的使用寿命、美观等,需要对其进行质量检测.针对传统检测方法的低效率,提出采用机器视觉的方法来对焊点进行检测,并给出一种图像处理方法:对图像进行平滑处理,然后使用Otsu方法对图像进行阈值分割,并对得到的图像做倒三角距离变换,将像素点信息转化为灰度信息,采用分水岭算法准确地分割出焊点,最后通过面积等特征计算对焊点缺陷进行分类.实验证明,该方法较传统的检测方法,能有效地检测出多种不同排列的焊点,提高了工业生产效率.  相似文献   

10.
微电子组装过程中,焊点形态直接影响焊点的质量和可靠性.对焊点形态的预测是焊点质量控制和可靠性分析的基础.本文采用有限元方法,并结合能量最小原理实现了焊点三维形态的预测.通过建立有限元模型,进行边界和体积约束,重力势能和表面势能约束,完成了表贴电阻的焊点三维形态预测,并对形态预测中的网格畸变进行了修正.经试验验证焊点形态预测准确,为焊点的质量和可靠性分析打下了基础.  相似文献   

11.
The author developed a low-temperature (80°C), low-external loads (electric field, magnetic field, load, etc.) bonding technology using water glass which is used in making molds (silica sand). The adhesive area ratio attained by this bonding technology was more than 95% and the bonding strength was about 290 kgf/cm2. As this water glass bonding technology is applicable at comparatively low-temperatures, the residual stress of the bond is so small as to be able to bond eight 4-inch wafers together in the 3rd dimensional direction. In addition, as the thickness of a bonding layer is as small as several nanometers, the precision bonding of a tolerance of ±3 μm was also possible through alignment, and we could successfully fixed a cap with having a bonding seal of 0.32 mm wide in the vacuum. The leak rate was less than the detection limit of the He leak detector (1×10−10 Pa m3/s), showing excellent air-tightness. Using this bonding technology, the author made a self-package type IR microsensor on an experimental basis, and carried out an accelerated environmental test. As a result, its MTTF (mean time to failure) was estimated to be 6 years.  相似文献   

12.
Low-temperature wafer-level transfer bonding   总被引:2,自引:0,他引:2  
In this paper, we present a new wafer-level transfer bonding technology. The technology can be used to transfer devices or films from one substrate wafer (sacrificial device wafer) to another substrate wafer (target wafer). The transfer bonding technology includes only low-temperature processes; thus, it is compatible with integrated circuits. The process flow consists of low-temperature adhesive bonding followed by sacrificially thinning of the device wafer. The transferred devices/films can be electrically interconnected to the target wafer (e.g., a CMOS wafer) if required. We present three example devices for which we have used the transfer bonding technology. The examples include two polycrystalline silicon structures and a test device for temperature coefficient of resistance measurements of thin-film materials. One of the main advantages of the new transfer bonding technology is that transducers and integrated circuits can be independently processed and optimized on different wafers before integrating the transducers on the integrated circuit wafer. Thus, the transducers can be made of, e.g., monocrystalline silicon or other high-temperature annealed, high-performance materials. Wafer-level transfer bonding can be a competitive alternative to flip-chip bonding, especially for thin-film devices with small feature sizes and when small electrical interconnections (<3×3 μm2) between the devices and the target wafer are required  相似文献   

13.
In this paper a fully IC-compatible silicon wafer-to-wafer fusion-bonding process is described. Before the bonding, the silicon surfaces are treated by chemicals which do not attack the electronic circuits or aluminium patterns on the silicon. The prebonding of the two silicon wafers is performed at room temperature. after which bonding takes place through annealing at temperatures between 120 and 400°C without affecting the performance of the electronic circuitry. The bonding is sufficiently strong for microsensor applications.  相似文献   

14.
This paper presents a Si cap zero-level packaging technique based on a double-layer BCB sealing ring. The BCB ring is defined before the housing cavity etching to achieve high BCB bonding strength. It is found that the non-uniformity of the BCB ring defined on a Si cap with housing cavity prevents the package having high bonding strength. Three different packages have been prepared for shear test; a Si cap without cavity, a recessed Si cap with a conventional BCB ring and a recessed Si cap with pre-defined BCB ring. The three samples for each type of package are measured. The average measured bonding strengths of the test samples are 71, 16 and 42?MPa, respectively, and hence the proposed BCB sealing ring process provides 60?% of bonding strength of Si cap package without cavity for Si cap package with cavity. In addition, the insertion loss change of the packaged CPW is less than 0.1?dB up to 67?GHz while the return loss better than 15?dB at the measured frequency range.  相似文献   

15.

In this paper, an Otto coupling configuration based SPR chip is designed, simulated and fabricated using a silicon-on-quartz (SoQ) bonding process. The simulation of the SPR effect is conducted using COMSOL Multiphysics simulator (Altsoft Co.) using the designed chip dimensions, the optical constants are interpolated from data available in the literature. The size of the fabricated SPR chip is \(30\; \times \;30\; \times \;1 {\text{mm}}^{3}\). Resonance angle and reflectance are measured to be 42.19° and 0.411°, respectively, using an automated reflectometer. Discrepancy between measurement and simulation results is discussed by optical constant of the gold layer used as a thin metal film. The SoQ bonding process is a feasible approach for implementation of Otto coupling configuration based SPR chips.

  相似文献   

16.
In recent years, electron attraction, real or apparent, has been studied in various areas of science and technology. By simulating the dynamical behavior of the molecules H2, Li72, B112, C122, N142, O162, Li7H, CH4, and H20 in their ground states, and H2 in its first excited state, we show that the inclusion of electron attraction in the simulation yields, in all cases, correct bond lengths, correct vibrational frequencies, and, where significant, correct bond angles, whereas excluding electron attraction never does.  相似文献   

17.
The bond strength dependence on bonding temperature and bonding pressure in traditional thermal bonding and surface modification bonding of PMMA is investigated. The results show that the bond strength of the latter bonding method is larger than the former. The effects of post-annealing and aging on bond strength are also demonstrated. Then the bonding parameters of temperature and pressure are optimized, and typical bond strength of 1 MPa is obtained at bonding temperature of 95°C, bonding pressure at 2 MPa, bonding time for 3 min and 50°C post-annealing for 2 h. The successful bonded microfluidic device was obtained through this optimized thermal bonding method.  相似文献   

18.
The void formation has been systematically observed for low-temperature (120/spl deg/C and 400/spl deg/C) Si-Si and SiO/sub 2/-SiO/sub 2/ wafer bonding techniques in function of the annealing time (from 70 to 595 h), pressure (low vacuum and atmospheric) and surface pretreatments. Mixed solution (H/sub 2/SO/sub 4/ and H/sub 2/O/sub 2/) standard cleaning, warm nitric acid and O/sub 2/-plasma-assisted surface pretreatments have been considered and compared. The void formation is clarified according to the void distribution and the measurement of surface energy. Long annealing time periods are considered in order to reach the saturation of the interface chemical reactions. Our experiments demonstrate that the origin of voids appearing in low temperature O/sub 2/-plasma-enhanced wafer bonding is related to the great quantity of chemical reaction products. It has been shown that optimized O/sub 2/-plasma pretreatment time can lead to void-free, uniform and high surface energy (over 2.0 J/m/sup 2/) wafer bonding. In the case of SiO/sub 2/-SiO/sub 2/ wafer bonding, our experimental results show that below a certain critical silicon dioxide thickness the reaction products cannot be absorbed totally and then voids occur. Presenting a higher surface energy than warm nitric acid O/sub 2/-plasma is an extremely promising surface pretreatment solution for the increasing demand of low-temperature wafer bonding techniques.  相似文献   

19.
Low temperature wafer direct bonding   总被引:11,自引:0,他引:11  
A pronounced increase of interface energy of room temperature bonded hydrophilic Si/Si, Si/SiO2, and SiO2/SiO 2 wafers after storage in air at room temperature, 150°C for 10-400 h has been observed. The increased number of OH groups due to a reaction between water and the strained oxide and/or silicon at the interface at temperatures below 110°C and the formation of stronger siloxane bonds above 110°C appear to be the main mechanisms responsible for the increase in the interface energy. After prolonged storage, interface bubbles are detectable by an infrared camera at the Si/Si bonding seam. Desorbed hydrocarbons as well as hydrogen generated by a reaction of water with silicon appear to be the major contents in the bubbles. Design guidelines for low temperature wafer direct bonding technology are proposed  相似文献   

20.
The new subproject B8 “Adhesive processing in batch technology for the manufacturing of microsystems” has the goal to compile bases for batchable joining techniques based on adhesive systems. This paper presents an alternative adhesive bonding system, which is able to join very small parts as well as relatively big parts with high accuracy requirements. The main advantages are the possibility to apply small volumes, to pre-apply the adhesive with a temporarily delayed joining procedure and extremely short set cycles. Therefore, using hot melts can be a technologically and economically interesting alternative for the assembly and packaging of MEMS.  相似文献   

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