Structural and electrical characteristics of RF-sputtered HfO2 high-k based MOS capacitors

The HfO₂ high-k thin films have been deposited on p-type (1 0 0) silicon wafer using RF magnetron sputtering technique. The XRD, AFM and Ellipsometric characterizations have been performed for crystal structure, surface morphology and thickness measurements respectively. The monoclinic structured, smooth surface HfO₂ thin films with 9.45 nm thickness have been used for Al/HfO₂/p-Si metal-oxide-semiconductor (MOS) structures fabrication. The fabricated Al/HfO2/Si structure have been used for extracting electrical properties viz dielectric constant, EOT, barrier height, doping concentration and interface trap density through capacitance voltage and current-voltage measurements. The dielectric constant, EOT, barrier height, effective charge carriers, interface trap density and leakage current density are determined are 22.47, 1.64 nm, 1.28 eV, 0.93 × 10¹⁰, 9.25 × 10¹¹ cm⁻² eV⁻¹ and 9.12 × 10⁻⁶ A/cm² respectively for annealed HfO₂ thin films.     

ALD of LaHfOx nano-laminates for high-κ gate dielectric applications

Electrical properties and thermal stability of LaHfO_x nano-laminate films deposited on Si substrates by atomic layer deposition (ALD) have been investigated for future high-κ gate dielectric applications. A novel La precursor, tris(N,N′-diisopropylformamidinato) lanthanum [La(ⁱPrfAMD)₃], was employed in conjunction with conventional tetrakis-(ethylmethyl)amido Hf (TEMA Hf) and water (H₂O). The capacitance-voltage curves of the metal oxide semiconductor capacitors (MOSCAPs) showed negligible hysteresis and frequency dispersion, indicating minimal deterioration of the interface and bulk properties. A systematic shift in the flat-band voltage (V_fb) was observed with respect to the change in structure of nano-laminate stacks as well as La₂O₃ to HfO₂ content in the films. The EOTs obtained were in the range of ∼1.23-1.5 nm with leakage current densities of ∼1.3 × 10⁻⁸ A/cm² to 1.3 × 10⁻⁵ A/cm² at V_fb − 1 V. In addition, the films with a higher content of La₂O₃ remained amorphous up to 950 °C indicating very good thermal stability, whereas the HfO₂ rich films crystallized at lower temperatures.     

A low gate leakage current and small equivalent oxide thickness MOSFET with Ti/HfO2 high-k gate dielectric

Annealing effects on electrical characteristics and reliability of MOS device with HfO₂ or Ti/HfO₂ high-k dielectric are studied in this work. For the sample with Ti/HfO₂ higher-k dielectric after a post-metallization annealing (PMA) at 600 °C, its equivalent oxide thickness value is 7.6 Å and the leakage density is about 4.5 × 10⁻² A/cm². As the PMA is above 700 °C, the electrical characteristics of MOS device would be severely degraded.     

Investigation of atomic vapour deposited TiN/HfO2/SiO2 gate stacks for MOSFET devices

HfO₂ films were grown by atomic vapour deposition (AVD) on SiO₂/Si (1 0 0) substrates. The positive shift of the flat band voltage of the HfO₂ based metal-oxide-silicon (MOS) devices indicates the presence of negative fixed charges with a density of 5 × 10¹² cm⁻². The interface trap charge density of HfO₂/SiO₂ stacks can be reduced to 3 × 10¹¹ eV⁻¹ cm⁻² near mid gap, by forming gas annealing. The extracted work function of 4.7 eV preferred the use of TiN as metal gate for PMOS transistors. TiN/HfO₂/SiO₂ gate stacks were integrated into gate-last-formed MOSFET structures. The extracted maximum effective mobility of HfO₂ based PMOS transistors is 56 cm²/Vs.     

Hf-O-N and HfO2 barrier layers for Hf-Ti-O gate dielectric thin films

Hf-O-N and HfO₂ thin films were evaluated as barrier layers for Hf-Ti-O metal oxide semiconductor capacitor structures. The films were processed by sequential pulsed laser deposition at 300 °C and ultra-violet ozone oxidation process at 500 °C. The as-deposited Hf-Ti-O films were polycrystalline in nature after oxidation at 500 °C and a fully crystallized (o)-HfTiO₄ phase was formed upon high temperature annealing at 900 °C. The Hf-Ti-O films deposited on Hf-O-N barrier layer exhibited a higher dielectric constant than the films deposited on the HfO₂ barrier layer. Leakage current densities lower than 5 × 10 A/cm² were achieved with both barrier layers at a sub 20 Å equivalent oxide thickness.     

Fabrication and electrical characteristics of ultrathin (HfO2)x(SiO2)1−x films by surface sol-gel method and reaction-anneal treatment

Hafnium oxide (HfO₂) films were deposited on Si substrates with a pre-grown oxide layer using hafnium chloride (HfCl₄) source by surface sol-gel process, then ultrathin (HfO₂)_x(SiO₂)_1−x films were fabricated due to the reaction of SiO₂ layer with HfO₂ under the appropriate reaction-anneal treatment. The observation of high-resolution transmission electron microscopy indicates that the ultrathin films show amorphous nature. X-ray photoelectron spectroscopy analyses reveal that surface sol-gel derived ultrathin films are Hf-Si-O alloy instead of HfO₂ and pre-grown SiO₂ layer, and the composition was Hf_0.52Si_0.48O₂ under 500 °C reaction-anneal. The lowest equivalent oxide thickness (EOT) value of 0.9 nm of film annealed at 500 °C has been obtained with small flatband voltage of −0.31 V. The experimental results indicate that a simple and feasible solution route to fabricate (HfO₂)_x(SiO₂)_1−x composite films has been developed by means of combination of surface sol-gel and reaction-anneal treatment.     

Effect of RuO2 electrode on laser-MBE prepared HfO2 gate dielectrics

In this paper, we report our recent study of the effect of RuO₂ as an alternative top electrode for pMOS devices to overcome the serious problems of polysilicon (poly-Si) gate depletion, high gate resistance and dopant penetration in the trend of down to 50 nm devices and beyond. The conductive oxide RuO₂, prepared by RF sputtering, was investigated as the gate electrode on the Laser MBE (LMBE) fabricated HfO₂ for pMOS devices. Structural, dielectric and electric properties were investigated. RuO₂/HfO₂/n-Si capacitors showed negligible flatband voltage shift (<10 mV), very strong breakdown strength (>10 MV cm⁻¹). Compared to the SiO₂ dielectric with the same EOT value, RuO₂/HfO₂/n-Si capacitors exhibited at least 4 orders of leakage current density reduction. The work function value of the RuO₂ top electrode was calculated to be about 5.0 eV by two methods, and the effective fixed oxide charge density was determined to be 3.3 × 10¹² cm⁻². All the results above indicate that RuO₂ is a promising alternative gate electrode for LMBE grown HfO₂ gate dielectrics.     

Schottky barrier SOI-MOSFETs with high-k La(2)O(3)/ZrO(2) gate dielectrics

Schottky barrier SOI-MOSFETs incorporating a La₂O₃/ZrO₂ high-k dielectric stack deposited by atomic layer deposition are investigated. As the La precursor tris(N,N′-diisopropylformamidinato) lanthanum is used. As a mid-gap metal gate electrode TiN capped with W is applied. Processing parameters are optimized to issue a minimal overall thermal budget and an improved device performance. As a result, the overall thermal load was kept as low as 350, 400 or 500 °C. Excellent drive current properties, low interface trap densities of 1.9 × 10¹¹ eV⁻¹ cm⁻², a low subthreshold slope of 70-80 mV/decade, and an I_ON/I_OFF current ratio greater than 2 × 10⁶ are obtained.     

LaScO3 as a higher-κ dielectric for p-MOSFETs

The electrical properties of MOS capacitors with LaScO₃ thin films grown by molecular beam deposition (MBD) have been studied with and without post deposition annealing (PDA) in O₂ environment followed by forming gas. An EOT of 0.65 nm could be achieved for samples without PDA. However, the films suffer from large hysteresis and interface trap density. Applying PDA reduces the hysteresis, the D_it (down to the mid of 10¹¹ (eV cm²)⁻¹) and the leakage current by two orders of magnitude (down to the range of 10⁻⁴A/cm²) for an EOT of 1.1 nm. Furthermore we have successfully integrated LaScO₃ into FD MOSFETs on SOI substrates. The p-FETs with LaScO₃ show excellent characteristics with a steep subthreshold slope down to 65 mV/dec and hole mobilities comparable to HfO₂ and HfSiON.     

Remote phonon and surface roughness limited universal electron mobility of In0.53Ga0.47As surface channel MOSFETs

The inversion layer electron mobility in n-channel In_0.53Ga_0.47As MOSFET’s with HfO₂ gate dielectric with several substrate impurity concentrations (∼1 × 10¹⁶ cm⁻³ to ∼1 × 10¹⁸ cm⁻³) and various surface preparations (HF surface clean, (NH₄)₂S surface clean and PECVD a-Si interlayer with a HfO₂ gate dielectric) have been studied. The peak electron mobility is observed to be strongly dependent on the surface preparation, but the high field mobility is observed to be almost independent of the surface preparation. A detailed analysis of the effective mobility as a function of electric field, substrate doping, and temperature was used to determine the various mobility components (surface roughness, phonon, and coulombic scattering limited mobility components). For the substrates with high doping concentration, the electron mobility at low vertical electric field is dominated by Coulomb scattering from the substrate dopants, whereas, for lower substrate doping the Coulombic scattering is dominated by the disorder induced gap states. Low temperature measurements were used to determine the surface roughness scattering and phonon components. The results show that room temperature mobility of In_0.53Ga_0.47As surface channel MOSFETs with HfO₂ gate dielectric at high electric field is limited primarily by remote phonons whereas the Al₂O₃ gate dielectric is limited by surface roughness scattering.     

High-mobility pentacene thin-film transistor by using LaxTa(1−x)Oy as gate dielectric

Pentacene organic thin-film transistors (OTFTs) using La_xTa_(1−x)O_y as gate dielectric with different La contents (x = 0.227, 0.562, 0.764, 0.883) have been fabricated and compared with those using Ta oxide or La oxide. The OTFT with La_0.764Ta_0.236O_y can achieve a carrier mobility of 1.21 cm² V⁻¹s⁻¹s, which is about 40 times and two times higher than those of the devices using Ta oxide and La oxide, respectively. As supported by XPS, AFM and noise measurement, the reasons lie in that La incorporation can suppress the formation of oxygen vacancies in Ta oxide, and Ta content can alleviate the hygroscopicity of La oxide, resulting in more passivated and smoother dielectric surface and thus larger pentacene grains, which lead to higher carrier mobility.     

The properties of high-k gate dielectric films deposited on HRSOI

In this paper, HfO₂ dielectric films with blocking layers (BL) of Al₂O₃ were deposited on high resistivity silicon-on-insulator (HRSOI), and the interfacial and electrical properties are reported. High-resolution transmission electron microscopy (HRTEM) indicated that BL could thin the interfacial layer, keep the interface smooth, and retain HfO₂ amorphous after annealing. Energy dispersive X-ray spectroscopy (EDS) and X-ray photoelectron spectroscopy (XPS) confirmed that BL weaken Si diffusion and suppressed the further growth of HfSiO. Electrical measurements indicated that there was no hysteresis was observed in capacitance–voltage curves, and Flatband shift and interface state density is 0.05 V and −1.3 × 10¹² cm⁻², respectively.     

Transport and interface states in high-κ LaSiOx dielectric

The paper presents the results of capacitance-voltage, conductance-frequency and current-voltage characterization in the wide temperature range (140-300 K) as well as results of low temperature (5-20 K) thermally stimulated currents (TSC) measurements of metal-oxide-semiconductor (MOS) structures with a high-κ LaSiO_x dielectric deposited on p- and n-type Si(1 0 0) substrate. Interface states (D_it) distribution determined by several techniques show consistent result and demonstrates the adequacy of techniques used. Typical maxima of interface states density were found as 4.6 × 10¹¹ eV⁻¹cm⁻² at 0.2 eV and 7.9 × 10¹¹ eV⁻¹cm⁻² at 0.77 eV from the silicon valence band. The result of admittance spectroscopy showed the presence of local states in bandgap with activation energy E_a = 0.38 eV from silicon conductance band, which is in accord with interface states profile acquired by conductance method. Low-temperature TSC spectra show the presence of shallow traps at the interface with activation energies ranging from 15 to 32 meV. The charge carrier transport through the dielectric film was found to occur via Poole-Frenkel mechanism at forward bias.     

Anomalous thermal oxidation of gadolinium thin films deposited on silicon by high pressure sputtering

Thin gadolinium metallic layers were deposited by high-pressure sputtering in pure Ar atmosphere. Subsequently, in situ thermal oxidation was performed at temperatures ranging from 150 to 750 °C. At an oxidation temperature of 500 °C the films show a transition from monoclinic structure to a mixture of monoclinic and cubic. Regrowth of interfacial SiO_x is observed as temperature is increased, up to 1.6 nm for 750 °C. This temperature yields the lowest interface trap density, 4 × 10¹⁰ eV⁻¹ cm⁻², but the effective permittivity of the resulting dielectric is only 7.4. The reason of this low value is found on the oxidation mechanism, which yields a surface with located bumps. These bumps increase the average thickness, thus reducing the capacitance and therefore the calculated permittivity.     

High-k HfO2-Ta2O5 mixed layers: Electrical characteristics and mechanisms of conductivity

Electrical properties of mixed HfO₂-Ta₂O₅ films (10;15 nm) deposited by rf sputtering on Si have been studied from the view point of their applications as high-k layers, by standard capacitance-voltage and temperature dependent current-voltage characteristics. The effect of HfO₂ addition to the Ta₂O₅ is thickness dependent and the thicker layers exhibit advantages over the pure Ta₂O₅ (higher dielectric constant, enhanced charge storage density and improved interface quality). The process of HfO₂ and Ta₂O₅ mixing introduces negative oxide charge, tends to creates shallow bulk traps and modifies the dominant conduction mechanisms in the stack capacitors as compared to the Ta₂O₅-based one (a contribution of tunneling processes through traps located below the conduction band of mixed layers to the leakage current in the HfO₂-Ta₂O₅ stacks is observed). The traps involved in both Poole-Frenkel and tunneling processes are identified.     

Charge trapping and interface characteristics in normally-off Al2O3/GaN-MOSFETs

Normally-off GaN-MOSFETs with Al₂O₃ gate dielectric have been fabricated and characterized. The Al₂O₃ layer is deposited by ALD and annealed under various temperatures. The saturation drain current of 330 mA/mm and the maximum transconductance of 32 mS/mm in the saturation region are not significantly modified after annealing. The subthreshold slope and the low-field mobility value are improved from 642 to 347 mV/dec and from 50 to 55 cm² V⁻¹ s⁻¹, respectively. The I_D-V_G curve shows hysteresis due to oxide trapped charge in the Al₂O₃ before annealing. The amount of hysteresis reduces with the increase of annealing temperature up to 750 °C. The Al₂O₃ layer starts to crystallize at a temperature of 850 °C and its insulating property deteriorates.     

High performance TaYOx-based MIM capacitors

TaYO_x-based metal-insulator-metal (MIM) capacitors with excellent electrical properties have been fabricated. Ultra-thin TaYO_x films in the thickness range of 15-30 nm (EOT ∼ 2.4-4.7 nm) were deposited on Au/SiO₂ (100 nm)/Si (100) structures by rf-magnetron co-sputtering of Ta₂O₅ and Y₂O₃ targets. TaYO_x layers were characterized by X-ray photoelectron spectroscopy (XPS), energy dispersive X-ray (EDX) and X-ray diffraction (XRD) to examine the composition and crystallinity. An atomic percentage of Ta:Y = 58.32:41.67 was confirmed from the EDX analysis while XRD revealed an amorphous phase (up to 500 °C) during rapid thermal annealing. Besides, a high capacitance density of ∼3.7-5.4 fF/μm² at 10 kHz (ε_r ∼ 21), a low value of VCC (voltage coefficients of capacitance, α and β) have been achieved. Also, a highly stable temperature coefficient of capacitance, TCC has been obtained. Capacitance degradation phenomena in TaYO_x-based MIM capacitors under constant current stressing (CCS at 20 nA) have been studied. It is observed that degradation depends strongly on the dielectric thickness and a dielectric breakdown voltage of 3-5 MV/cm was found for TaYO_x films. The maximum energy storage density was estimated to be ∼5.69 J/cm³. Post deposition annealing (PDA) in O₂ ambient at 400 °C has been performed and further improvement in device reliability and electrical performances has been achieved.     

Characteristics of metal-ferroelectric-insulator-semiconductor structure using Sr0.8Bi2.2Ta2O9 and Sr0.8Bi2.2Ta2O9-BaZrO3 for ferroelectric gates

Characteristics of BaZrO₃ (BZO) modified Sr_0.8Bi_2.2Ta₂O₉ (SBT) thin films fabricated by sol-gel method on HfO₂ coated Si substrates have been investigated in a metal-ferroelectric-insulator-semiconductor (MFIS) structure for potential use in a ferroelectric field effect transistor (FeFET) type memory. MFIS structures consisting of pure SBT and doped with 5 and 7 mol% BZO exhibited memory windows of 0.81, 0.82 and 0.95 V with gate voltage sweeps between −5 and +5 V, respectively. Leakage current density levels of 10⁻⁸ A/cm² for BZO doped SBT gate materials were observed and attributed to the metallic Bi on the surface as well as intrinsic defects and a porous film microstructure. The higher than expected leakage current is attributed to electron trapping/de-trapping, which reduces the data retention time and memory window. Further process improvements are expected to enhance the electronic properties of doped SBT for FeFET.     

A novel thermally-stable zirconium amidinate ALD precursor for ZrO2 thin films

ZrO₂ thin films were deposited by the atomic layer deposition process on Si substrates using tetrakis(N,N′-dimethylacetamidinate) zirconium (Zr-AMD) as a Zr precursor and H₂O as an oxidizing agent. Tetrakis (ethylmethylamino) zirconium (TEMA-Zr) was also evaluated for a comparative study. Physical properties of ALD-derived ZrO₂ thin films were studied using ellipsometry, grazing incidence XRD (GI-XRD), high resolution TEM (HRTEM), and atomic force microscopy (AFM). The ZrO₂ deposited using Zr-AMD showed a better thermal stability at high substrate temperature (>300 °C) compared to that using TEMA-Zr. GI-XRD analysis reveals that after 700 °C anneal both ZrO₂ films enter tetragonal phase. The electrical properties of N₂-annealed ZrO₂ film using Zr-AMD exhibit an EOT of 1.2 nm with leakage current density as low as 2 × 10⁻³ A/cm² (@V_fb−1 V). The new Zr amidinate is a promising ALD precursor for high-k dielectric applications.     

Thin titanium oxide films deposited by e-beam evaporation with additional rapid thermal oxidation and annealing for ISFET applications

Titanium oxide (TiO₂) has been extensively applied in the medical area due to its proved biocompatibility with human cells [1]. This work presents the characterization of titanium oxide thin films as a potential dielectric to be applied in ion sensitive field-effect transistors. The films were obtained by rapid thermal oxidation and annealing (at 300, 600, 960 and 1200 °C) of thin titanium films of different thicknesses (5 nm, 10 nm and 20 nm) deposited by e-beam evaporation on silicon wafers. These films were analyzed as-deposited and after annealing in forming gas for 25 min by Ellipsometry, Fourier Transform Infrared Spectroscopy (FTIR), Raman Spectroscopy (RAMAN), Atomic Force Microscopy (AFM), Rutherford Backscattering Spectroscopy (RBS) and Ti-K edge X-ray Absorption Near Edge Structure (XANES). Thin film thickness, roughness, surface grain sizes, refractive indexes and oxygen concentration depend on the oxidation and annealing temperature. Structural characterization showed mainly presence of the crystalline rutile phase, however, other oxides such Ti₂O₃, an interfacial SiO₂ layer between the dielectric and the substrate and the anatase crystalline phase of TiO₂ films were also identified. Electrical characteristics were obtained by means of I-V and C-V measured curves of Al/Si/TiO_x/Al capacitors. These curves showed that the films had high dielectric constants between 12 and 33, interface charge density of about 10¹⁰/cm² and leakage current density between 1 and 10⁻⁴ A/cm². Field-effect transistors were fabricated in order to analyze I_D x V_DS and log I_D × Bias curves. Early voltage value of −1629 V, R_OUT value of 215 MΩ and slope of 100 mV/dec were determined for the 20 nm TiO_x film thermally treated at 960 °C.