The Impact of Oxide Traps Induced by SOI Thickness on Reliability of Fully Silicide Metal-Gate Strained SOI MOSFET

In this letter, we investigate the effects of oxide traps induced by various silicon-on-insulator (SOI) thicknesses $({T}_{rm SOI})$ on the performance and reliability of a strained SOI MOSFET with SiN-capped contact etch stop layer (CESL). Compared to the thicker ${T}_{rm SOI}$ device, the thinner ${T}_{rm SOI}$ device with high-strain CESL possesses a higher interface trap $({N}_{rm it})$ density, leading to degradation in the device performance. On the other hand, however, the thicker ${T}_{rm SOI}$ device reveals inferior gate oxide reliability. From low-frequency noise analysis, we found that thicker ${T}_{rm SOI}$ has a higher bulk oxide trap $({N}_{rm BOT})$ density, which is induced by larger strain in the gate oxide film and is mainly responsible for the inferior TDDB reliability. Presumably, the gate oxide film is bended up and down for the p- and nMOSFETs, respectively, by the net stress in thicker ${T}_{rm SOI}$ devices in this strain technology.      

A 3–10 GHz CMOS UWB Low-Noise Amplifier With ESD Protection Circuits

A low-power fully integrated low-noise amplifier (LNA) with an on-chip electrostatic-static discharge (ESD) protection circuit for ultra-wide band (UWB) applications is presented. With the use of a common-gate scheme with a ${rm g}_{rm m}$ -boosted technique, a simple input matching network, low noise figure (NF), and low power consumption can be achieved. Through the combination of an input matching network, an ESD clamp circuit has been designed for the proposed LNA circuit to enhance system robustness. The measured results show that the fabricated LNA can be operated over the full UWB bandwidth of 3.0 to 10.35 GHz. The input return loss $({rm S}_{11})$ and output return loss $({rm S}_{22})$ are less than ${-}8.3$ dB and ${-}9$ dB, respectively. The measured power gain $({rm S}_{21})$ is $11 pm 1.5$ dB, and the measured minimum NF is 3.3 dB at 4 GHz. The dc power dissipation is 7.2 mW from a 1.2 V supply. The chip area, including testing pads, is 1.05 mm$,times,$ 0.73 mm.      

A Linearization Technique for RF Receiver Front-End Using Second-Order-Intermodulation Injection

A linearization technique is proposed in which low-frequency second-order-intermodulation $({rm IM}_{2})$ is generated and injected to suppress the third-order intermodulation $({rm IM}_{3})$. The proposed linearization technique is applied to both a low-noise amplifier (LNA) and a down-conversion mixer in an RF receiver front-end (RFE) working at 900 MHz. Fabricated in a 0.18$ mu{hbox{m}}$ CMOS process and operated at 1.5 V supply with a total current of 13.1 mA, the RFE delivers 22 dB gain with 5.3 dB noise figure (NF). The linearization technique achieves around 20 dB ${rm IM}_{3}$ suppression and improves the RFE's ${rm IIP}_{3}$ from $-$ 10.4 dBm to 0.2 dBm without gain reduction and noise penalty while requiring only an extra current of 0.1 mA.      

Surface Deposition of Ionic Contaminants on Silicon Wafers in a Cleanroom Environment

The adsorption and desorption behaviors of ionic micro-contaminants on the silicon wafers in a cleanroom environment were investigated in this study. The experimental measurements showed that the surface density of ionic contaminants was significantly affected by both the exposure time and the properties of contaminants. The rate parameters of a kinetic model for surface deposition were determined by numerical optimization of fitting the experimental data on surface and ambient concentrations of airborne molecular contaminants (AMCs). Subsequently, the time-dependent deposition velocity and sticking coefficient of ionic species were obtained. The results showed that ${rm F}^{-}$, ${rm Cl}^{-}$, ${rm NO}_{3}^{-}$, ${rm SO}_{4}^{2-}$, ${rm Na}^{+}$, ${rm NH}_{4}^{+}$, ${rm K}^{+}$, and ${rm Mg}^{2+}$ were the major ionic microcontamination species on the wafer surfaces, with the adsorption rate constant and the sticking coefficient of ${rm K}^{+}$ ion being larger than those of other ionic contaminants. After the determination of sticking coefficients, the allowable wafer exposure durations and the maximum ambient concentrations of ionic species were exemplified based on the guideline recommended by the International Technology Roadmap for Semiconductors (ITRS).      

1580-V–40-$hbox{m}Omegacdot hbox{cm}^{2}$ Double-RESURF MOSFETs on 4H-SiC $(hbox{000}bar{hbox{1}})$

Double-reduced-surface-field (RESURF) MOSFETs with $hbox{N}_{2}hbox{O}$ -grown oxides have been fabricated on the 4H-SiC $(hbox{000} bar{hbox{1}})$ face. The double-RESURF structure is effective in reducing the drift resistance, as well as in increasing the breakdown voltage. In addition, by utilizing the 4H-SiC $(hbox{000}bar{hbox{1}})$ face, the channel mobility can be increased to over 30 $hbox{cm}^{2}/hbox{V}cdothbox{s}$, and hence, the channel resistance is decreased. As a result, the fabricated MOSFETs on 4H-SiC $( hbox{000}bar{hbox{1}})$ have demonstrated a high breakdown voltage $(V_{B})$ of 1580 V and a low on-resistance $(R_{rm ON})$ of 40 $hbox{m}Omega cdothbox{cm}^{2}$. The figure-of-merit $(V_{B}^{2}/R_{rm ON})$ of the fabricated device has reached 62 $hbox{MW/cm}^{2}$, which is the highest value among any lateral MOSFETs and is more than ten times higher than the “Si limit.”      

A 0.55 V 60 dB-DR Fourth-Order Analog Baseband Filter

A 0.55 V supply voltage fourth-order low-pass continuous-time filter is presented. The low-voltage operating point is achieved by an improved bias circuit that uses different opamp input and output common-mode voltages. The fourth-order filter architecture is composed by two Active- ${rm G}_{rm m}{-}{rm RC}$ biquadratic cells, which use a single opamp per-cell with a unity-gain-bandwidth comparable to the filter cut-off frequency. The $-$ 3 dB filter frequency is 12 MHz and this is higher than any other low-voltage continuous-time filter cut-off frequency. The $-$3 dB frequency can be adjusted by means of a digitally-controlled capacitance array. In a standard 0.13 $mu{rm m}$ CMOS technology with ${V}_{THN}approx 0.25 {rm V}$ and ${V}_{THP}approx 0.3 {rm V}$, the filter operates with a supply voltage as low as 0.55 V. The filter $({rm total} {rm area}=0.47 {rm mm}^{2})$ consumes 3.4 mW. A 8 dBm-in-band IIP3 and a 13.3 dBm-out-of-band IIP3 demonstrate the validity of the proposal.      

Low-Threshold Strained Quantum-Well GaSb-Based Lasers Emitting in the 2.5- to 2.7-$mu$ m Wavelength Range

GaInAsSb–GaSb strained quantum-well (QW) ridge waveguide diode lasers emitting in the wavelength range from 2.51 to 2.72 $ mu{hbox {m}}$ have been grown by molecular beam epitaxy. The devices show ultralow threshold current densities of 44 $hbox{A}/{hbox {cm}}^{2}$ (${L}rightarrow infty $) for a single QW device at 2.51 $ mu{hbox {m}}$, which is the lowest reported value in continuous-wave operation near room temperature (15 $^{circ}hbox{C}$) at this wavelength. The devices have an internal loss of 3 ${hbox {cm}}^{-1}$ and a characteristic temperature of 42 K. By using broader QWs, wavelengths up to 2.72 $mu{hbox {m}}$ could be achieved.      

A Low-Voltage Mobility-Based Frequency Reference for Crystal-Less ULP Radios

The design of a 100 kHz frequency reference based on the electron mobility in a MOS transistor is presented. The proposed low-voltage low-power circuit requires no off-chip components, making it suitable for application in wireless sensor networks (WSN). After a single-point calibration, the spread of its output frequency is less than 1.1% (3$sigma $) over the temperature range from $-{hbox{22}},^{circ}{hbox{C}}$ to 85$,^{circ}{hbox{C}}$ . Fabricated in a baseline 65$~$nm CMOS technology, the frequency reference circuit occupies 0.11$ hbox{mm}^{2}$ and draws 34 $ muhbox{A}$ from a 1.2 V supply at room temperature.      

Performance Improvement of N-Type $hbox{TiO}_{x}$ Active-Channel TFTs Grown by Low-Temperature Plasma-Enhanced ALD

We report on performance improvement of $n$-type oxide–semiconductor thin-film transistors (TFTs) based on $hbox{TiO}_{x}$ active channels grown at 250 $^{circ}hbox{C}$ by plasma-enhanced atomic layer deposition. TFTs with as-grown $hbox{TiO}_{x}$ films exhibited the saturation mobility $(mu_{rm sat})$ as high as 3.2 $hbox{cm}^{2}/hbox{V}cdothbox{s}$ but suffered from the low on–off ratio $(I_{rm ON}/I_{rm OFF})$ of $hbox{2.0} times hbox{10}^{2}$. $hbox{N}_{2}hbox{O}$ plasma treatment was then attempted to improve $I_{rm ON}/I_{rm OFF}$. Upon treatment, the $hbox{TiO}_{x}$ TFTs exhibited $I_{rm ON}/I_{rm OFF}$ of $hbox{4.7} times hbox{10}^{5}$ and $mu_{rm sat}$ of 1.64 $hbox{cm}^{2}/hbox{V}cdothbox{s}$, showing a much improved performance balance and, thus, demonstrating their potentials for a wide variety of applications such as backplane technology in active-matrix displays and radio-frequency identification tags.      

Linear Systems, Sparse Solutions, and Sudoku

In this paper, we show that Sudoku puzzles can be formulated and solved as a sparse linear system of equations. We begin by showing that the Sudoku ruleset can be expressed as an underdetermined linear system: ${mmb{Ax}}={mmb b}$, where ${mmb A}$ is of size $mtimes n$ and $n>m$. We then prove that the Sudoku solution is the sparsest solution of ${mmb{Ax}}={mmb b}$, which can be obtained by $l_{0}$ norm minimization, i.e. $minlimits_{mmb x}Vert{mmb x}Vert_{0}$ s.t. ${mmb{Ax}}={mmb b}$. Instead of this minimization problem, inspired by the sparse representation literature, we solve the much simpler linear programming problem of minimizing the $l_{1}$ norm of ${mmb x}$, i.e. $minlimits_{mmb x}Vert{mmb x}Vert_{1}$ s.t. ${mmb{Ax}}={mmb b}$, and show numerically that this approach solves representative Sudoku puzzles.      

A Low-Power Low-Cost Fully-Integrated 60-GHz Transceiver System With OOK Modulation and On-Board Antenna Assembly

A fully-integrated 60-GHz transceiver system with on-board antenna assembly is presented. Incorporating on-off keying (OOK) and low-cost antenna designs, this prototype demonstrates a low-power solution for multi-Gb/s wireless communication. The enhanced OOK modulator/demodulator obviates baseband and interface circuitry, revealing a compact solution. Two antenna structures, folded dipole and patch array, are employed to fully examine the performance. Designed and fabricated in 90-nm CMOS technology, the transmitter and the receiver consume 183 and 103 mW and occupy 0.43 and 0.68 ${hbox {mm}}^{2}$, respectively. With 4 $times$ 3 patch antenna array, the transceiver achieves error-free operation $({hbox{BER}}<10^{-12})$ for $2^{31}-1$ PRBS of 1 Gb/s over a distance of 60 cm.      

Schottky Barrier Height Modulation of Nickel–Dysprosium-Alloy Germanosilicide Contacts for Strained P-FinFETs

This letter reports on the fabrication and hole Schottky barrier $(Phi_{ rm B}^{rm p})$ modulation of a novel nickel (Ni)–dysprosium (Dy)-alloy germanosilicide (NiDySiGe) on silicon–germanium (SiGe). Aluminum (Al) implant is utilized to lower the $Phi_{rm B}^{rm p}$ of NiDySiGe from $sim$0.5 to $sim$ 0.12 eV, with a correspondingly increasing Al dose in the range of $ hbox{0}$–$hbox{2}timeshbox{10}^{15} hbox{atoms}/ hbox{cm}^{2}$. When integrated as the contact silicide in p-FinFETs (with SiGe source/drain), NiDySiGe with an Al implant dose of $hbox{2}timeshbox{10}^{14} hbox{atoms}/ hbox{cm}^{2}$ leads to 32% enhancement in $I_{rm DSAT}$ over p-FinFETs with conventional NiSiGe contacts. Ni–Dy-alloy silicide is a promising single silicide solution for series-resistance reduction in CMOS FinFETs.      

AlN/GaN Insulated-Gate HEMTs With 2.3 A/mm Output Current and 480 mS/mm Transconductance

High-electron mobility transistors (HEMTs) based on ultrathin AlN/GaN heterostructures with a 3.5-nm AlN barrier and a 3-nm $hbox{Al}_{2}hbox{O}_{3}$ gate dielectric have been investigated. Owing to the optimized AlN/GaN interface, very high carrier mobility $(sim!!hbox{1400} hbox{cm}^{2}/hbox{V}cdothbox{s})$ and high 2-D electron-gas density $(sim!!kern1pthbox{2.7} times hbox{10}^{13} /hbox{cm}^{2})$ resulted in a record low sheet resistance $(sim !!hbox{165} Omega/hbox{sq})$. The resultant HEMTs showed a maximum dc output current density of $simkern1pt$2.3 A/mm and a peak extrinsic transconductance $g_{m,{rm ext}} sim hbox{480} hbox{mS/mm}$ (corresponding to $g_{m,{rm int}} sim hbox{1} hbox{S/mm}$). An $f_{T}/f_{max}$ of 52/60 GHz was measured on $hbox{0.25} times hbox{60} muhbox{m}^{2}$ gate HEMTs. With further improvements of the ohmic contacts, the gate dielectric, and the lowering of the buffer leakage, the presented results suggest that, by using AlN/GaN heterojunctions, it may be possible to push the performance of nitride HEMTs to current, power, and speed levels that are currently unachievable in AlGaN/GaN technology.      

Statistical Wavelet Subband Characterization Based on Generalized Gamma Density and Its Application in Texture Retrieval

The modeling of image data by a general parametric family of statistical distributions plays an important role in many applications. In this paper, we propose to adopt the three-parameter generalized Gamma density $({rm G}Gamma{rm D})$ for modeling wavelet detail subband histograms and for texture image retrieval. The advantage of ${rm G}Gamma{rm D}$ over the existing generalized Gaussian density (GGD) is that it provides more flexibility to control the shape of model which is critical for practical histogram-based applications. To measure the discrepancy between ${rm G}Gamma{rm Ds}$, we use the symmetrized Kullback-Leibler distance (SKLD) and derive a closed form for the SKLD between ${rm G}Gamma{rm Ds}$. Such a distance can be computed directly and effectively via the model parameters, making our proposed scheme particularly suitable for image retrieval systems with large image database. Experimental results on the well-known databases reveal the superior performance of our proposed method compared with the current existing approaches.      

A Sub-0.2$^{circ}/$ hr Bias Drift Micromechanical Silicon Gyroscope With Automatic CMOS Mode-Matching

This paper describes a system architecture and CMOS implementation that leverages the inherently high mechanical quality factor (Q) of a MEMS gyroscope to improve performance. The proposed time domain scheme utilizes the often-ignored residual quadrature error in a gyroscope to achieve, and maintain, perfect mode-matching (i.e., $sim$0 Hz split between the high-Q drive and sense mode frequencies), as well as electronically control the sensor bandwidth. A CMOS IC and control algorithm have been interfaced with a 60 $mu{hbox {m}}$ thick silicon mode-matched tuning fork gyroscope $({rm M}^{2}mathchar"707B {rm TFG})$ to implement an angular rate sensing microsystem with a bias drift of 0.16$^{circ}/{hbox{hr}}$. The proposed technique allows microsystem reconfigurability—the sensor can be operated in a conventional low-pass mode for larger bandwidth, or in matched mode for low-noise. The maximum achieved sensor Q is 36,000 and the bandwidth of the microsensor can be varied between 1 to 10 Hz by electronic control of the mechanical frequencies. The maximum scale factor of the gyroscope is 88 ${hbox{mV}}/^{circ}/{hbox{s}}$ . The 3$~$ V IC is fabricated in a standard 0.6 $ mu{hbox {m}}$ CMOS process and consumes 6 mW of power with a die area of 2.25 ${hbox {mm}}^{2}$.      

Investigation of Al-Doped Emitter on N-Type Rear Junction Solar Cells

This brief models the junction discontinuities of a rear Al-doped $ hbox{p}^{+}$ emitter $(hbox{np}^{+})$ formed by screen printing and firing. Theoretical fitting of the suns–$V_{rm oc}$ data to the circuit model shows that not only do the junction discontinuities deteriorate cell $V_{rm oc}$, for the case of p-type cells, but they also reduce cell fill factor on n-type cells through increased junction recombination and nonlinear shunts.      

A Relationship Between Phase Delay and Attenuation Due to Rain and Its Applications to Satellite and Deep-Space Tracking

We present and discuss two main results concerning the relationship between phase delay due to rain and rain attenuation, useful in calculations concerning high precision tracking of satellites and deep-space spacecrafts using interferometry techniques. We have found these two results with the Synthetic Storm Technique [SST] applied to a large data bank of rain rate time series collected at three sites in Italy. The first result concerns a formula that provides the extra signal phase delay $tau$ (picoseconds) due to rain as a function of rain attenuation $A$ (dB), frequency $f$ (GHz) and slant path elevation angle $theta$ (degrees), given by $tau = (860.4 - 4.82 theta)f^{- 1.71}A^{0.73}$, for $20^{circ} leq theta ≪ 44^{circ}$, and by $tau = 648.3f^{- 1.71}A^{0.73}$, for $44^{circ} leq theta leq 90^{circ}$ . The formula allows estimating the phase delay due to rain attenuation, with overall average (normalized) error ${-}3hbox{%}$, standard deviation 11.1%, root-mean square 11.5% for 20$^{circ}$ slant paths. The second result concerns a method to predict phase delay from the probability distribution of rain rate (SST probability model), very useful when only the probability distribution of rain rate is known.      

Photosensitive Inverter and Ring Oscillator With Pseudodepletion Mode Load for LCD Applications

Photosensitive inverters and ring oscillators (ROs) with pseudodepletion mode loads (PDMLs) were integrated in LCD panels using conventional mass production processes. The delay time $(t_{rm pd})$ of five-stage ROs with PDML reduced from 204.3 $mu hbox{s}$ under dark to 16.3 $muhbox{s}$ under backlight illumination of 20 000 lx. The oscillation frequency exhibited a power-law dependence $(f_{rm osc} infty hbox{IL}^{gamma})$ on the backlight illuminance with the extracted fitting parameter $gamma = hbox{0.447}$ at room temperature.      

High-Density and Low-Leakage-Current MIM Capacitor Using Stacked $hbox{TiO}_{2}/hbox{ZrO}_{2}$ Insulators

We have fabricated high-$kappa hbox{Ni}/hbox{TiO}_{2}/hbox{ZrO}_{2}/ hbox{TiN}$ metal–insulator–metal (MIM) capacitors. A low leakage current of $hbox{8} times hbox{10}^{-8} hbox{A/cm}^{2}$ at 125 $^{circ}hbox{C}$ was obtained with a high 38- $hbox{fF}/muhbox{m}^{2}$ capacitance density and better than the $hbox{ZrO}_{2}$ MIM capacitors. The excellent device performance is due to the lower electric field in 9.5-nm-thick $hbox{TiO}_{2}/ hbox{ZrO}_{2}$ devices to decrease the leakage current and to a higher $kappa$ value of 58 for $ hbox{TiO}_{2}$ as compared with that of $hbox{ZrO}_{2}$ to preserve the high capacitance density.      

A 2–40 GHz Active Balun Using 0.13 $mu{rm m}$ CMOS Process

A 2 to 40 GHz broadband active balun using 0.13 $mu{rm m}$ CMOS technology is presented in this letter. Using two-stage differential amplified pairs, the active balun can achieve a wideband performance with the gain compensation technique. This active balun exhibits a measured small signal gain of ${0} pm{1}~{rm dB}$, with the amplitude imbalances below 0.5 dB and the phase differences of ${180} pm {10} ^{circ}$ from 2 to 40 GHz. The core active balun has a low power consumption of 40 mW, and a compact area of 0.8 mm $times,$ 0.7 mm. This proposed balun achieved the highest operation frequency, the widest bandwidth, and the smallest size among all the reported active baluns.