Measurement of dynamic magnetic loss parameter in ferrites

The measurement of the iron loss in ferrites is important for developing high‐efficiency switching power supplies. The authors have proposed the dynamic magnetic loss parameter, λ_f, for evaluating the iron loss in ferrites. In previous studies, the parameter was assumed to be a constant value for an individual ferrite material and defined for one period of a small B–H loop. In this paper, assuming that λ_f is a function of the time derivative of the magnetic flux density, dB/dt, a novel measurement method of λ_f of a Ni‐Zn ferrite is proposed using rectangular wave voltage excitation and the Fourier expansion of the exciting current. In order to realize an iron loss measurement system with the rectangular wave voltage excitation, a high‐frequency FET inverter has been developed. The results of measuring λ_f show that it is uniquely determined by dB/dt regardless of the B–H loop size. The measured dB/dt characteristics of λ_f are applied to practical examples for switching power supplies and sinusoidal wave voltage excitations. Their experimental and computational results coincide and it is clarified that the measured dB/dt characteristics are effective and useful. © 2006 Wiley Periodicals, Inc. Electr Eng Jpn, 156(1): 1–6, 2006; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20101     

A 0.1 to 2.7‐GHz SOI SP8T antenna switch adopting body self‐adapting bias technique for low‐loss high‐power applications

A low‐loss high‐power single‐pole 8‐throw antenna switch adopting body self‐adapting bias technique in a 0.18‐μm thick‐film partially depleted silicon‐on‐insulator complementary metal‐oxide‐semiconductor process is implemented for multimode multiband cellular applications. A topology with symmetric port design is developed. We employ the body‐contacted field‐effect transistor to handle high power level and obtain low harmonic distortion. However, the conventional bias method for body‐contacted field‐effect transistor leads to poor insertion loss (IL), serious imbalanced voltage division, and large die size. Therefore, a new body self‐adapting bias scheme is adopted to improve the IL and power handling capability with die area reward by removing the employment of extra biasing resistor and voltage supply at the body. The presented silicon‐on‐insulator antenna switch utilizing the new body bias strategy reveals similar harmonic performance as a conventional switch version, thanks to the analogous DC bias to the gate and body, while it exhibits effectively lower IL, imbalanced voltage division, and die area. The measured IL and 0.1‐dB compression point (P_?0.1dB), at 1.9/2.7 GHz, are roughly 0.52/0.82 dB and 39.2/36.9 dBm, respectively. The overall IL and P_?0.1dB are apparently improved by approximately 0.05 to 0.13 dB and 0.5 to 0.8 dBm compared with the conventional version.     

SVPWM逆变器供电时FSCW-PMSM损耗特性研究

为探究空间矢量脉宽调制(space vector pulse width modulation,SVPWM)逆变器引入的时间谐波电流对分数槽集中绕组永磁同步电机(fractional-slot concentrated-winding permanent magnet synchronous machine,FSCW-PMSM)损耗特性的影响,文中提出一种SVPWM逆变器与FSCW-PMSM联合系统中电机损耗谐波特性分析方法。首先,理论分析了考虑时间谐波电流时电机损耗的时空谐波特性。其次,以一台三相双层绕组10极12槽PMSM为例,搭建电机与SVPWM逆变器的场路联合仿真模型,求解样机在恒转矩和恒功率调速时损耗的谐波特性,揭示各谐波损耗的产生机理。结果表明：转子谐波损耗由基波电流与次谐波、iZ±p次齿谐波和(f_c±4f)/f、(f_c±2f)/f次时间谐波电流与p、Z±p次空间谐波引起;定子铁芯谐波损耗由基波磁场、谐波励磁磁场及(f_c±4f)/f、(f_c±2f)/f次时间谐波电流引起。该结论适用于其他极槽组合的FSCW-PMSM。最后,通过实验验证了该分析方法的有效性。     

Harmonic fold back reduction at the N‐path filters

In this paper, a method is proposed to reduce harmonic fold back (HFB) problem of N‐path filters, without increasing the input reference clock (f_CLK ) frequency. The HFB at the N‐path filter is analyzed, and simple expressions are extracted to model this problem. Using the results of the analysis, an M‐of‐N‐path filter has been proposed that behaves like an M × N‐path filter in terms of HFB problem; however, the f_CLK frequency of this structure is the same as an N‐path filter. To demonstrate the feasibility of the proposed idea, a 3‐of‐4‐path filter is designed, and its characteristics are compared with 4‐path and 12‐path filters by simulation. Impacts of different non‐idealities like clock‐phase error, mismatch, and parasitic capacitance are investigated. The transistor‐level implementation of this filter is performed in 0.18 µm Complementary Metal Oxide Semiconductor (CMOS) technology. The simulation results show that the filter has the pass‐band gain of 17 dB, tuning range of 0.2–1.2 GHz, −3 dB bandwidth of 25 MHz, quality factor of 8–48, 18 dB out‐of‐band rejection, 16 dB rejection of the third harmonic of switching frequency (f_s ), and the noise figure of 4.35 dB (using ideal G_m cells) and 6.95 dB (for practical G_m cells). The strongest harmonic folding to the filter pass‐band occurs around 11f_s with the attenuation of 23.8 dB. Each G_m cell draws about 12.4 mA from 1.8 V supply, and the out‐of‐band IIP3 and P _{1 dB,CP} are 17 and 4 dBm, respectively. Copyright © 2016 John Wiley & Sons, Ltd.     

DC interruption characteristic of vacuum circuit breaker

A high‐speed vacuum circuit breaker (HSVCB) has been investigated. HSVCB makes high‐frequency current superimposed on a fault current so that the current is forced to be zero and is interrupted. Its interruption performance is considered to be dependent on the rate of change of the current (di/dt). As a fundamental research, we investigated the di/dt– dv/dt characteristics and the insulation recovery characteristic after interrupting the counter‐pulse current for various contact materials of AgWC, CuW, and CuCr. The results revealed that the case where the gap length is larger is better in a current interruption performance. Moreover, it was found that di/dt is not dependent on the insulation recovery characteristics, but the magnitude of interruption current is of great influence. © 2007 Wiley Periodicals, Inc. Electr Eng Jpn, 161(1): 17– 25, 2007; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20362     

Periodic noise analysis of electric circuits: Artifacts,singularities and a numerical method

In this paper it is shown that a numerical method largely adopted for the simulation of noise in autonomous circuits is affected by singularities that manifest when the frequency at which the noise analysis is carried out approaches a harmonic of the autonomous circuit. The resulting noise power spectral density (PSD) is thus characterized by spurious spikes. The presence of these singularities is for the first time justified from an analytical standpoint and their effects are shown by simulating some oscillators, employed as benchmarks. Furthermore, the presented approach justifies the 1/(f_s?f)² shape of the PSD of noise at the output when the f_s frequency approaches the f fundamental of a stable oscillator and the 1/|f_s?f|³ shape when the effects of flicker noise are manifest. Copyright © 2009 John Wiley & Sons, Ltd.     

Visual search controlled by spatial frequency without salient features in an image

To clarify the characteristics of visual search that are controlled by spatial frequency, we measured the scan path during eye movement in response to visual stimuli. A target stimulus with the spatial frequency of 1/f^β (where β is the slope of power spectral density of luminance in an image) was embedded in a background stimulus with white (1/f⁰) characteristics. An instruction‐based task was employed in this study, wherein a subject searches for the target as rapidly as possible and fixates on it. Participants were six healthy males aged 21–22 years. In the task, a threshold for spatial frequency that was the minimum value required by the subjects for the search corresponded to β =∼ 0.2 − 0.3. This finding has potential application in the design of visual presentation media, such as signs and tablets, by providing ease of viewing to the user. © 2015 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

A simulation study of high‐order CMOS hyperbolic‐sine filters

This paper advances the field of externally linear–internally nonlinear (ELIN) filters by introducing a synthesis method that enables the design of high‐order class‐AB sinh filters by means of complementary metal–oxide semiconductor (CMOS) weak‐inversion sinh integrators comprising only one type of devices in their translinear loops. The proposed transistor‐level synthesis approach is demonstrated through the examples of (1) a biquadratic and (2) a fifth‐order filter, and their simulated performance is studied. The biquadratic filter achieves a dynamic range of 94 dB and has a tunable quality factor Q up to the value of 8, whereas its natural frequency can be tuned for four orders of magnitude. Its static power consumption amounts to 6.2 μW for Q = 1 and f_o = 2 kHz. The fifth‐order Chebyshev sinh CMOS filter with a cut‐off frequency of 100 Hz, a pass band ripple of 1 dB, and a power consumption of ~300 nW is compared head‐to‐head with its pseudo‐differential class‐AB CMOS log domain counterpart. The sinh filter achieves similar or better signal‐to‐noise ratio (SNR) and signal‐to‐noise‐plus‐distortion ratio (SNDR) performances with half the capacitor area but at the expense of higher power consumption from the same power supply level. All three presented filter topologies are novel. Cadence design framework simulations have been performed using the commercially available 0.35 µm AMS (austriamicrosystems) process parameters. Copyright © 2013 John Wiley & Sons, Ltd.     

A very-low-frequency block-digital oscillator

The development of a block-digital oscillator when the oscillating frequency f_o is very low with respect to the sampling frequency f_s is outlined. Explicit relations for the sensitivity to coefficient quantization, for scaling and for mean-squared round-off error analysis are derived. the principal conclusion is that both the sensitivity and the mean-squared round-off error remain constant and do not depend on the ration f_s/f_o. Finally, the block oscillator is compared with the scalar oscillator proposed in Reference 7; some numerical results are also included.     

High‐tuning‐range CMOS band‐pass IF filter based on a low‐Q cascaded biquad optimization technique

A design procedure for high‐order continuous‐time intermediate‐frequency band‐pass filters based on the cascade of low‐Q biquadratic cells is presented. The approach is well suited for integrated‐circuit fabrication, as it takes into account the maximum capacitance spread dictated by the available technology and maximum acceptable sensitivity to component variations. A trade‐off between noise and maximum linear range is also met. A novel, wide‐tuning‐range transconductor topology is also described. Based on these results, a 10‐pole band‐pass filter for a code division multiple‐access satellite receiver has been designed and tested. The filter provides tunable center frequency (f₀) from 10 to 70 MHz and exhibits a 28‐MHz bandwidth around f₀ = 70 MHz with more than 39‐dB attenuation at f₀/2 and 2f₀. Third‐order harmonic rejection is higher than 60 dB for a 1‐Vpp 70‐MHz input, and equivalent output noise is lower than 1 mV_rms. The circuit is fabricated in a 0.25‐µm complementary metal oxide semiconductor process, and the core consumes 12 mA from a 2.5‐V supply, offering the best current/pole ratio figure. The die area resulted to be 0.9 × 1.1 mm². Copyright © 2014 John Wiley & Sons, Ltd.     

A front‐end receiver with a dual cross‐coupling technique for MICS applications

This paper presents a front‐end receiver with a dual cross‐couple technique for Medical Implant Communication Services M applications, using a standard complementary metal‐oxide semiconductor process. A lower‐power design is achieved using a resistive feedback, g_m‐boosting technique along with a current reuse topology in the receiver's transconductance stage. In addition, a dual cross‐coupling configuration applied at the input stage increases overall gain performance and reduces power consumption. The measured power dissipation of the low‐noise amplifier is only 0.51 mW. The conversion gain of the receiver is 19.74 dB, while the radio frequency and local oscillator frequencies are respectively 403.5 and 393.5 MHz, and the LO power is 0 dBm. The chip exhibits excellent isolation below −70 dB from LO to intermediate frequency and LO to radio frequency. Copyright © 2016 John Wiley & Sons, Ltd.     

Event‐related potentials affected by spatial frequencies of background visual pattern during a cognitive task

Spatial variation in luminance, which is one of the most important attributes of a visual image, may cause characteristic reactions in higher order brain functions. We aim to characterize the event‐related potentials (ERPs) associated with a cognitive task (simple addition) in terms of how they are influenced by the spatial frequencies of the background visual pattern. We use vertically striped visual stimuli with embedded numbers (0–9) and different spatial frequency characteristics (white noise, 1/f, 1/f², and 1/f³). The subjects are instructed to perform two tasks: an addition task that involved adding numbers presented as visual stimuli, and a reference task wherein the numbers were not added. In ERPs averaged over four types of visual stimuli for the addition task, positive components peaking at latencies of 182 ms in the central and frontal areas and 360 ms in the parietal area are observed, and significant differences are found between ERPs for the addition and reference tasks. In the addition task, the 182‐ms latency component shows a larger positive amplitude for 1/f³ compared with other stimuli in the right parietal‐occipital‐temporal area (P₄, T₆, O₂), and the 360‐ms latency component tends to show a larger positive amplitude for 1/f compared with other stimuli in the parietal‐central area (C₃, P₃, P_z). We conclude that spatial frequency characteristics influence ERPs associated with the retrieval of arithmetic data and certain neural activities that accompany simple forms of addition. © 2013 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

A low‐loss snubber for reducing motor terminal surge voltage

The development of an advanced Insulated Gate Bipolar Transistor (IGBT) has enabled high‐frequency switching operation and has improved the performance of PWM inverters for motor drive. However, the IGBT's high rate of dv/dt has adverse effects on motor insulation stress. In many motor drive applications, the inverter and motor are separated, requiring long motor feeds. The long cable contributes high‐frequency ringing at the motor terminal and results in high surge voltage which stresses the motor insulation. The inverter output filter and RDC snubber are the conventional method for reducing the surge voltage. In this paper, we propose a new low‐loss snubber to reduce the motor terminal surge voltage. The snubber consists of the series connection of chraging/discharging capacitor and the voltage‐clamped capacitor. At IGBT turn‐off, the snubber starts to operate when the IGBT voltage reaches the voltage‐clamped level. Since dv/dt is decreased by snubber operating, the peak level of the surge voltage can be reduced. Also the snubber operates at the IGBT voltage above the voltage‐clamped level, and the snubber loss is largely reduced compared with the RDC snubber. The proposed snubber enables reduction of the motor terminal surge voltage with low loss. © 2005 Wiley Periodicals, Inc. Electr Eng Jpn, 150(4): 64–72, 2005; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.10378     

Characteristic analysis of a wideband balun transformer having a delay line element for phase compensation

The balanced‐unbalanced transformer (balun) is extensively used in radio communication and measuring instruments. In recent years, with the development of television and portable telephones, wideband transformers tend to be miniaturized. In this paper, the wideband transformer is analyzed in terms of distributed coupled‐line theory. A main result of the analysis is that the balance and unbalance transmission characteristics of the balun are markedly improved in the high‐frequency range by using a delay line element for compensation. If the connection point S_w between the coil winding and delay line is off the ground, the balance transmission band is about doubled in the low‐frequency range. If the point S_wis grounded and if the impedance ratio m² is small, a higher degree of unbalance attenuation can be obtained. Better balance transmission characteristics can be obtained when the matching factor K approaches half the optimum. In addition, we show that an in‐phase or anti‐phase transformer can be made on the basis of our isolation wideband transformer. The equivalent circuits of in‐phase and anti‐phase wideband n:1 transformers are obtained from our theoretical analysis and these can be formed by the same transformer. The transmission characteristics of in‐phase and anti‐phase wideband transformers are analyzed and improved characteristics are obtained in the high‐frequency range. The theoretical and experimental values agree well over the wide frequency range of 100 KHz to 1000 MHz. ©1998 Scripta Technica, Electr Eng Jpn, 126(2): 1–14, 1999     

盲区小的燃料电池并网系统孤岛检测方法

为保护系统及人身安全、保障用户供电质量,燃料电池并网系统必须具备孤岛检测功能。文中提出一种检测速度快、盲区小的新型孤岛检测方法——ASMS_Q法。该方法对滑模频率偏移法进行改进,在偏离工频较大区域加入加速增益,并结合q轴无功电流扰动法,在电网断开后,进行更快速地频率扰动,使其超出正常范围,达到过/欠频保护。而且电网正常工作时,给电网注入扰动量很小,对逆变器输出电能质量没有影响。在Q_f-f_0和Q_(f_0)-C_(norm)坐标系下,对比分析了ASMS_Q法及两种传统方法的盲区。仿真和实验结果表明,ASMS_Q法比传统的主动式检测方法盲区更小,检测速度更快,适用于高品质因素的负载。     

Monte Carlo analysis of dynamic characteristics and high‐frequency noise performances of nanoscale double‐gate MOSFETs

In this paper, a full‐band Monte Carlo simulator is employed to study the dynamic characteristics and high‐frequency noise performances of a double‐gate (DG) metal–oxide–semiconductor field‐effect transistor (MOSFET) with 30 nm gate length. Admittance parameters (Y parameters) are calculated to characterize the dynamic response of the device. The noise behaviors of the simulated structure are studied on the basis of the spectral densities of the instantaneous current fluctuations at the drain and gate terminals, together with their cross‐correlation. Then the normalized noise parameters (P, R, and C), minimum noise figure (NF_min), and so on are employed to evaluate the noise performances. To show the outstanding radio‐frequency performances of the DG MOSFET, a single‐gate silicon‐on‐insulator MOSFET with the same gate length is also studied for comparison. The results show that the DG structure provides better dynamic characteristics and superior high‐frequency noise performances, owing to its inherent short‐channel effect immunity, better gate control ability, and lower channel noise. Copyright © 2012 John Wiley & Sons, Ltd.     

A fully integrated,highly linear CMOS T/R switch for X‐Band phased array radars

This paper presents the design and implementation of a single‐pole, double‐throw transmit/receive (T/R) switch for X‐Band (8–12 GHz) phased array radar applications. The T/R switch was fabricated in a 0.25‐µm SiGe BiCMOS process and occupies 0.44‐mm² chip area, including pads. The design focuses on the techniques, primarily, to achieve higher power handling capability (P_1dB), along with higher isolation and better insertion loss (IL) of the T/R switch. These techniques include resistive‐body floating, using on‐chip impedance transformation networks and DC biasing of all terminals of the T/R switch. In addition, optimization of transistor widths and parallel resonance technique are used to improve IL and isolation, respectively. All these design techniques resulted in a measured IL of 3.6 dB, isolation of 34.8 dB and IP_1dB of 28.2 dBm at 10 GHz. The return losses at both input and output ports are better than 16 dB from 8 to 12 GHz. To our knowledge, this paper presents the single‐ended CMOS T/R switch with the highest IP_1dB, competitive isolation and comparable IL at X‐Band, compared to other reported works in the literature and attributed to the unique design methodologies and techniques. Copyright © 2012 John Wiley & Sons, Ltd.     

Forsterite ceramics for millimeterwave dielectrics

The wireless communications have been tremendously developed in the recent ubiquitous age. The utilizable frequency region has been expanded to millimeterwaves because of shortage of conventional frequency regions. For the ultra high frequencies of millimeterwaves, dielectrics with ultra high quality factor Q and low dielectric constant ε _r are desired. Low ε _r is necessary to short the delay time of signals and to make devices small in size. Silicates for candidate of millimeterwave materials have low dielectric constant, because of silica-oxygen tetrahedra composed of half covalent bonds. Forsterite (Mg₂SiO₄) as such kind of silicates has high Q ⋅ f of 270000 GHz and low ε _r of 6.8. The temperature coefficient of resonant frequency τ _f was improved by adding rutile TiO₂ with high τ _f of plus 450 ppm/^∘C. In this paper, these results for forsterite are summarized.     

Complex permeability of polycrystalline Mn-Zn and Ni-Zn ferrites

The complex permeability of ferrites is frequency dependent. The real part of the complex permeability deteriorates in a high frequency range and the imaginary part has a peak after starting the deterioration. This paper examines the possibility that the frequency characteristics for some ferrites can be approximately derived from a first-order linear differential equation for the magnetic field intensity and magnetic flux density. The first-order differential equation is expressed by the reciprocal of the complex permeability and provides first-order magnetic and electric circuits for ferrite cores. In contrast with the commonly used series R_s-L_s, circuit for the cores, obtained from B = (μ′ − jμ′)H, the first-order electric circuit derived consists of an inductance (L) and resistance connected in parallel. In this paper, it is demonstrated that the inductance L remains constant, whereas Ls decrease with the increase in frequency. In other words, the real part of the reciprocal of the complex permeability remains constant for an increase in frequency. In addition, it is found that the imaginary part of the reciprocal of the complex permeability is approximately proportional to the frequency. © 1998 Scripta Technica, Electr Eng Jpn, 123(2): 1–7, 1998     

Calculation of frequency response of thyristor‐controlled series capacitor

In this paper, we propose a method of analytically calculating an impedance of a thyristor‐controlled series capacitor (TCSC). The TCSC consists of a thyristor‐controlled reactor (TCR) and a capacitor. If a small voltage component of frequency f superimposes the TCSC voltage of frequency f_o, then current components of frequency (nf_o ± f) flow through the TCR, where n takes even numbers. We derive theoretical equations for them. In the derivation, we consider an influence of odd harmonics in the TCSC voltage. We also consider deviations in its zero‐crossing times due to the superimposed voltage. The current components flow through the capacitor and the transmission line, and produce new voltage components of frequency (nf_o ± f). In order to count their influence, we introduce admittance matrices for the TCR, the capacitor, and the transmission line. By solving a network equation consisting of the matrices, we can obtain the distribution of the voltage and current components. We define the impedance of TCSC as a ratio of the voltage component of frequency f to the current one of the same frequency. The impedance analytically obtained corresponds well with that obtained by simulations. Its frequency responses vary with the firing method of thyristors. © 2002 Wiley Periodicals, Inc. Electr Eng Jpn, 139(3): 35–44, 2002; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.1158