RG64—High Count Rate Low Noise Multichannel ASIC With Energy Window Selection and Continuous Readout Mode

We report on the performance of a low noise and high count rate readout ASIC with binary architecture and energy window selection for X-ray imaging applications using semiconductor detectors. The ASIC called RG64 is designed in 0.35 mum CMOS process and its total area is 3900times5000 mum². The core of RG64 consists of 64 readout channels. Each channel is built of a charge sensitive amplifier with a second order shaper of peaking time 75 ns, two independent discriminators with an 8-bit offset correction circuit and two independent 20-bit counters with RAM memory buffers. The ENC of the circuit reaches the value of about 126 el. rms with 1 pF input load and 5 mW power consumption per single channel. The mean gain in the multichannel ASIC is about 50 muV/el., with the dispersion from channel to channel of 0.9% (on one sigma level). The deviation of the effective threshold voltage spread for given energy can be reduced to less than 7 el. rms (calculated to the charge sensitive amplifier input). High count rate measurements have been performed up to 2 Mcps of average rate of input pulses, both for AC and DC coupled silicon strip detectors with X-ray photons of energy 8.04 keV. The RG64 can operate both in the continuous readout mode and in the readout mode separate from exposure.     

Low-Power Amplifier-Discriminators for High Time Resolution Detection

Low-power amplifier-discriminators based on a so-called NINO architecture have been developed with high time resolution for the readout of radiation detectors. Two different circuits were integrated in the NINO13 chip, processed in IBM 130 nm CMOS technology. The LCO version (Low Capacitance and consumption Optimization) was designed for potential use as front-end electronics in the Gigatracker of the NA62 experiment at CERN. It was developed as pixel readout for solid-state pixel detectors to permit minimum ionizing particle detection with less than 180 ps rms resolution per pixel on the output pulse, for power consumption below 300 muW per pixel. The HCO version (High Capacitance Optimization) was designed with 4 mW power consumption per channel to provide timing resolution below 20 ps rms on the output pulse, for charges above 10 fC. Results presented show the potential of the LCO and HCO circuits for the precise timing readout of solid-state detectors, vacuum tubes or gas detectors, for applications in high energy physics, bio-technologies or medical imaging.     

Application of CMOS charge-sensitive preamplifier in triple-GEM detector

1 Introduction With novel materials and advanced technique of printed circuit board (PCB) and micro-electronics be- ing used in MPGD, over the past two decades, great progress has been made in MPGD[1], and as a new type of MPGD, the GEM[2] detector was developed during the late 1990s. Standard GEM from CERN is a thin, two-side copper-coated Kapton foil, perforated with a high density of holes etched using a photolitho- graphic process. The diameter of these holes is about 70 μm (ext…     

带增益的气体探测器读出ASIC的研制

设计了用于带增益的气体探测器比如GEM、RPC等读出的ASIC,实现对探测器信号的放大、成形和对后续实时采样ADC的驱动电路.电荷增益和成形时间可调,有利于探测器不同增益下性能的研究,也扩展了芯片的应用范围.由于成形电路引入的噪声变得显著,在低电荷增益下,ENC会随增益下降而增加.芯片采用Chartered 0.35μm2P4M CMOS工艺,论文介绍了芯片的详细设计和仿真结果.     

Hydrogenated Amorphous Silicon Sensor Deposited on Integrated Circuit for Radiation Detection

Radiation detectors based on the deposition of a 10 to 30 mum thick hydrogenated amorphous silicon (a-Si:H) sensor directly on top of integrated circuits have been developed. The performance of this detector technology has been assessed for the first time in the context of particle detectors. Three different circuits were designed in a quarter micron CMOS technology for these studies. The so-called TFA (Thin-Film on ASIC) detectors obtained after deposition of a-Si:H sensors on the developed circuits are presented. High internal electric fields (10⁴ to 10⁵ V/cm) can be built in the a-Si:H sensor and overcome the low mobility of electrons and holes in this amorphous material. However, the deposited sensor's leakage current at such fields turns out to be an important parameter which limits the performance of a TFA detector. Its detailed study is presented as well as the detector's pixel segmentation. Signal induction by generated free carrier motion in the a-Si:H sensor has been characterized using a 660 nm pulsed laser. Results obtained with a TFA detector based on an ASIC integrating 5 ns peaking time pre-amplifiers are presented. Direct detection of 10 to 50 keV electrons and 5.9 keV X-rays with the detectors are then shown to understand the potential and the limitations of this technology for radiation detection.     

GERO: a general SCA-based readout ASIC for micro-pattern gas detectors with configurable storage depth and on-chip digitizer

The paper presents GEneral Read Out(GERO), a general readout ASIC based on a switched capacitor array for micro-pattern gas detectors. It aims at providing general readout electronics for low-to-medium event-rate gas detectors with high sampling frequency, configurable storage depth, and data digitalization. The first prototype GERO chip integrates 16 channels and was fabricated using a 0.18-lm CMOS process. Each channel consists of a sampling array working in a ping-pong mode, a storage array with a 1024-cell depth, and 32 Wilkinson analog-todigital converters. The detailed design and test results are presented in the paper.     

Hybrid direct conversion detectors for digital mammography

Hybrid pixel detector arrays that convert X-rays directly into charge signals are under development at NOVA for application to digital mammography. This technology also has wide application possibilities in other fields of radiology and in industrial imaging for applications in nondestructive evaluation and inspection. These detectors have potentially superior properties compared to either emulsion based film, which has nonlinear response to X-rays, or phosphor-based detectors in which there is an intermediate step of X-ray to light photon conversion. Potential advantages of direct conversion detectors are high quantum efficiencies (QE) of 98% or higher (for 0.3 mm thick CdZnTe detector with 20 keV X-rays), improved contrast, high sensitivity and low intrinsic noise. These factors are expected to contribute to high detective quantum efficiency (DQE). The prototype hybrid pixel detector developed has 50×50 microns pixel size, and is designed to have linear response to X-rays, and can support a dynamic range of 14 bits. Modulation Transfer Function (MTF) is measured on a l-mm silicon detector system where 10% or better modulations are obtained at 10 lp/mm spatial frequency. Preliminary DQE measurements of the same system yields a value of 55% at zero spatial frequency. Here, the authors report data of their first full size prototype readout ASIC chips hybridized with both silicon and CdZnTe detector arrays and present initial MTF and DQE measurement results as well as some test images     

Wafer-Bonded Silicon Gamma-Ray Detectors

A wafer-bonded silicon power transistor has been shown to function as an x-ray detector. The device consists of two thin device wafers bonded onto either side of a 2 mm-thick high-resistivity silicon wafer. The hydrophobic bonding process was performed at 400deg C. This low temperature wafer bonding technique should enable the development of large-area, position-sensitive detectors, using thick, high-resistivity intrinsic silicon bonded to thin readout wafers fabricated using conventional CMOS technology. These devices should enable fabrication of thicker intrinsic silicon detectors than currently available. Thick, position-sensitive detectors based on double-sided strip detectors and pixellated detectors are possible. To demonstrate this, a 1 mm thick gamma-ray detector was created from two 0.5 mm thick wafers that were patterned with gamma-ray strip detectors. The energy resolution of the detector is 8.9 keV FWHM for 60 keV gamma rays at room temperature with a leakage of 0.9 nA while operating at 700 V and fully depleted. Improvements in the technique should allow for thicker detectors with better energy resolution.     

CMOS low-noise switched charge sensitive preamplifier for CdTe andCdZnTe X-ray detectors

CdTe and CdZnTe X-ray detector arrays for imaging and spectroscopy provide low capacitance current sources with low leakage currents. The optimal shaping time for low-noise operation is relatively high in CMOS analog channels that provide the readout for these detectors. The shaper is centered at lower frequencies, and thus the 1/f noise from the electronics is the main noise source that limits the resolution of the channel. The optimal dimensions of the input stage MOSFET are determined by this noise. In this paper a design criterion for the optimization of the resolution and the power consumption in a 1/f noise dominated readout is introduced. A readout based on CMOS switched charge sensitive preamplifier without feedback resistor has been designed and fabricated in the CMOS 2-μ low-noise analog process provided by MOSIS. This design provides high sensitivity and the possibility to integrate a large number of channels with low power consumption. Measurements of the performance of a first prototype chip are presented     

基于3D Si PIN阵列热中子探测器的变增益宽动态前端读出电子学设计

基于Si CMOS技术的前端读出ASIC主要是根据3D Si PIN阵列热中子探测器的输出信号特性设计的。所设计的读出ASIC的主要电路模块包括电荷灵敏放大器（CSA）、模拟开关设计、具有三级电荷灵敏自动转换的自动增益控制模块（AGC）、相关双采样（CDS）和基准电流源电路。仿真结果表明,前端电路的输入动态范围为10 fC~80 pC。根据热中子探测器输出信号特性设计的ASIC的3个增益系数分别为19 V/pC、039 V/pC和94 mV/pC。所设计的ASIC的积分非线性小于 1%。单通道静态功耗约为 536 mW。零输入探测器电容时的等效噪声电荷为2416e-。计数率可达1 MHz 。     

RX64DTH -a fully integrated 64-channel ASIC for a digital X-ray imaging system with energy window selection

We report on the multichannel IC (RX64DTH) designed for position sensitive X-ray measurements with silicon strip detectors and dedicated to medical imaging applications. This integrated circuit has a binary readout architecture with a double threshold allowing on selection energy window for measured signals. The design was realized in a 0.8 /spl mu/m CMOS process. The core of the RX64DTH IC consists of 64 readout channels. The single channel is built with four basic blocks: charge sensitive preamplifier, shaper, two independent discriminators, and two independent 20-bit counters. Each readout channel counts pulses which are above the low discriminator threshold and counts pulses independently above the high discriminator threshold. The energy resolution in such architecture is limited by the noise of a single channel and by channel to channel threshold spread. We present the noise and matching performance of a 384-channel module built with a silicon strip detector and six RX64DTH ICs. In the 384-channel module an equivalent noise charge of about 200 el. rms is achieved for the shaper peaking time of 0.8 /spl mu/s and strip capacitance of 3 pF. The deviation of discriminator thresholds for the whole system is only 87 el. rms. The obtained results show that the energy resolution and uniformity of analog parameters (noise, gain, offset) are sufficient for medical diagnostic applications such as dual energy mammography and angiography.     

XA readout chip characteristics and CdZnTe spectral measurements

The authors report on the performance of a CdZnTe (CZT) array readout by an XA (X-ray imaging chip produced at the AMS foundry) application specific readout chip (ASIC). The array was designed and fabricated at NASA/Goddard Space Flight Center (GSFC) as a prototype for the Burst Arc-Second Imaging and Spectroscopy gamma-ray instrument. The XA ASIC was obtained from Integrated Detector and Electronics (IDE), in Norway. Performance characteristics and spectral data for ²⁴¹Am are presented both at room temperature and at -20°C. The measured noise (σ) was 2.5 keV at 60 keV at room temperature. This paper represents a progress report on work with the XA ASIC and CZT detectors. Work is continuing and in particular, larger arrays are planned for future NASA missions     

基于APV25多通道读出电子学系统设计

介绍了基于APV25芯片的多通道读出电子学系统的设计方法,利用ASIC芯片与可扩展读出系统相结合,实现多通道信号的处理。在该系统中,基于PXI机箱的单个读出板可实现2 048路信号的读出及处理,并具有集成度高、低功耗、可扩展等优点。电子学测试结果表明,本系统电荷输入线性动态范围为0~12 fC,APV25等效输入噪声408 e,可适应大型物理实验微结构气体探测器、硅像素探测器等探测器的读出需求。     

基于FELIX的微结构气体探测器读出电子学系统设计

微结构气体探测器因其精度高、面积大等优点,在粒子物理实验中得到了非常广泛的应用。微结构气体探测器的未来应用将面临ASIC种类多、通道数多、数据量大等问题,给读出电子学系统的设计带来了很大的挑战,已成为微结构气体探测器进一步发展应用的瓶颈。FELIX系统具有数据带宽大、通道数多等特点,可很好解决这一问题。基于FELIX的电子学系统由完成探测器信号数字化的前端电子学模块、完成数据汇总的GBT模块、完成数据读出的FELIX系统、完成数据处理的数据处理终端组成,可完成10 240路半数字通道读出或4 096路模拟通道读出。该系统与Micromegas探测器一起实现宇宙线径迹探测,验证了该系统的通用性和兼容性,为微结构气体探测器的应用需求提供了一个通用的解决方案。     

The micro-imaging station of the TopoTomo beamline at the ANKA synchrotron light source

The TopoTomo bending magnet beamline at the ANKA synchrotron facility in Karlsruhe (Germany) operates in the hard X-ray regime (above 6 keV). Recently, an X-ray micro-imaging station has been installed at TopoTomo. For typical imaging applications, a filtered white beam or from 2009 on a double-multilayer monochromator is used. In order to optimize the field of view and the resolution of the available indirect pixel detectors, different optical systems have been installed, adapted, respectively, to a large field of view (macroscope) and to high spatial resolution (microscope). They can be combined with different camera systems, ranging from 14-bit dynamic range CCDs to fast CMOS cameras. The spatial resolution can be brought substantially beyond the micrometer limit by using a Bragg magnifier. Due to the moderate flux of the beamline compared to insertion-device beamlines on third generation light sources, special emphasis has been put on the efficiency of the detectors via a dedicated scintillator concept. The layout of the beamline optics makes optimal use of the coherence properties. Thus, absorption contrast, phase-contrast and analyzer-based imaging can be applied. Additionally, white beam synchrotron topography is performed, using digital indirect X-ray pixel detectors as well as X-ray film.     

The data-acquisition system for the CMS tracker beam tests

This paper describes the conception and the development of a real-time data-acquisition system for prototype detectors of the Tracker being designed for the compact muon solenoid (CMS) experiment at the Large Hadron Collider of CERN, European Laboratory for Particle Physics, Geneva, Switzerland. The rationale for the development of a dedicated data-acquisition system was the need to perform two fundamental beam tests (the “Milestone Barrel 1” and “Milestone Forward 1”), with large-scale prototypes of the detectors planned as the baseline design. The number of readout channels, the complexity of the readout electronics, and the stringent requirements of the milestone tests mandated that a thorough understanding of the issues related to the physics of the detectors themselves be coupled with the application of leading-edge electronic and software engineering technologies. The implementation described in this paper is based on a distributed architecture. An event builder CPU handles the two main tasks of synchronizing a variable number of front-end processors and formatting the data in preparation for the transfer to a dedicated high-performance storage system, while the front-end processors handle the hardware and the real-time readout. Additional workstations are used to decouple the actual task of transferring the data files and monitoring the detector performance on-line from the readout farm. The system has been successfully operated during the two aforementioned Milestone tests, allowing the CMS Tracker collaboration to pass them, with the simultaneous readout of up to 40000 detector channels. The results of the two Milestones have led to the compilation of the “Tracker Technical Design Report”. Subsequently, the same readout system has been used for a number of other beam tests, and it has formed the basis for the development of further, more advanced data-acquisition systems for the new readout electronic of the CMS Tracker     

硅像素探测器读出芯片的设计

针对应用在高能物理实验的硅像素探测器,设计了一种基于时间过阈技术的像素阵列读出芯片。芯片采用商用的130 nm CMOS工艺进行流片,共有30×10个像素单元,像素单元的面积为50 μm×250 μm。测试结果表明,像素单元电路的等效噪声电荷低于100e^-,积分非线性优于4.2%,基本实现了设计的功能。     

Development of hybrid photon detectors with integrated siliconpixel readout for the RICH counters of LHCb

We report on the ongoing work towards a hybrid photon detector with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment at the Large Hadron Collider at CERN. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is demagnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a fast, binary readout chip with matching pixel electronics. The developments and tests of full-scale prototypes with 80% active area are presented. Specific requirements for pixel front-end and readout electronics in LHCb are outlined, and recent results obtained from pixel chips applicable to hybrid photon detector design are summarized     

SPICE evaluation of the S/N ratio for Si microstrip detectors

SPICE simulations of ac-coupled single-sided Si microstrip detectors connected to the PreShape 32 read-out chip have been performed in order to determine the geometrical characteristics (i.e., the strip pitch p and width w) which maximize the signal-to-noise ratio. All of the resistive and capacitive elements of the detector have been determined as a function of the w/p ratio by considering experimental and simulated data available in literature. The SPICE model the authors propose in this work takes into account all the main noise sources in the detector and read-out electronics. The minimum ionizing particle current signal shape has been introduced in the simulations. Two readout configurations (every strip or every second strip) have been investigated for 6.4- and 12.8-cm-long detectors. The equivalent noise charge as determined by the simulations has been compared with analytical calculations, in order to determine the limits and the corrections to a simplified analytical noise model. Finally, general guidelines for the detector design have been proposed, based on the simulation results     

基于SCA波形采样读出电子学的CSNS Back-n中子飞行时间测量

中国散裂中子源(CSNS)反角白光中子束线(Back-n)对中子核数据测量和核技术应用等多个领域均有重要意义。为监测其中子束斑轮廓、束流密度及束流能量,研制了由镀硼微网格气体(Micromegas)探测器构成的束流剖面监测装置,并通过测量中子的飞行时间(TOF)来获得能量信息。采用基于开关电容阵列(SCA)专用集成电路(ASIC)的波形采样电子学系统,实现了128路Micromegas探测器阳极条信号的低噪声放大、成形和波形数字化,在现场可编程逻辑门阵列(FPGA)芯片中实现了对信号过阈时间的实时测量,其量程为650 ns～10 ms,电子学时间分辨好于10 ns。在CSNS Back-n上开展实验,成功获得了中子束流剖面及10.65 μs～10 ms范围的飞行时间谱,对应的中子能量范围约为0.16 eV～0.14 MeV。利用钽、钴等吸收体进行了中子共振吸收峰的检验,验证了读出电子学系统的功能及飞行时间测量的正确性。