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1.
侯群 《无线电工程》2012,42(2):4-6,16
通过对甚高频(VHF)跳频电台射频前端接收模块设计指标和具体结构的介绍,对整个接收机射频前端电路进行了电路设计,构建了一个由第一、第二级混频器,中频放大器,第一、第二中频晶体滤波器,限幅器和推动器,正交检测器,收基带信号(RXBB)放大器,机内测试电路(BITE)以及静噪单音检测组成的接收模块电路。实验结果表明,所设计的接收模块的性能指标达到了系统设计要求,并有所提高。  相似文献   

2.
The known result for the output reading of a quasi-peak detector to periodic pulse inputs is here extended to cover inputs made up of regularly repeated pulses of the same shape, but with random amplitudes. The cosine envelope was chosen for the pulse shape and is viewed as a satisfactory approximation for the typical IF amplifier impulse response. The probability distribution for the pulse amplitude was assumed uniform over an amplitude interval; the latter is a parameter in the analysis so that the result applies, at one extreme, to pulses ranging randomly from zero amplitude to some maximum, and at the other extreme, to fixed amplitude pulses. Solutions are provided for low-frequency inputs-such as would be developed at the output of an IF amplifier followed by an envelope detector, and RF inputs-such as would be found directly at the IF amplifier output.  相似文献   

3.
使用AD603和AD8318实现大动态范围IF接收机   总被引:5,自引:0,他引:5  
通过对雷达接收设备中中频接收设备电路的基本原理的学习和研究,着重介绍了低噪声可变增益放大器AD603以及高精确度和温度稳定性的对数放大检波器AD8318的使用。最后以AD603,AD8318为核心放大器、检波器,详细阐述了中频接收机放大电路和检波电路以及滤波器电路的设计与实现,实现了超过100dB动态范围的IF接收机。最后通过测试提出了一些相关注意事项。  相似文献   

4.
An IC signal-processing circuit that can be applied in both black-and-white and color receivers is described. The integrated circuit combines the following functions: video preamplifier; keyed AGC detector, operating on top sync level; AGC amplifier for IF and tuner control; noise canceling circuits for AGC and sync circuits; sync separator; automatic horizontal sync; and vertical sync pulse separator. Due to the noise-canceling circuit a stable synchronization is obtained when impulse noise is received. Since the values of the capacitors in the AGC circuit can be rather low without difficulties with instabilities, the performance during fast input signal fluctuations (airplane flutter) is very good.  相似文献   

5.
This paper presents a low-voltage low-power IF 455-kHz signal processor that contains a three-stage limiting amplifier and an FM/FSK demodulator. The limiting amplifier uses an on-chip feedforward offset cancellation circuit. The FM/FSK demodulator employs a quadrature detector that is composed of an on-chip phase detector and an external tank phase shifter. The demodulation constant is 20 mV/kHz with masimum ±10-kHz frequency deviation. The IF signal processor that consumes 2.3 mW from a single 2-V power supply demonstrates a high sensitivity of -72 dBm. It occupies an active area of 0.2 mm2 using 0.6-μm digital CMOS technology  相似文献   

6.
介绍某雷达接收机中一种新型的线性限幅中放与相检器单元 ,叙述其组成、工作原理及实验测试结果  相似文献   

7.
In this paper four different millimeter wave equipments, which have been made for plasma diagnostic work, are described. They are: 1) A straightforward 70-Gc superheterodyne radiometer with an over-all noise factor of 13 db; 2) An early 140-Gc radiometer, with second harmonic mixing, which has an over-all noise factor of about 25 db; 3) A later and more sensitive 140-Gc radiometer which contains a fundamental local oscillator, VX 3352 mixer crystals and a 408-Mc IF amplifier commencing with an Adler tube; 4) A very simple 140-Gc transmission measuring equipment containing a 1-watt source and a crystal video receiver which has a tangential sensitivity of ---42 dbm. The last part of this paper discusses the minimum temperature changes which can be detected, at short millimeter wavelengths, with various types of superheterodyne radiometers, the Golay cell, the barretter, the crystal video radiometer, the 1.5/spl deg/K carbon bolometer and the 1.5/spl deg/K InSb photoconductive detector. The performances expected from straight traveling-wave tube radiometers and traveling-wave masers at short millimeter wavelengths are also considered. The Appendices are devoted to mixer crystal performance in the millimeter and submillimeter regions, a theory of second harmonic mixing and the voltage sensitivity of a forward biased detector crystal.  相似文献   

8.
为了提高频谱分析仪的频率分辨率,同时降低模拟中频、视频电路组件的生产难度,现代频谱分析仪大多采用数字中频技术,利用模数转换器把模拟中频信号转换为数字信号,经过数字下变频、数字滤波、数字检波或快速傅里叶变换运算后得到射频信号的幅度和频率信息,再经过视频滤波处理后得到清晰的信号频谱.文中论述的信号处理方案实现了频谱的数字分析,在实际应用中验证了其指标的稳定.  相似文献   

9.
针对中频接收机大动态范围与高灵敏度的要求,提出了一种中频快速数字自动增益控制(DAGC)算法。该算法通过对正交视频信号进行符号判别实现快速幅度检波和门限比较,利用多级双门限分段线性化的方法实现数字对数放大(DLA),结合使用数控衰减器(DCA)扩大中频接收机的输入动态范围。给出了基于FPGA的中频快速DAGC实现方案。实际应用证明,采用该方案的数字化中频接收机在保证接收灵敏度为-58 dBm的情况下,动态范围可达80 dB以上。  相似文献   

10.
W波段宽带辐射计   总被引:1,自引:0,他引:1       下载免费PDF全文
以被动式毫米波成像为应用背景,介绍了辐射计的工作原理,成功研制了一种带宽35 GHz集成直接检波式辐射计原理样机,以满足成像系统对辐射计的需求。信号由两级低噪声放大器进行放大,再由检波器直接检波,最后进行视频放大,以提供足够高的信号供后端进行数据采集。放大器由两级低噪声放大器组成,放大增益40 dB。单独对检波器进行设计、测试,在75~100 GHz范围内,该检波器电压灵敏度大于1 000 mV/mW,在100~110 GHz范围内,电压灵敏度大于500 mV/mW。最后集成了一个整体辐射计模块,该辐射计在35 GHz带宽内积分时间为0.6 ms,温度灵敏度为0.45 K。  相似文献   

11.
A synchronous phase-lock loop AM detector has been realized on a single chip in a bipolar process with an f/SUB T/ of 400 MHz. The circuit accepts input signals at an IF frequency of 450-500 kHz with effective values between 20 and 100 mV. The phase-lock loop capture range is about 150 kHz. AM signals with over 80% modulation depth can be demodulated with less than 1% harmonic distortion in the audio output signal. The power dissipation of the chip is 120 mW at 8 V. The total chip size is 1900/spl times/1300 /spl mu/m/SUP 2/. Since the VCO and the 90/spl deg/ phase shift are completely realized on-chip, large signals at the IF frequency do not occur at the pins of the IC, and parasitic feedback of such signals to the IF amplifier input is minimized.  相似文献   

12.
An analog phase-locked oscillator is used as a power amplifier for FM communications signals. Intended service is for FDM telephone message service or television relay. The output power is generated in a varactor-tuned oscillator, which is synchronized with a weak input signal using a phase-lock loop. This involves a phase detector and a wide-band direct-coupled video amplifier whose output is applied to the tuning varactor. The paper is largely theoretical, relating the parameters of the feedback loop to the performance of the overall device. Explicit expressions are derived for the noise figure, the frequency response of the modulation characteristic, AM-PM conversion, and nonlinearity effects in terms of differential gain and intermodulation. In addition, two experimental models are described, together with certain measured data. The phase-lock method differs in many ways from multistage reflection amplifiers and appears to offer advantages for many applications. The device has adequate bandwidth and linearity for a single FDM-FM signal with 1800 or more channels, but must be tuned to the intended frequeucy. Tuning procedures are simple. High gain of 25-35 dB is obtainable in a single microwave "stage." Most of this gain may be associated with the functions of phase detection, video amplification, and VCO tuning. Of major importance, with respect to noise, is that the device is functionally equivalent to a high-gain low-noise microwave preamplifier followed by a low-gain power amplifier stage in which the preamplifier has the noise figure of the phase detector combined with the video amplifier, and the power stage has a noise figure appropriate to the class of power diode used. FM noise generation is substantially lower than in a high-gain reflection amplifier using the same class of microwave power diode throughout.  相似文献   

13.
This paper presents a monolithically integrated IF amplifier and envelope detector for an AM upconversion car-radio receiver. This receiver is intended for the reception of the long-wave and medium-wave frequency bands and uses an intermediate frequency of 10.7 MHz. Specific requirements resulting from the upconversion concept will be illustrated and the basic considerations for maximization of the signal-to-noise ratio as a function of the input signal level will be given. Furthermore, a new method will be presented for fixing the signal levels and the AGC speed in the amplifier. The amplifier uses two emitter-driven variable-gain pairs alternated by negative-feedback current amplifiers. It has an AGC range of 90 dB and a gain of 66 dB. The audio output level is constant within 0.2 dB over the full controll range. A cross-quad compensated envelope detector is driven at a level as low as 30 mV and shows less than 3-percent distortion at a modulation depth of 80 percent.  相似文献   

14.
对基于真对数放大器的雷达中频接收机进行了原理分析和数学分析,并给出了一个基于真对数放大器的雷达中频接收机实例.利用仿真程序,建立了基于真对数放大器的雷达中频接收机数学模型,并对其抗干扰能力进行了仿真评估,验证了采用基于真对数放大器的雷达中频接收机可以提高雷达的抗干扰能力.  相似文献   

15.
Wide-band intermediate-frequency (IF) amplifiers are needed when the data rates of communication systems increase. A single wide-band IF amplifier can also be used for a radio band with several narrow-band channels of varying strengths. High linearity is then required if intermodulation products are not to disturb weak channels. We have previously reported a highly linear wide-band IF amplifier in a complementary metal-oxide-semiconductor process. Using a similar topology, an npn-only bipolar amplifier with even higher linearity is now presented. The amplifier is fully differential and operates with a 5 V supply, At 20 MHz, 5 Vpp over a 1 kΩ load, the measured total harmonic distortion is just 9.068%  相似文献   

16.
A non-coherent receiver for impulse radio ultra-wide band(IR-UWB)is presented.The proposed receiver front-end consists of a high gain LNA,a high frequency detector and an intermediate frequency(IF)amplifier to amplify the recovered signal and drive an external test instrument.To meet the requirements of high gain and a low noise figure(NF)under moderate power consumption for the LNA,capacitor cross coupled(CCC)and current reuse techniques were adopted.The detector consists of a squarer and an integrator.The overall circuit consumes 41.2mA current with a supply voltage of 1.8 V at a 400 MHz pulse rate.The resulting energy efficiency is 0.19 nJ/pulse.A chip prototype is implemented in 0.18-μm CMOS.The die area is 2.1×1.4 mm~2 and the active area is 1.7×0.98 mm~2.  相似文献   

17.
朱祥维  王飞雪 《电子学报》2005,33(3):545-548
分析了载波多普勒下基于平方律检波的二相编码信号的分段相关-视频积累检测方法,推导了处理损耗公式.采用最大处理损耗最小化准则,分析了总积累时间给定和检测性能指标给定两种情况下最优中频积累时间的计算方法和变化规律.研究结果可用于指导扩频通信和导航系统接收机的设计.  相似文献   

18.
It is well known that power amplifier induced non-linear distortions produce a signal spectral regrowth at the IF transmitter output of digital radio communication systems. This effect is responsible for both adjacent channel interference and BER degradation. Signal predistortion is a technique that counteracts such phenomena. Technological advances in the last decade, renewing the interest in this technique, led to the realization of digital baseband (BB) predistorters that overcome the performance of the existing analog IF (intermediate frequency) ones. However, the substitution of an analog IF predistorter with a digital BB one forces one to partially redesign the system architecture. An alternative approach is proposed in this paper, based on digital and analog techniques, which combines the precision of the digital BB solution with the practicality of an IF architecture. This solution is particularly interesting to substitute an old analog IF predistorter simply plugging-in the new digital one, without further changes in the transmitter architecture. Critical aspects, predistortion algorithms and simulation performance are presented with respect to a digital video broadcasting system which is based on an OFDM modulation and is very sensitive to non-linear distortions because of the adopted multicarrier modulation  相似文献   

19.
A CMOS logarithmic intermediate-frequency (IF) amplifier that is applied to mobile telecommunications equipment is presented. The CMOS logarithmic IF amplifier has pseudologarithmic rectifiers made from parallel-connecting full-wave rectifiers, consisting of unbalanced source-coupled pairs with the cross-coupled input stage and parallel-connected output stage. A ±3-dB logarithmic accuracy, a 90-dB input dynamic range, and a -30 to 80°C operating temperature range were achieved with the 1.3-μm double-polysilicon n-well CMOS process. Typical power consumption by the logarithmic IF amplifier in the fabricated CMOS LSI was 5.5 mW. The block area for the logarithmic IF amplifier was 0.8 mm2  相似文献   

20.
The design, fabrication, and evaluation of a W-band image-rejection downconverter based on pseudomorphic InGaAs-GaAs HEMT technology are presented. The image-rejection downconverter consists of a monolithic three-stage low-noise amplifier, a monolithic image-rejection mixer, and a hybrid IF 90° coupler with an IF amplifier. The three-stage amplifier has a measured noise figure of 3.5 dB, with an associated small signal gain of 21 dB at 94 GHz while the image-rejection mixer has a measured conversion loss of 11 dB with +10 dBm LO drive at 94.15 GHz. Measured results of the complete image-rejection downconverter including the hybrid IF 90° coupler and a 10 dB gain amplifier show a conversion gain of more than 18 dB and a noise figure of 4.6 dB at 94.45 GHz  相似文献   

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