Root squaring using level-index arithmetic

The symmetric level-index,sli, system for representing numbers eases the monitoring of precision while avoiding the problems associated with overflow and underflow. In this paper the practical benefits of the system are displayed, using the root-squaring method of Graeffe as a vehicle.     

Least significant bit evaluation of arithmetic expressions in single-precision

Single-precision floatingpoint computations may yield an arbitrary false result due to cancellation and rounding errors. This is true even for very simple, structured arithmetic expressions such as Horner's scheme for polynomial evaluation. A simple procedure will be presented for fast calculation of the value of an arithmetic expression to least significant bit accuracy in single precision computation. For this purpose in addition to the floating-point arithmetic only a precise scalar product (cf. [2]) is required. If the initial floatingpoint approximation is not too bad, the computing time of the new algorithm is approximately the same as for usual floating-point computation. If not, the essential progress of the presented algorithm is that the inaccurate approximation is recognized and corrected. The algorithm achieves high accuracy, i.e. between the left and the right bound of the result there is at most one more floating-point number. A rigorous estimation of all rounding errors introduced by floating-point arithmetic is given for general triangular linear systems. The theorem is applied to the evaluation of arithmetic expressions.     

基于FPGA的可配置浮点向量乘法单元设计实现

针对目前采用IEEE 754浮点标准设计的FPGA浮点运算器中吞吐率与资源利用率低等问题,提出一种运算精度与运算器数量可配置的并行浮点向量乘法运算单元。通过浮点运算器的指数、尾数位数可配置化设计,提高系统资源利用率,并将流水线技术与并行结构结合,提高数据吞吐率。以EP4CE115型FPGA为测试平台,当配置10组FP14运算器时,系统的逻辑资源占用约为4.2%,峰值吞吐率可达4.5 GFLOPS。结果表明,提出的浮点向量乘法单元有效提高了FPGA资源利用率与运算吞吐率,同时具有高度的可移植性与通用性,适用于FPGA向量乘法运算的加速。     

Fast transformation of three-dimensional graphics structures via mixed-point arithmetic

Real-time animation of three-dimensional structures on refreshed tube interactive graphics processors usually requires floating-point arithmetic hardware for matrix manipulation and object transformation by the resultant matrix. An algorithm is described which uses fixed-point hardware to effect the required transformations at speeds surpassing that possible with floating-point hardware with no effective loss in accuracy. The algorithm involves ‘mixed-point arithmetic’—limited precision floating-point multiplication, conversion to an integer-fraction doubleword, and fixed-point addition.     

Advanced Arithmetic for the Digital Computer,Design of Arithmetic Units

Advances in computer technology are now so profound that the arithmetic capability and repertoire of computers can and should be expanded. Nowadays the elementary floating-point operations +, −, ×, / give computed results that coincide with the rounded exact result for any operands. Advanced computer arithmetic extends this accuracy requirement to all operations in the usual product spaces of computation: the real and complex vector spaces as well as their interval correspondents. This enhances the mathematical power of the digital computer considerably. A new computer operation, the scalar product, is fundamental to the development of advanced computer arithmetic.This paper studies the design of arithmetic units for advanced computer arithmetic. Scalar product units are developed for different kinds of computers like personal computers, workstations, mainframes, super computers or digital signal processors. The new expanded computational capability is gained at modest cost. The units put a methodology into modern computer hardware which was available on old calculators before the electronic computer entered the scene. In general the new arithmetic units increase both the speed of computation as well as the accuracy of the computed result. The circuits developed in this paper show that there is no way to compute an approximation of a scalar product faster than the correct result.A collection of constructs in terms of which a source language may accommodate advanced computer arithmetic is described in the paper. The development of programming languages in the context of advanced computer arithmetic is reviewed. The simulation of the accurate scalar product on existing, conventional processors is discussed. Finally the theoretical foundation of advanced computer arithmetic is reviewed and a comparison with other approaches to achieving higher accuracy in computation is given. Shortcomings of existing processors and standards are discussed.     

基于FPGA的浮点向量协处理器设计

为满足现代数字信号处理中大量数据的运算需求,利用ARM946和Xilinx公司的现场可编程门阵列芯片逻辑资源和IP库,设计专门用于浮点复数向量运算的64位协处理器,对相关浮点运算进行优化,并在硬件仿真平台上进行测试。结果表明,该协处理器可使浮点复数向量运算性能得到大幅提高。     

Computations that require higher than double precision for robust and exact decision making

Consider the computation of deciding relative orientations of objects undergoing multiple translations and rotations. Such an orientation test involves the computation of expressions based on arithmetic operations, square roots and trigonometric functions. The computation of signs of such expressions using double precision floating-point arithmetic in modern computers may result in errors. In this article we demonstrate the existence of examples where double precision is not sufficient to compute the correct sign of an expression. We consider (i) simple expressions involving only the four basic arithmetic operations, (ii) expressions involving the square-root function and (iii) expressions representing orientation tests in two- and three-dimensions involving objects undergoing arbitrary rotations by angles given in radians, thereby requiring the computation of trigonometric functions. We develop a system that uses requisite high precision for computing the correct sign of such expressions. The system uses our floating-point filter called L-filter and the bigfloat extended precision package in LEDA (Library of Efficient Data Types and Algorithms).     

Error detection of arithmetic expressions

Inspecting floating-point errors is essential to floating-point operations. In this paper, we present floating-point error detector (FPED), an inspector of floating-point errors for arithmetic expressions. FPED can pick a suitable benchmark generation approach by analyzing the distribution of the expression of a floating-point operation, thereby minimizing the possibilities of underreporting floating-point errors. FPED is also able to determine the significant sources of errors in a floating-point operation according to the frequencies of computation building blocks that contribute most to the floating-point errors, benefiting the follow-up optimizations of computation accuracies. We validate the correctness and functionalities of FPED by conducting experiments on the FPBench benchmark suite. The experimental results demonstrate that FPED can obtain more accurate detection results than the random detecting approach with respect to floating-point error detection. We also compare FPED with the existing dynamic error detection tools. The experimental results show that in most of the 33 test benchmarks, the maximum error results of FPED are greater than Herbgrind and the detection performance is higher than Herbgrind.

     

Accurate arithmetic for vector processors

In addition to the four elementary arithmetic operations, more advanced electronic computers such as vector and parallel computers often provide a number of compound operations as additional elementary operations. If pipelined compound operations like “multiply and add,” “accumulate,” and “multiply and accumulate” contribute essentially to the high speed of the system. Accuracy requirements lead to very similar operations. We identify a set of operations which meet both requirements: high speed and accuracy. After a brief discussion of implementation techniques for the simpler of these operations we present two methods and circuits which allow a fast and correct computation of the more complicated of these operations: “accumulate” and “multiply and accumulate.” The first method computes sums and dot products by making use of a matrix-shaped and pipelined arrangement of adders which cover the full floating-point range. The second method requires some local memory on the arithmetic unit. It permits a drastic reduction in the number of adders required. Both methods can also be used to build a fast arithmetic unit for microcomputers in VLSI technology.     

Detection and Validation of Clusters of Polynomial Zeros

We consider the task of partitioning the zeros of a real or complex polynomial into clusters and of determining their location and multiplicity for polynomials with coefficients of limited accuracy. We derive computational procedures for the solution of this task which combine symbolic computation with floating-point arithmetic. The validation of the existence ofmzeros in a specified small disk is described.     

Low-Cost Microarchitectural Support for Improved Floating-Point Accuracy

Some processors designed for consumer applications, such as graphics processing units (CPUs) and the CELL processor, promise outstanding floating-point performance for scientific applications at commodity prices. However, IEEE single precision is the most precise floating-point data type these processors directly support in hardware. Pairs of native floating-point numbers can be used to represent a base result and a residual term to increase accuracy, but the resulting order of magnitude slowdown dramatically reduces the price/performance advantage of these systems. By adding a few simple microarchitectural features, acceptable accuracy can be obtained with relatively little performance penalty. To reduce the cost of native-pair arithmetic, a residual register is used to hold information that would normally have been discarded after each floating-point computation. The residual register dramatically simplifies the code, providing both lower latency and better instruction-level parallelism.     

Compiler support for floating-point computation

Predictability is a basic requirement for compilers of floating-point code—it must be possible to determine the exact floating-point operations that will be executed for a particular source-level construction. Experience shows that many compilers fail to provide predictability, either because of an inadequate understanding of its importance or from an attempt to produce locally better code. Predictability can be attained through careful attention to code generation and a knowledge of the common pitfalls. Most language standards do not completely define the precision of floating-point operations, and so a good compiler must also make a good choice in assigning precisions of subexpression computation. Choosing the widest precision that will be used in the expression usually gives the best trade-off between efficiency and accuracy. Finally, certain optimizations are particularly useful for floating-point and should be included in a compiler aimed at scientific computation. But predictability is more important than efficiency; obtaining incorrect answers fast helps no one.     

航空发动机FADEC系统软件浮点数计算精度分析

航空发动机FADEC系统控制软件的计算精度和运行效率是一对不可缺少的特性.为提高航空发动机FADEC系统控制软件的浮点计算的计算精度和运行效率,从IEEE 754浮点数格式、浮点数的表示形式、浮点数四则运算的精度方面展开分析,并结合FADEC系统控制软件项目实际应用案例的数据结果,验证了精度分析结果的正确性,并以此为基础针对FADEC系统控制软件的浮点算法设计提出了设计准则,有助于提高控制软件的可靠性和安全性,可推广至其他行业的控制领域应用.     

Twin-float arithmetic

We present a heuristically certified form of floating-point arithmetic and its implementation in CoCoALib. This arithmetic is intended to act as a fast alternative to exact rational arithmetic, and is developed from the idea of paired floats expounded by Traverso and Zanoni (2002). As prerequisites we need a source of (pseudo-)random numbers, and an underlying floating-point arithmetic system where the user can set the precision. Twin-float arithmetic can be used only where the input data are exact, or can be obtained at high enough precision. Our arithmetic includes a total cancellation heuristic for sums and differences, and so can be used in classical algebraic algorithms such as Buchberger’s algorithm. We also present a (new) algorithm for recovering an exact rational value from a twin-float, so in some cases an exact answer can be obtained from an approximate computation.     

二阶系统的最小范数状态向量及其模型跟随自适应控制

本文提出了系统的最小范数状态向量的概念,分析了二阶单输入单输出系统的状态向量与它的最小范数状态向量的关系,并由此导出了一种利用系统的最小范数状态向量的模型跟随自适应控制算法,该算法的在线计算量较小,并同时具有良好的控制精度及鲁棒性.     

Verified Computation of Fast Decreasing Polynomials

In this paper the problem of verified numerical computation of algebraic fast decreasing polynomials approximating the Dirac delta function is considered. We find the smallest degree of the polynomials and give precise estimates for this degree. It is shown that the computer algebra system Maple does not always graph such polynomials reliably because of evaluating the expressions in usual floating-point arithmetic. We propose a procedure for verified computation of the polynomials and use it to produce their correct graphic presentation in Maple.     

Numerical accuracy control in fixed-point arithmetic

The purpose of this paper is to look at the problem of propagation of round-off errors in fixed-point arithmetic and at various problems of checking solutions of equations already treated by La Porte and Vignes in the case of floating-point arithmetic. We first consider the probabilistic model for the numerical fixed-point representation on a computer, the evaluation of the mean value and of the standard deviation for the absolute error of the assignment operator A, and of elementary operators of arithmetic. We then compute the statistical estimate of the error in the computation of an inner product, and this leads us to the problem of checking the accuracy of the solution of linear systems and of algebraic equations.     

Secure computation of hidden Markov models and secure floating-point arithmetic in the malicious model

Hidden Markov model (HMM) is a popular statistical tool with a large number of applications in pattern recognition. In some of these applications, such as speaker recognition, the computation involves personal data that can identify individuals and must be protected. We thus treat the problem of designing privacy-preserving techniques for HMM and companion Gaussian mixture model computation suitable for use in speaker recognition and other applications. We provide secure solutions for both two-party and multi-party computation models and both semi-honest and malicious settings. In the two-party setting, the server does not have access in the clear to either the user-based HMM or user input (i.e., current observations) and thus the computation is based on threshold homomorphic encryption, while the multi-party setting uses threshold linear secret sharing as the underlying data protection mechanism. All solutions use floating-point arithmetic, which allows us to achieve high accuracy and provable security guarantees, while maintaining reasonable performance. A substantial part of this work is dedicated to building secure protocols for floating-point operations in the two-party setting, which are of independent interest.     

Composite arithmetic: proposal for a new standard

A general-purpose arithmetic standard could give general computation the kind of reliability and stability that the floating-point standard brought to scientific computing. The author describes composite arithmetic as a possible starting point. He describes a formatting scheme for storage and display of exact and inexact numbers and an extended arithmetic with a number format as its basis. He also introduces possibilities for implementing the arithmetic and discusses the interface between the representations and the arithmetic     

Embedding universal computer arithmetic in higher programming languages

In numerical computations mainly real and complex numbers, intervals as well as matrices and vectors with such components occur. It is well known that the arithmetic operations with real numbers, complex numbers etc. can be carried over to real floating-point numbers, complex floating-point numbers etc. using roundings. This proceeding results in agreeable arithmetic-, order- and compatibility-properties for an abundance of numerical data types and the accompanying arithmetic operations. Most programming languages however only provide real floating-point numbers; all the other data types and operations have to be simulated, e. g. in the form of arrays and procedure calls, which often causes loss of accuracy and arithmetic properties. Furthermore the complicate notation makes programs difficult to read. Therefore in this article an extension of PASCAL is presented which serves as an example for the way these numerical data types can be embedded into the syntax of a programming language.