OFDM系统中的ICI干扰消除技术

针对高速移动环境下多普勒频偏造成移动信道的快衰落和正交频分复用OFDM系统中子载波间干扰（ICI）问题,本文给出了OFDM系统中的多种ICI干扰消除技术。     

单载波频域均衡消除符号间干扰的研究

介绍了单载波频域均衡（SC-FDE）系统以及SC-FDE所常用的频域块最小均方（FBLMS）算法。为了进一步改进单载波频域均衡系统的性能，基于抽头泄漏的思想，通过增加抽头的泄漏进一步优化了FBLMS算法，并对基于优化算法的单载波频域均衡系统进行了计算机仿真模拟。其仿真结果表明：与常用算法相比较，该优化算法能有效提高均衡器的收敛速度和显著改善均衡器消除符号间干扰（ISI）的性能。     

MIMO-OFDM系统载波间干扰的时域消除

由于载波间干扰（ICI）是影响正交频分复用（OFDM）系统性能的重要因素,一般消除ICI时作信道估计都采用辅助导频的方法,需要使用大量的离散导频,为此提出了一种对MIMO信道中ICI消除的时域均衡方法。该方法利用MIMO空时检测后的数据信息迭代回去,当作导频符号估计出时变信道的冲激响应,然后通过时域均衡消除ICI,而无需额外的导频,在改善系统误误码率的同时,提高了频谱的利用率。     

码间干扰的消除研究

在数字信号的基带传输过程中,信息传输速率在满足香农公式的条件下还极大地受到码间干扰的限制。为消除码间干扰,就必须使信息传输速率和系统带宽之间产生确定比例的约束关系,从而使系统的频带利用率也受到限制。运用系统冲激响应过零点消除码间干扰的方法对几种常见的基带系统和部分响应系统进行分析,直接给出其消除码间干扰和获得最大频带利用率的方法,为实际的应用提供一种理论指导。     

无线通信系统的码间干扰抑制方法研究

文中介绍了码间干扰以及消除码间干扰的两种方法，从理论上比较了这两种方法的性能，并搭建仿真系统进行计算机仿真模拟，其仿真结果表明：基带滤波和LMS均衡器能显著消除码间干扰的影响．     

多径信道下OFDM系统中的两种线性载波间干扰抑制技术

载波间干扰(ICI)是影响正交频分复用(OFDM)系统性能的重要因素。该文研究了不同延迟线长度L下的频域RAKE(F-RAKE)和频域均衡(F-FIR)两种线性ICI抑制技术。假设接收端已知信道信息,F-FIR采用最小均方误差(MMSE)准则。结果表明L=3时,F-RAKE比标准接收机的载干比(CIR)高2～5dB,而F-FIR则高出2～7dB;随着L的增加,两种接收机所能获得的CIR增益逐渐降低。从计算复杂度来看,F-FIR的计算量是F-PAKE的L倍,工程中可以通过选取不同延迟线长度和接收机结构来达到计算复杂度和性能的折衷。     

相位分集频移键控光通信系统中码间干扰的研究

本文分析了码间干扰(ISI)对相位分集频移键控(PD-FSK)光通信系统特性的影响,导出了由于ISI引起的系统功率代价的解析表达式,并考虑到典型的系统参数值,分析比较了功率代价与系统参数的关系。     

单载波频域均衡系统帧结构的设计

在高速无线数据传输中,存在严重的多径衰落,造成频率选择性衰落和符号间干扰,影响数据传输质量。单载波频域均衡(Single Carrier Time-Domain Equalization,SC-FDE)是对抗多径衰落的有效途径之一。重点分析了SC-FDE系统的帧结构设计,通过分析对比,找到一种合适的帧结构设计方案,并对其性能进行了仿真。仿真结果表明该帧结构设计方案能够有效抑制噪声的影响,提高信道估计精度,同时不影响系统的带宽利用率。     

离散多频音调制消除码间干扰的方法

在介绍离散多频音调制原理的基础上，阐述了离散多频音系统时域均和衡与循环前缀相结合的消除码间干扰方法，探讨了其中时域均衡器训练算法，并得出相应结果。     

高数据率水声通信研究进展

高数据率水声通信是海洋工程领域的一个重要研究方向,是实现水下信息传输的主要方式之一。首先,阐述了高数据率水声通信的两种主要类型：单载波时域均衡和正交频分复用;然后,给出了两种调制方式的发展现状及其优缺点;随后,介绍了该课题组近十年来在该领域的研究成果,特别是基于单载波频域均衡的高数据率水声通信;最后,对高数据率水声通信的进一步研究方向进行了展望。     

带有循环前缀的单载波通信系统中干扰抵消辅助的频域均衡技术

在单载波通信系统中,循环前缀(简称CP)的存在不仅能减轻由于多径信道造成的传输数据块间信号干扰(简称IBI),而且可以采用频域均衡(简称FDE)技术来补偿由多径信道引起的频率选择性信号衰落.本文主要分析了带有循环前缀的单载波通信系统(简称CP-SC)中广泛应用的基于线性最小均方误差(简称LMMSE)准则的FDE技术中的残余信号间干扰(RISI)问题,提出了一种干扰抵消辅助的LMMSE-FDE接收机结构,它能很好的消除RISI,改善系统性能.     

Intersymbol interference resilient interleaving architecture for multi-stream interleaved frequency division multiple access system

A multi-stream cyclic interleaving architecture for an interleaved frequency division multiple access (IFDMA) system is proposed. The proposed scheme exploits the full benefits of maximal length sequence ( $m$-sequence), in contrast to single data stream transmission scheme proposed in earlier works, thereby allowing simultaneous transmission of multiple data streams by each user. The cyclic spreading allows the separation of multiple data streams for each user in addition to intersymbol interference (ISI) minimization. The assignment of orthogonal subcarriers to each user compensates multiuser interference (MUI). The increase in the number of data stream transmission improves the data rate of the system. The proposed scheme employs maximal ratio combining (MRC) to maximize the instantaneous signal-to-noise ratio (SNR) of the multipath signal. The performances of the proposed interleaving scheme are compared with the minimum mean square error frequency domain equalization (MMSE-FDE)-based conventional interleaving scheme. Despite the simultaneous transmission of multiple data streams, the proposed scheme retains the performance of single data stream transmission.     

无线信道中的单载波频域均衡技术研究

介绍了单载波频域均衡技术的原理,与单载波时域均衡以及多载波OFDM系统进行了比较。该技术结合了两者的优点:能有效对抗多径信道,且具有较低的复杂度;降低了峰均比和对载波频偏、相位噪声的敏感性,因而在无线通信领域具有广阔的应用前景。     

Cyclic Intersymbol Interference of Frequency-Domain Decision-Feedback Equalizer: Effect and Mitigation

This paper investigates an inherent but adverse phenomenon called cyclic intersymbol interference (cyclic ISI) occurred in frequency-domain decision-feedback equalizer (FD-DFE). The cyclic ISI is due to the cyclic-prefix insertion and modulo operation of the time-domain feedback filter. To analyze and further mitigate this problem, we first formulate the FD-DFE signal model in a compact and insightful vector-matrix form, which allows an efficient derivation of the MMSE receiver coefficients. Then, by viewing the bit-error-rate profile (BERP) with respect to different starting symbol position within a symbol block, it is shown that those leading data symbols suffer more from the cyclic-ISI effect and lead to a high error floor. Seeing this, a novel FD-DFE receiver structure, called P2B-FD-DFE (parallel-two-branch FD-DFE) receiver, is proposed to overcome this problem without sacrificing spectral efficiency. It consists of two parallel cooperating branches of almost identical FD-DFE receivers designed for different cyclic decision delays. Under severe cyclic-ISI circumstances, the receiver performance can be further improved by using (1) a larger block size, and/or (2) a cascade of multiple feedback stages. Simulation results demonstrate that, in severe ISI channel, while the conventional FD-DFE exhibits a very high error floor, our proposed receiver can almost completely suppress the cyclic-ISI effect. Rih-Lung Chung was born in Taoyuan, Taiwan R.O.C. He received the B.S. degree and finished the M.S. courses both in electrical engineering from Yuan-Ze University, Taiwan R.O.C., in 1998 and 1999, respectively. Now he is working on his doctoral degree. His research interests include digital communication, statistical signal processing, and channel estimation/equalization, especially for wireless communication system. Jeng-Kuang Hwang was born in Taipei, Taiwan, in 1962. He received the Ph.D. degree in electrical engineering from the National Tsing-Hua University, Hsin-Chu, Taiwan, in 1991. Currently, he is an associate professor with the Communication Engineering Department at Yuan-Ze University, Chung-Li, Taiwan. In 1997, he had been a visiting professor at AT&T Labs/Research, Redbank, NJ, doing researches on smart antennas for wireless communications. He has published over 70 journal and conference papers, and hold one US patent. His current research interests include communication and statistical signal processing, smart antennas, software-defined radios, VLSI signal processing, and power line communications.     

时域自适应均衡技术的分析与应用

概述了频率选择性衰落信道的传输特性,论述了采用均衡技术的必要性。通过对各种均衡器结构和自适应均衡算法在抵抗符号间干扰能力、收敛速度以及运算复杂度等方面的分析与比较,选择了判决反馈作为均衡器结构、最小均方自适应算法作为自适应准则的均衡器方案。仿真及试验结果证实了设计的时域自适应均衡器不仅具有较强的抵抗符号间干扰能力,而且能够获得隐分集增益,在频率选择性衰落信道中具有良好的应用效果。     

联合控制码间串扰和时钟抖动准则的证明和讨论

本文对文献［１］中的传输信号波形设计的联合控制码间串扰和时钟抖动准则进行了研究，给出它的理论证明。利用均方测试准则对几个例子的抗时钟抖动能力进行了讨论，给出了相应的数值分析结果     

短波通信中的低复杂度时域均衡

提出了一种基于Chase算法的低复杂度时域均衡技术.首先通过传统的自适应均衡器获取软值,再利用Chase算法计算可信度找到不可靠位,同时构造测试序列,然后进行滑动窗搜索和逐比特译码.此算法在减小计算量的同时消除了译码时延,并且误码率逼近最大似然序列估计,实现了复杂度和性能的折衷.