High-performance MIM capacitor using ALD high-k HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectrics

For the first time, we successfully fabricated and demonstrated high performance metal-insulator-metal (MIM) capacitors with HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectric using atomic layer deposition (ALD) technique. Our data indicates that the laminate MIM capacitor can provide high capacitance density of 12.8 fF//spl mu/m/sup 2/ from 10 kHz up to 20 GHz, very low leakage current of 3.2 /spl times/ 10/sup -8/ A/cm/sup 2/ at 3.3 V, small linear voltage coefficient of capacitance of 240 ppm/V together with quadratic one of 1830 ppm/V/sup 2/, temperature coefficient of capacitance of 182 ppm//spl deg/C, and high breakdown field of /spl sim/6 MV/cm as well as promising reliability. As a result, the HfO/sub 2/-Al/sub 2/O/sub 3/ laminate is a very promising candidate for next generation MIM capacitor for radio frequency and mixed signal integrated circuit applications.     

Metal-insulator-metal RF bypass capacitor using niobium oxide (Nb/sub 2/O/sub 5/) with HfO/sub 2//Al/sub 2/O/sub 3/ barriers

A high capacitance density (C/sub density/) metal-insulator-metal (MIM) capacitor with niobium pentoxide (Nb/sub 2/O/sub 5/) whose k value is higher than 40, is developed for integrated RF bypass or decoupling capacitor application. Nb/sub 2/O/sub 5/ MIM with HfO/sub 2//Al/sub 2/O/sub 3/ barriers delivers a high C/sub density/ of >17 fF//spl mu/m/sup 2/ with excellent RF properties, while maintaining comparable leakage current and reliability properties with other high-k dielectrics. The capacitance from the dielectric is shown to be stable up to 20 GHz, and resonant frequency of 4.2 GHz and Q of 50 (at 1 GHz) is demonstrated when the capacitor is integrated using Cu-BEOL process.     

RF, DC, and reliability characteristics of ALD HfO/sub 2/-Al/sub 2/O/sub 3/ laminate MIM capacitors for Si RF IC applications

High-performance metal-insulator-metal capacitors using atomic layer-deposited HfO/sub 2/-Al/sub 2/O/sub 3/ laminate are fabricated and characterized for RF and mixed-signal applications. The laminate capacitor can offer high capacitance density (12.8 fF//spl mu/m/sup 2/) up to 20 GHz, low leakage current of 4.9/spl times/10/sup -8/ A/cm/sup 2/ at 2 V and 125/spl deg/C, and small linear voltage coefficient of capacitance of 211 ppm/V at 1 MHz, which can easily satisfy RF capacitor requirements for year 2007 according to the International Technology Roadmap for Semiconductors. In addition, effects of constant voltage stress and temperature on leakage current and voltage linearity are comprehensively investigated, and dependences of quadratic voltage coefficient of capacitance (/spl alpha/) on frequency and thickness are also demonstrated. Meanwhile, the underlying mechanisms are also discussed.     

MIM capacitors using atomic-layer-deposited high-/spl kappa/ (HfO/sub 2/)/sub 1-x/(Al/sub 2/O/sub 3/)/sub x/ dielectrics

Metal-insulator-metal (MIM) capacitors with (HfO/sub 2/)/sub 1-x/(Al/sub 2/O/sub 3/)/sub x/ high-/spl kappa/ dielectric films were investigated for the first time. The results show that both the capacitance density and voltage/temperature coefficients of capacitance (VCC/TCC) values decrease with increasing Al/sub 2/O/sub 3/ mole fraction. It was demonstrated that the (HfO/sub 2/)/sub 1-x/(Al/sub 2/O/sub 3/)/sub x/ MIM capacitor with an Al/sub 2/O/sub 3/ mole fraction of 0.14 is optimized. It provides a high capacitance density (3.5 fF//spl mu/m/sup 2/) and low VCC values (/spl sim/140 ppm/V/sup 2/) at the same time. In addition, small frequency dependence, low loss tangent, and low leakage current are obtained. Also, no electrical degradation was observed for (HfO/sub 2/)/sub 1-x/(Al/sub 2/O/sub 3/)/sub x/ MIM capacitors after N/sub 2/ annealing at 400/spl deg/C. These results show that the (HfO/sub 2/)/sub 0.86/(Al/sub 2/O/sub 3/)/sub 0.14/ MIM capacitor is very suitable for capacitor applications within the thermal budget of the back end of line process.     

Improvement of voltage linearity in high-/spl kappa/ MIM capacitors using HfO/sub 2/-SiO/sub 2/ stacked dielectric

It is demonstrated that the voltage coefficients of capacitance (VCC) in high-/spl kappa/ metal-insulator-metal (MIM) capacitors can be actively engineered and voltage linearity can be significantly improved maintaining high capacitance density, by using a stacked insulator structure of high-/spl kappa/ and SiO/sub 2/ dielectrics. A MIM capacitor with capacitance density of 6 fF/spl mu/m/sup 2/ and quadratic VCC of only 14 ppm/V/sup 2/ has been demonstrated together with excellent frequency and temperature dependence (temperature coefficients of capacitance of 54 ppm /spl deg/C) as well as low leakage current of less than 10 nA/cm/sup 2/ up to 4 V at 125 /spl deg/C.     

A high-density MIM capacitor (13 fF//spl mu/m/sup 2/) using ALD HfO/sub 2/ dielectrics

Metal-insulator-metal (MIM) capacitors with different HfO/sub 2/ thickness have been investigated. The results show that both the capacitance density and voltage coefficients of capacitance (VCCs) increase with decreasing HfO/sub 2/ thickness. In addition, it is found that the VCCs decrease logarithmically with increasing thickness. Furthermore, the MIM capacitor with 10-nm HfO/sub 2/ shows a record high capacitance density of 13 fF//spl mu/m/sup 2/ and a VCC of 607 ppm/V, which can meet the requirement of the International Technology Roadmap for Semiconductors. It can also provide a low leakage current of 5.95 /spl times/ 10/sup -8/A/cm/sup 2/ at room temperature at 1 V, low tangent values below 0.05, and a small frequency dependence. These results indicate that the devices are suitable for use in silicon integrated circuit applications.     

Lanthanide (Tb)-doped HfO/sub 2/ for high-density MIM capacitors

A high-density metal-insulator-metal (MIM) capacitor with a lanthanide-doped HfO/sub 2/ dielectric prepared by physical vapor deposition (PVD) is presented for the first time. A significant improvement was shown in both the voltage coefficient of capacitance (VCC) and the leakage current density of MIM capacitor, yet the high capacitance density of HfO/sub 2/ dielectrics was maintained by achieving the doping of Tb with an optimum concentration in HfO/sub 2/. This technique allows utilizing thinner dielectric film in MIM capacitors and achieving a capacitance density as high as 13.3 fF//spl mu/m/sup 2/ with leakage current and VCC values that fully meet requirements from year 2005 for radio frequency (RF) bypass capacitors applications.     

DRAM plate electrode bias optimization for reducing leakage current in UV-O/sub 3/ and O/sub 2/ annealed CVD deposited Ta/sub 2/O/sub 5/ dielectric films

A new plate biasing scheme is described which allowed the use of 65% higher supply voltage without increasing the leakage current for the UV-O/sub 3/ and O/sub 2/ annealed chemical-vapor-deposited tantalum pentaoxide dielectric film capacitors in stacked DRAM cells. Dielectric leakage was reduced by biasing the capacitor plate electrode to a voltage lower than the conventionally used value of V/sub cc//2. Ta/sub 2/O/sub 5/ films with 3.9 nm effective gate oxide, 8.5 fF//spl mu/m/sup 2/ capacitance and <0.3 /spl mu/A/cm/sup 2/ leakage at 100/spl deg/C and 3.3 V supply are demonstrated.<>     

Very high-density (23 fF//spl mu/m/sup 2/) RF MIM capacitors using high-/spl kappa/ TaTiO as the dielectric

A very high density of 23 fF//spl mu/m/sup 2/ has been measured in RF metal-insulator-metal (MIM) capacitors which use high-/spl kappa/ TaTiO as the dielectric. In addition, the devices show a small reduction of 1.8% in the capacitance, from 100 kHz to 10 GHz. Together with these characteristics the MIM capacitors show low leakage currents and a small voltage-dependence of capacitance at 1 GHz. These TaTiO MIM capacitors should be useful for precision RF circuits.     

Evidence and understanding of ALD HfO/sub 2/-Al/sub 2/O/sub 3/ laminate MIM capacitors outperforming sandwich counterparts

Metal-insulator-metal capacitors with atomic-layer-deposited HfO/sub 2/-Al/sub 2/O/sub 3/ laminated and sandwiched dielectrics have been compared, for the first time, for analog circuit applications. The experimental results indicate that significant improvements can be obtained using the laminated dielectrics, including an extremely low leakage current of 1/spl times/10/sup -9/ A/cm/sup 2/ at 3.3V and 125/spl deg/C, a high breakdown electric field of /spl sim/3.3MV/cm at 125/spl deg/C, good polarity-independent electrical characteristics, while retaining relatively high capacitance density of 3.13 fF//spl mu/m/sup 2/ as well as voltage coefficients of capacitance as low as -80 ppm/V and 100 ppm/V/sup 2/ at 100 kHz. The underlying mechanism is likely due to alternate insertions of Al/sub 2/O/sub 3/ layers that reduce the thickness of each HfO/sub 2/ layer, hereby efficiently inhibiting HfO/sub 2/ crystallization, and blocking extensions of grain boundary channels from top to bottom as well as to achieve good interfacial quality.     

PVD HfO/sub 2/ for high-precision MIM capacitor applications

Metal-insulator-metal (MIM) capacitors are fabricated using sputtered HfO/sub 2/ with Ta and TaN for top and bottom electrodes, respectively. High-capacitance densities from 4.7 to 8.1 fF//spl mu/m/sup 2/ have been achieved while maintaining the leakage current densities around 1 /spl times/ 10/sup -8/ A/cm/sup 2/ within the normal circuit bias conditions. A guideline for the insulator thickness and its dielectric constant has been obtained by analyzing the tradeoff between the linearity coefficient and the capacitance density.     

Integrated high-/spl kappa/ (/spl kappa/ /spl sim/19) MIM capacitor with Cu/low-/spl kappa/ interconnects for RF application

We demonstrate a high-performance metal-high /spl kappa/ insulator-metal (MIM) capacitor integrated with a Cu/low-/spl kappa/ backend interconnection. The high-/spl kappa/ used was laminated HfO/sub 2/-Al/sub 2/O/sub 3/ with effective /spl kappa/ /spl sim/19 and the low-/spl kappa/ dielectric used was Black Diamond with /spl kappa/ /spl sim/2.9. The MIM capacitor (/spl sim/13.4 fF//spl mu/m/sup 2/) achieved a Q-factor /spl sim/53 at 2.5 GHz and 11.7 pF. The resonant frequency f/sub r/ was 21% higher in comparison to an equivalently integrated Si/sub 3/N/sub 4/-MIM capacitor (/spl sim/0.93 fF//spl mu/m/sup 2/) having similar capacitance 11.2 pF. The impacts of high-/spl kappa/ insulator and low-/spl kappa/ interconnect dielectric on the mechanism for resonant frequency improvement are distinguished using equivalent circuit analysis. This letter suggests that integrated high-/spl kappa/ MIM could be a promising alternative capacitor structure for future high-performance RF applications.     

High-density MIM capacitors using AlTaO/sub x/ dielectrics

The authors have obtained good MIM capacitor integrity of high-capacitance density of 10 fF//spl mu/m/sup 2/ using high-/spl kappa/ AlTaO/sub x/ fabricated at 400/spl deg/C. In addition, small voltage dependence of capacitance of <600 ppm (quadratic voltage coefficient of only 130 ppm/V/sup 2/) is obtained at 1 GHz using their mathematical derivation from measured high-frequency S parameters. These good results ensure the high-/spl kappa/ AlTaO/sub x/ MIM capacitor technology is useful for high-precision circuits operated at the RF frequency regime.     

Low-frequency noise in submicrometer MOSFETs with HfO/sub 2/, HfO/sub 2//Al/sub 2/O/sub 3/ and HfAlO/sub x/ gate stacks

Low-frequency noise measurements were performed on p- and n-channel MOSFETs with HfO/sub 2/, HfAlO/sub x/ and HfO/sub 2//Al/sub 2/O/sub 3/ as the gate dielectric materials. The gate length varied from 0.135 to 0.36 /spl mu/m with 10.02 /spl mu/m gate width. The equivalent oxide thicknesses were: HfO/sub 2/ 23 /spl Aring/, HfAlO/sub x/ 28.5 /spl Aring/ and HfO/sub 2//Al/sub 2/O/sub 3/ 33 /spl Aring/. In addition to the core structures with only about 10 /spl Aring/ of oxide between the high-/spl kappa/ dielectric and silicon substrate, there were "double-gate oxide" structures where an interfacial oxide layer of 40 /spl Aring/ was grown between the high-/spl kappa/ dielectric and Si. DC analysis showed low gate leakage currents in the order of 10/sup -12/A(2-5/spl times/10/sup -5/ A/cm/sup 2/) for the devices and, in general, yielded higher threshold voltages and lower mobility values when compared to the corresponding SiO/sub 2/ devices. The unified number-mobility fluctuation model was used to account for the observed 1/f noise and to extract the oxide trap density, which ranged from 1.8/spl times/10/sup 17/ cm/sup -3/eV/sup -1/ to 1.3/spl times/10/sup 19/ cm/sup -3/eV/sup -1/, somewhat higher compared to conventional SiO/sub 2/ MOSFETs with the similar device dimensions. There was no evidence of single electron switching events or random telegraph signals. The aim of this paper is to present a general discussion on low-frequency noise characteristics of the three different high-/spl kappa//gate stacks, relative comparison among them and to the Si--SiO/sub 2/ system.     

Low-frequency noise in submicrometer MOSFETs with HfO/sub 2/, HfO/sub 2//Al/sub 2/O/sub 3/ and HfAlO/sub x/ gate stacks

Low-frequency noise measurements were performed on p- and n-channel MOSFETs with HfO/sub 2/, HfAlO/sub x/ and HfO/sub 2//Al/sub 2/O/sub 3/ as the gate dielectric materials. The gate length varied from 0.135 to 0.36 /spl mu/m with 10.02 /spl mu/m gate width. The equivalent oxide thicknesses were: HfO/sub 2/ 23 /spl Aring/, HfAlO/sub x/ 28.5 /spl Aring/ and HfO/sub 2//Al/sub 2/O/sub 3/ 33 /spl Aring/. In addition to the core structures with only about 10 /spl Aring/ of oxide between the high-K dielectric and silicon substrate, there were "double-gate oxide" structures where an interfacial oxide layer of 40 /spl Aring/ was grown between the high-K dielectric and Si. DC analysis showed low gate leakage currents in the order of 10/sup -12/ A(2-5 /spl times/ 10/sup -5/ A/cm/sup 2/) for the devices and, in general, yielded higher threshold voltages and lower mobility values when compared to the corresponding SiO/sub 2/ devices. The unified number-mobility fluctuation model was used to account for the observed 1/f noise and to extract the oxide trap density, which ranged from 1.8 /spl times/ 10/sup 17/ cm/sup -3/ eV/sup -1/ to 1, 3 /spl times/ 10/sup 19/ cm/sup -3/ eV/sup -1/ somewhat higher compared to conventional SiO/sub 2/ MOSFETs with the similar device dimensions. There was no evidence of single electron switching events or random telegraph signals. The aim of this paper is to present a general discussion on low-frequency noise characteristics of the three different high-K/gate stacks, relative comparison among them and to the Si-SiO/sub 2/ system.     

Long-wavelength In/sub 0.53/Ga/sub 0.47/As-In/sub 0.52/Al/sub 0.48/As large-area avalanche photodiodes and arrays

Large-area (500-/spl mu/m diameter) mesa-structure In/sub 0.53/Ga/sub 0.47/As-In/sub 0.52/Al/sub 0.48/As avalanche photodiodes (APDs) are reported. The dark current density was /spl sim/2.5/spl times/10/sup -2/ nA//spl mu/m/sup 2/ at 90% of breakdown; low surface leakage current density (/spl sim/4.2 pA//spl mu/m) was achieved with wet chemical etching and SiO/sub 2/ passivation. An 18 /spl times/ 18 APD array with uniform distributions of breakdown voltage, dark current, and multiplication gain has also been demonstrated. The APDs in the array achieved 3-dB bandwidth of /spl sim/8 GHz at low gain and a gain-bandwidth product of /spl sim/120 GHz.     

Fully silicided NiSi gate on La/sub 2/O/sub 3/ MOSFETs

We have fabricated the fully silicided NiSi on La/sub 2/O/sub 3/ for n- and p-MOSFETs. For 900/spl deg/C fully silicided CoSi/sub 2/ on La/sub 2/O/sub 3/ gate dielectric with 1.5 nm EOT, the gate dielectric has large leakage current by possible excess Co diffusion at high silicidation temperature. In sharp contrast, very low gate leakage current density of 2/spl times/10/sup -4/ A/cm/sup 2/ at 1 V is measured for 400/spl deg/C formed fully silicided NiSi and comparable with Al gate. The extracted work function of NiSi was 4.42 eV, and the corresponding threshold voltages are 0.12 and -0.70 V for respective n- and p-MOSFETs. Electron and hole mobilities of 156 and 44 cm/sup 2//V-s are obtained for respective n- and p-MOSFETs, which are comparable with the HfO/sub 2/ MOSFETs without using H/sub 2/ annealing.     

A novel program-erasable high-/spl kappa/ AlN-Si MIS capacitor

We demonstrate a programmable-erasable MIS capacitor with a single layer high-/spl kappa/ AlN dielectric on Si having a high capacitance density of /spl sim/5 fF//spl mu/m/sup 2/. It has low program and erase voltages of +4 and -4 V, respectively. Such an erase function is not available in other single layer Al/sub 2/O/sub 3/, AlON, or other known high-/spl kappa/ dielectric capacitors, where the threshold voltage (V/sub th/) shifts continuously with voltage. This device exhibits good data retention with a V/sub th/ change of only 0.06 V after 10 000 s.     

A 160-GHz f/sub T/ and 140-GHz f/sub MAX/ submicrometer InP DHBT in MBE regrown-emitter technology

We report a 0.7/spl times/8 /spl mu/m/sup 2/ InAlAs-InGaAs-InP double heterojunction bipolar transistor, fabricated in a molecular-beam epitaxy (MBE) regrown-emitter technology, exhibiting 160 GHz f/sub T/ and 140 GHz f/sub MAX/. These initial results are the first known RF results for a nonselective regrown-emitter heterojunction bipolar transistor, and the fastest ever reported using a regrown base-emitter heterojunction. The maximum current density is J/sub E/=8/spl times/10/sup 5/ A/cm/sup 2/ and the collector breakdown voltage V/sub CEO/ is 6 V for a 1500-/spl Aring/ collector. In this technology, the dimension of base-emitter junction has been scaled to an area as low as 0.3/spl times/4 /spl mu/m/sup 2/ while a larger-area extrinsic emitter maintains lower emitter access resistance. Furthermore, the application of a refractory metal (Ti-W) base contact beneath the extrinsic emitter regrowth achieves a fully self-aligned device topology.     

Electrical characteristics of 8-/spl Aring/ EOT HfO/sub 2//TaN low thermal-budget n-channel FETs with solid-phase epitaxially regrown junctions

The authors demonstrate high-performing n-channel transistors with a HfO/sub 2//TaN gate stack and a low thermal-budget process using solid-phase epitaxial regrowth of the source and drain junctions. The thinnest devices have an equivalent oxide thickness (EOT) of 8 /spl Aring/, a leakage current of 1.5 A/cm/sup 2/ at V/sub G/=1 V, a peak mobility of 190 cm/sup 2//V/spl middot/s, and a drive-current of 815 /spl mu/A//spl mu/m at an off-state current of 0.1 /spl mu/A//spl mu/m for V/sub DD/=1.2 V. Identical gate stacks processed with a 1000-/spl deg/C spike anneal have a higher peak mobility at 275 cm/sup 2//V/spl middot/s, but a 5-/spl Aring/ higher EOT and a reduced drive current at 610 /spl mu/A//spl mu/m. The observed performance improvement for the low thermal-budget devices is shown to be mostly related to the lower EOT. The time-to-breakdown measurements indicate a maximum operating voltage of 1.6 V (1.2 V at 125 /spl deg/C) for a ten-year lifetime, whereas positive-bias temperature-instability measurements indicate a sufficient lifetime for operating voltages below 0.75 V.