Effects of low-temperature ozone annealing on operation characteristics of amorphous In-Ga-Zn-O thin-film transistors

Effects of low-temperature annealing were examined for amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs). In a previous study, we reported that O₂ annealing is effective to improve performances of a-IGZO TFTs when annealed at ≥ 300 °C, but causes large negative threshold voltage shift when annealed at ≤ 200 °C. Here, we examined effects of ozone (O₃) annealing on physical properties and TFT characteristics of a-IGZO in comparison with conventional O₂ annealing. We found little differences in chemical composition, band gap and photoemission spectra between the O₂ and the O₃ annealed films. On the other hand, free electron density was suppressed well by the O₃ annealing even at low temperatures ≤ 200 °C. Moreover, even at 150 °C, the TFTs characteristics were improved to the subthreshold voltage swing of 217 mV/decade, the saturation mobility of ~ 11.4 cm²(Vs)^− 1 and the threshold voltage of 0.1 V by the O₃ annealing. It was also found that the effects of the O₃ annealing is more effective for thicker channel TFTs, which would be due to stronger oxidation power and the larger diffusion constant of oxygen atoms produced from O₃ molecules than those of O₂. These results substantiate that the O₃ annealing is more effective to improve TFT characteristics in particular for low-temperature processes at ≤ 200 °C.     

Comprehensive studies on the stabilities of a-In-Ga-Zn-O based thin film transistor by constant current stress

Stability under constant current stress, along with hysteresis characteristics, was studied for a-In-Ga-Zn-O thin-film transistors (TFTs) in several atmospheres and at several temperatures. Unannealed TFTs showed rather large instability; i.e., large hysteresis in transfer curves (ΔV_G > 0.8 V) and large positive threshold voltage shift (ΔV_th > 10 V for 50 h tests at 5 µA) with deterioration of subthreshold voltage swing was observed. The instability for the unannealed TFT had a strong dependence on the stress atmosphere and the stress temperature, which suggests that trap states generated by the stress test is related to oxygen vacancy formed by breaking weak chemical bonds. Wet annealing improved stability; the hysteresis disappeared and the ΔV_th was reduced to < 2 V. The improvement is considered to be related to the reduction of weak chemical bonds by wet annealing with the strong oxidation power of water molecules.     

Transparent, high mobility InGaZnO thin films deposited by PLD

Transparent oxide semiconductor, InGaZnO, thin films were prepared by pulsed laser deposition at room temperature. The carrier concentration was found to vary by several orders of magnitude from insulating to 10¹⁹ carriers/cm³ depending on the oxygen partial pressure during deposition. Hall mobilities as high as 16 cm²/V s were observed. This is approximately an order of magnitude higher than the mobility of amorphous silicon and indicates that InGaO₃(ZnO)_x with x ≤ 5 may be suitable for transparent, thin film transistor applications. Post-deposition annealing was found to strongly influence the carrier concentration while annealing effects on the electron mobility was less influential.     

Formation of microcrystalline silicon films using rapid crystal aluminum induced crystallization under low-temperature rapid thermal annealing

The process of obtaining thin film solar cells using the method of aluminum-induced crystallization under rapid thermal annealing (RTA) was investigated. 200-nm-thick amorphous Si (a-Si) film was deposited on a glass substrate using an ultra-high vacuum ion beam sputtering system. A 50-nm-thick crystal aluminum layer was then evaporated and deposited onto the a-Si film. In contrast to conventional furnace annealing, RTA can supply rapid thermal energy so that a-Si can be induced into microcrystalline-Si (μc-Si) in a short time at low temperatures. The crystal Al may promote the crystallization reaction because its surface energy is higher than 0.89 N/m, which is the minimum energy required to produce the (111) orientation. Free Si atoms are induced at the interface of the Al and Si sub-layers by the diffusion of Al along the grain boundaries. The Raman spectrum shows that the sample could be induced to crystallize at 350 °C. After the aluminum was etched, the maximum grain size was 4 μm. The carrier mobility was between 6.2 cm²/Vs and 18.8 cm²/Vs. The proposed method can be used to obtain μc-Si with reduced energy and time during the thermal annealing.     

Comparative analysis of temperature thermally induced instability between Si-In-Zn-O and Ga-In-Zn-O thin film transistors

Thermally induced instability of amorphous Si-In-Zn-O (SIZO) with 1 wt.% silicon (Si) concentration and Ga-In-Zn-O (GIZO) with gallium (Ga) of 30 wt.% thin film transistors (TFTs) has been investigated, by comparing the density of states extracted from multi-frequency method. It was observed that the density of state of SIZO-TFT was lower than that of GIZO-TFT, in spite of low processing temperature of SIZO-TFT and thermally induced instability of SIZO- and GIZO-TFT was strongly related with the total trap density. We report that Si of only 1 wt.% in SIZO can improve thermal stability of threshold voltage of In-Zn-O based TFTs more effectively than Ga of 30 wt.% in GIZO.     

The effect of annealing on amorphous indium gallium zinc oxide thin film transistors

This paper presents the post-annealing effects, caused by rapid thermal annealing (RTA), on amorphous indium gallium zinc oxide (a-IGZO) thin film transistor's (TFT) electrical characteristics, and its contact resistance (R_C) with thermally grown SiO₂ gate dielectric on silicon wafer substrates. The electrical characteristics of two types of TFTs, one post-annealed and the other not, are compared, and a simple model of the source and drain contacts is applied to estimate the R_C by a transmission line method (TLM). Consequently, it has been found that the post-annealing does improve the TFT performances; in other words, the saturation mobility (μ_sat), the on/off current ratio (I_ON/OFF), and the drain current (I_D) all increase, and the R_C and the threshold voltage (V_T) both decrease. As-fabricated TFTs have the following electrical characteristics; a saturation mobility (μ_sat) as large as 0.027 cm²/V s, I_ON/OFF of 10³, sub-threshold swing (SS) of 0.49 V/decade, V_T of 32.51 V, and R_C of 969 MΩ, and the annealed TFTs have improved electrical characteristics as follows; a μ_sat of 3.51 cm²/V s, I_ON/OFF of 10⁵, SS of 0.57 V/decade, V_T of 27.2 V, and R_C of 847 kΩ.     

Transparent amorphous In-Ga-Zn-O thin film as function of various gas flows for TFT applications

The electrical and optical properties of amorphous indium gallium zinc oxide (a-IGZO) films, which can be used as a channel layer, deposited by radio frequency (rf) magnetron sputtering system at room temperature (RT), were investigated as function of various gas flows. The optical transmittance of films deposited under Ar, O₂ / Ar + O₂ and O₂ / Ar-4% H₂ + O₂ atmospheres in the visible wavelength was consistently above 90% at a wavelength of 550 nm at all gas flows, although the film deposited under Ar-4% H₂ atmosphere exhibited a transmittance of below 50%. The carrier concentration and mobility of the a-IGZO films fabricated under Ar and Ar-4% H₂ were observed slight decrease as a function of the flow, respectively. The thin film transistors (TFTs) with an a-IGZO channel deposited under Ar and Ar-4% H₂ atmosphere exhibited the following good characteristics: V_th of 0.34 V, µ_FE of 3.6 cm² V^− 1 s^− 1, on/off ratio of 10⁶, and S value of 0.04 V decade^− 1.     

The effect of thermal annealing sequence on amorphous InGaZnO thin film transistor with a plasma-treated source–drain structure

In this paper, the effects of thermal annealing and the plasma treatment sequence on the performance of amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) without conventional source/drain (S/D) layer deposition were investigated. We fabricated TFTs using two different processes, one where S/Ds were plasma-treated after thermal annealing, the second where the S/Ds were plasma-treated before annealing. The performance of the former exhibited a linear mobility of 4.97 cm²/V s, an on/off ratio of 4.6 × 10⁶, a V_th of 2.56 V, and a subthreshold slope of 0.65 V/decade. However, the TFT parameters of the latter sample were reduced to a linear mobility of 0.07 cm²/V s, an on/off ratio of 1.5 × 10⁵, a V_th of 2.33 V, and a subthreshold slope of 3.54 V/decade. It was shown that the sheet resistance of plasma-treated S/D areas increased after thermal annealing by about three orders of magnitude. As a result, the increase of the sheet resistance caused a decrease of TFT performance.     

Large-grain polycrystalline silicon thin films obtained by low-temperature stepwise annealing of hydrogenated amorphous silicon

Large grained polycrystalline silicon thin films have been prepared by low-temperature solid phase crystallisation of sputter-deposited hydrogenated amorphous silicon (a-Si:H), with relatively short processing times, and a considerably low thermal budget. Various a-Si:H samples, deposited under different conditions and with varying hydrogen concentrations and hydrogen bonding configurations, were simultaneously annealed. Only a particular set of deposition conditions led to crystallisation. The a-Si:H thin film which was successfully crystallised was prepared in an argon-hydrogen mixture, in which the last few minutes of film deposition occurred in a hydrogen-rich atmosphere. For that film, the hydrogen concentration profile resulted in a much higher hydrogen content on the sample surface than in the bulk, and H-Si bonds were predominantly of the weak type. Crystallisation was accomplished by low-temperature stepwise annealing from 200°C to 600°C at 100°C steps, with samples being cooled down to room-temperature between each annealing step. This resulted in large grained (> 10 μm range) polycrystalline silicon after the 600°C annealing step for a 1.1 μm thick sample. Fourier transform infrared (FTIR) spectroscopy, elastic recoil detection analysis (ERDA) and scanning electron microscopy (SEM) techniques were used to analyse samples before and after crystallisation.     

Effect of annealing temperature on the properties of IZO films and IZO based transparent TFTs

This work shows the effect of the annealing temperature and atmosphere on the properties of r.f. magnetron sputtered indium-zinc oxide (IZO) thin-films of two types: one a conductive film (as-deposited, room temperature) that exhibits a resistivity of 3.5 × 10^− 4 Ω cm; the other, a semiconductor film with a resistivity ∼ 10² Ω cm. The annealing temperatures were changed between 125 and 500 °C. Crystallization of the more conductive films was already noticeable at temperatures around 400 °C. Three different annealing atmospheres were used — vacuum, air and oxygen. For the conductive films, only the oxygen atmosphere was critical, leading to an increase of the electrical resistivity of more than one order of magnitude, for temperatures of 250 °C and above. Concerning the semiconductor films, both temperature and atmosphere had a strong effect on the film's properties, and the resistivity of the annealed films was always considerably smaller than the as-deposited films. Finally, some results of the application of these films to transparent TFTs are shown.     

The influence of fabrication process on top-gate thin-film transistors

Amorphous indium zinc oxide (a-IZO) thin-film transistors (TFTs) with bottom- and top-gate structures were fabricated at room temperature by direct current (DC) magnetron sputter in this research. High dielectric constant (κ) hafnium oxide (HfO₂) films and a-IZO were deposited for the gate insulator and the semiconducting channel under a mixture of ambient argon and oxygen gas, respectively. The bottom-gate TFTs showed good TFT characteristics, but the top-gate TFTs did not display the same characteristics as the bottom-gate TFTs despite undergoing the same process of sputtering with identical conditions. The electrical characteristics of the top-gate a-IZO TFTs exhibited strong relationships with sputtering power as gate dielectric layer deposition in this study. The ion bombardment and incorporation of sputtering ions damaged the interface between the active layer and the gate insulator in top-gate TFTs. Hence, the sputtering power was reduced to decrease damage while depositing HfO₂ films. When using 50 W DC magnetron sputtering, the top-gate a-IZO TFTs showed the following results: a saturation mobility of 5.62 cm²/V-s; an on/off current ratio of 1 × 10⁵; a sub-threshold swing (SS) of 0.64 V/decade; and a threshold voltage (V_th) of 2.86 V.     

Effect of oxygen partial pressure on electrical characteristics of amorphous indium gallium zinc oxide thin-film transistors fabricated by thermal annealing

We report the fabrication and electrical characteristics of high-performance amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) with a polymer gate dielectric prepared by spin coating on a glass substrate at different oxygen partial pressure values. The transmittance of the deposited polymer film was greater than 90% at 600 nm a-IGZO thin films were deposited on glass substrates using RF magnetron sputtering at different oxygen partial pressure values. The a-IGZO TFTs were prepared by rapid thermal annealing at 350 °C for 10 min at a 0.2% oxygen partial pressure. It was observed that a-IGZO TFTs with an active channel layer exhibited enhanced mode operation, a threshold voltage of 1 V, an on-off current ratio of 10³, and a field-effect mobility of 18 cm²/Vs.     

Degradation characteristics and light-induced effects of polymer thin-film transistors

Polymer thin-film transistors based on poly(2-methoxy-5-(2'-ethyl-hexyloxy)-1,4-phenylene vinylene) have been fabricated by spin-coating process and characterized. The electrical characteristics of the devices stored in dry air show obvious degradation with a smaller mobility due to oxygen effect, and lower threshold voltage. The devices present good optical response in low-light condition and optically induced memory effects, demonstrating their use as promising smart light-detection devices. Moreover, solution preparation, deposition and device measurements have been all performed in the air for the purpose of large-area applications.     

P型SnO TFTs制备及其电学性能研究

采用直流磁控溅射结合光刻工艺,在室温下制备了p型SnO薄膜及薄膜晶体管器件。研究了直流磁控制备过程中的关键工艺问题。研究发现预溅射5 min、氧气比例为13%、生长压强为0.96 Pa、200℃退火1.5 h可制备高开关比的p型SnO薄膜晶体管。器件开关比可达到6.2×10³,亚阈值摆幅为9.96 V·dec^-1。通过延长退火时间至2 h,可以大幅提高线性区迁移率至1.61 cm²·V^-1·S^-1,且亚阈值摆幅仅增大了0.54 V·dec^-1。通过延长预溅射时间至8 min,可以大幅提高p型SnO薄膜晶体管的载流子迁移率,器件线性区迁移率为5.25 cm²·V^-1·S^-1,饱和区迁移率为0.43 cm²·V^-1·S^-1。     

铁基非晶合金退火脆化与防脆技术

综述了铁基非晶合金退火脆化的影响因素，分析了各种防止退火脆化的方法，认为在电脉冲快速加热的同时外加磁场退火，则是改善铁基非晶合金磁性能、防止其退火脆化的一种较好的方法。     

Steady-state photoconductivity of amorphous In-Ga-Zn-O

Photoresponse was investigated for an amorphous oxide semiconductor, In-Ga-Zn-O, by the steady-state photoconductivity (SSPC) method. All the films exhibited extremely slow reversible photoresponses. Analysis of the transient photocurrent at varied temperatures provided similar activation energies of ~ 0.5 eV for both the time constants and the photoconductivity. Mobility-lifetime (μτ) products were estimated from the photoconductivity spectra measured at the sweep rate of 2 nm/s, which monotonically increased with increasing dark conductivity σ_D (i.e. the Fermi level E_F becomes shallower). The obtained μτ values are larger than those of hydrogenated amorphous silicon even if the E_F dependence is considered.     

A gradual annealing of amorphous sputtered indium tin oxide: Crystalline structure and electrical characteristics

Thin films of amorphous indium tin oxide were deposited by soft sputtering. The film was gradually annealed in air at temperatures from 110 °C to 150 °C. Its structural and electrical properties were monitored in order to get a better understanding of the annealing process. Firstly, carrier density decreases by oxygen intake. Crystallization speeds up at 150 °C, with a 2.5 D growth of crystallites. The preferred orientations come from sputtering induced seeds. Then, the carrier density increases again due to tin activation. Meanwhile, the carrier mobility is more damaged by the low temperature annealing in air than by a standard annealing in a reducing atmosphere. Thus, tin oxide segregation is suspected at grain boundaries.     

Temperature-dependent memory characteristics of silicon-oxide-nitride-oxide-silicon thin-film-transistors

This study investigates the temperature-dependent memory characteristics of polycrystalline silicon thin-film transistors with oxide/nitride/oxide stack gate dielectrics and N⁺ poly-Si gate structures for nonvolatile memory application. As the device was programmed by Fowler-Nordheim tunneling at high temperature, some electrons captured in shallow traps could obtain enough thermal energy to de-trap to the gate, resulting in low programming efficiency. As the programming time increases, the hole injection through the blocking oxide from the gate would further lead the threshold voltage to decrease. In addition, the retention characteristic of the device programmed at higher temperature exhibits better charge storage ability. Because the electrons trapped in the shallow traps of the nitride layer can be easily de-trapped when temperature rises, the memory characteristics are mainly dominated by charges stored in the deep traps.     

Epitaxial growth of strained Si1−yCy films by the hot-wire cell method and its application to metal oxide semiconductor devices

We succeeded in obtaining strained Si_1−yC_y films at a substrate temperature of 200 °C by the hot-wire cell method. The substitutional carbon concentration in films annealed at 700 °C was 0.9%, while it was limited to 0.13% for a sample grown by gas-source molecular beam epitaxy (MBE) at a substrate temperature of 700 °C. We investigated the thermal stability of strained Si_1−yC_y films for device application. Annealing at over 900 °C caused the formation of 3C-SiC and relaxation of the strain occurred. From this result, we found that the process temperature should be lower than 800 °C. A low-temperature MOSFET process, in which all process temperatures after deposition of Si_1−yC_y were lower than 800 °C, was developed and a strained Si_1−yC_y MOSFET was fabricated.     

An amorphous oxide semiconductor thin-film transistor route to oxide electronics

Amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) invented only one decade ago are now being commercialized for active-matrix liquid crystal display (AMLCD) backplane applications. They also appear to be well positioned for other flat-panel display applications such as active-matrix organic light-emitting diode (AMOLED) applications, electrophoretic displays, and transparent displays. The objectives of this contribution are to overview AOS materials design; assess indium gallium zinc oxide (IGZO) TFTs for AMLCD and AMOLED applications; identify several technical topics meriting future scrutiny before they can be confidently relied upon as providing a solid scientific foundation for underpinning AOS TFT technology; and briefly speculate on the future of AOS TFTs for display and non-display applications.