共查询到20条相似文献,搜索用时 0 毫秒
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《Solid-State Circuits, IEEE Journal of》1986,21(5):713-719
Defect-tolerant techniques based on memory-cell duplication with address dispersion, fail-safe operation, and defect-tolerable combination decoding were developed to improve the fabrication yield of a large-chip-size mask-programmable read-only memory (ROM). These techniques have features of automatic inspection, detection, and selection. A multigate transistor ROM (MUGROM) cell and a high-sensitivity charge-transfer sense amplifier appropriate to this MUGROM have been developed which achieve high packing density and low power dissipation. Using these techniques and n-well CMOS technology, a 4-Mb ROM with an internal I/O port on a 34/spl times/21-mm/SUP 2/ size chip has been realized. It enables the ROM to be connected to the microprocessor data bus without peripheral interface LSI. The I/O port was designed to have two READ modes: a block data access mode for reading continuous data up to 1-kbit with fast cycle time, and a random access mode. Operating under a 1-MHz block data READ cycle, the device has a typical power dissipation of 20 mW with an access time of 7 /spl mu/s. 相似文献
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The transfer function of an injection-type transistor is derived for arbitrary driving conditions as well as signal level. The derivation is based on the generalised charge-control approach to nonparametric devices advanced previously by the author. 相似文献
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The heat transport from a chip due to conduction and interphase heat transfer from the chip to the surrounding air are investigated. Experiments with thin diaphragms of silicon nitride, which can be heated by a thin-film resistor, were performed. The heat losses of the devices were measured in vacuum and in air. The influence of temperature, geometry, and heat sinks was investigated. Heat transfer is described by the transfer coefficient, which is a function of the temperature and the size of the chip. The calculated heat losses are in good agreement with the experimental values 相似文献
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We report demonstration of the first field effect real space transfer transistor (FERST), a gated real space carrier transfer device. It is a dual output, multifunctional device which, depending on region of operation, demonstrates either of three characteristics: traditional FET transconductance, sign reversing transconductance, or dual output with near complimentary transconductances. Additionally, the FERST structure provides a new means for exploring the physics of real space transfer 相似文献
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Saito Y. Shimazu Y. Shimizu T. Shirai K. Fujioka I. Nishiwaki Y. Hinata J. Shimotsuma Y. Sakao M. 《Solid-State Circuits, IEEE Journal of》1993,28(11):1071-1077
A 1.71-million transistor CISC CPU chip for the business computer has been developed. The chip is implemented in a 0.8-μm CMOS double-polysilicon double-metal technology. The 16.3-mm×12.7-mm device contains a 16-kilobyte cache and 192 entries TLB and operates at 40 MHz. The sustained high performance in a complexed instruction set has been realized by a large horizontal microprogram that controls two 32-b ALU's. The cache and TLB employ a 77-μm2 SRAM using load resistors formed by the second polysilicon; these are accessed in one-half clock cycle and are tested at an 8 bytes per clock rate utilizing a new test strategy 相似文献
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《Electron Devices, IEEE Transactions on》1984,31(6):832-839
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RISC阵营多年来已经成为嵌入式系统的生力军。但在近一年多来我们却发现,在PC领域十分活跃的芯片解决方案供应商,诸如Intel、AMD和威盛等,也开始将目光投向嵌入式系统开发领域。 相似文献
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All electronics generate heat. No device operates at 100% efficiency. The energy lost within a circuit dissipates as heat. That heat is the difference between the input and output power. The author suggests that the design for cooling is too often delayed in a project until too late. The resulting fixes or solutions are usually far from optimal, and they typically delay completion of the instrument. In this column, he discusses some of the concepts involved in cooling equipment. At the end of the column, he presents several case studies for cooling instruments 相似文献
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《Electron Devices, IEEE Transactions on》1986,33(10):1545-1555
Errors induced by turn-off transients are one fundamental limit in precision switched capacitor circuits. This paper presents detailed pass transistor turn-off transient analysis. Conventional single-lump models which assume quasi-static operation can introduce substantial errors for high-speed analog applications. New distributed and two-lump models have been constructed to analyze pass transistor turn-off transients in the diffusion mode of operation. A pass transistor test chip including a new selectively doped pass transistor approach has been designed, fabricated, and tested to verify the transient analysis. Measured performance of the nonuniformly doped pass transistors shows advantages in reducing transient charge errors. 相似文献
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In this paper an improved mathematical model for the current–voltage characteristics of the single-electron-transistor (SET)
is presented. The model, basically, a Fourier-cosine series, can be used for predicting the performance of the SET when the
input is formed of a multisinusoidal signal. Two special cases are considered in detail; the homodyne detector and the heterodyne
mixer. The results show that for the homodyne detector the DC drain current exhibits a maximum at a particular value of the
input amplitude. This maximum shows a strong dependence on the drain-to-source voltage and less dependence on the temperature.
For the heterodyne mixer, the results show that the drain-to-source intermediate-frequency (IF) current exhibits a maximum
and a minimum for any scenario of the drain-to-source voltage and the temperature. The value of the input voltages amplitude
at which these maxima and minima occur is strongly dependent on the drain-to-source voltage and less dependent of the temperature. 相似文献
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Mastrapasqua M. Luryi S. Capasso F. Hutchinson A.L. Sivco D.L. Cho A.Y. 《Electron Devices, IEEE Transactions on》1993,40(2):250-258
The charge injection transistor is implemented in InGaAs/InAlAs/InGaAs heterostructure material, grown by molecular beam epitaxy. A complementary collector of p-type conductivity is used for the first time. The real-space transfer of hot electrons leads to a luminescence signal proportional to the injection current. The radiative efficiency is significantly enhanced by a double-heterostructure design of the collector active region, which confines the injected minority carriers. The internal quantum efficiency of the light-emitting transistor is comparable to that of light-emitting diodes. Due to peculiar symmetry of real-space transfer, the optical output signal follows an exclusive-OR function of input voltages. Functional logic operation of the device is demonstrated at room temperature 相似文献
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Heat transfer in power transistors 总被引:2,自引:0,他引:2
《Electron Devices, IEEE Transactions on》1963,10(5):308-313
The internal heat transfer problem for a typical power-transistor structure has been solved analytically. The relations among current distribution, heat generation and temperature distribution have been derived. Usage of the resulting equations is illustrated by application to the most elementary problem, namely, uniform heat generation under the emitter. 相似文献
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A high-throughput on-chip transistor characterisation macro that can be used to efficiently and accurately characterise large, dense arrays of transistors for variability studies is designed. The prototype macro is used to perform current-voltage characterisation of a 2.8 mm2, 1600- transistor array with digital interfaces. 相似文献
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《Solid-State Circuits, IEEE Journal of》1969,4(3):174-175
Describes the development and verification of a mathematical model, including topology, defining equations, measurement techniques, and methods for extracting parameters which approximates the electrical characteristics of a unijunction transistor. The model is compatible with, and is designed to be used in, general computer circuit analysis programs. 相似文献
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Results for the response of a realistic class-C transistor microwave power amplifier to a mismatched load at various phase angles have been obtained by a fully nonlinear computer analysis, incorporating a modified Ebers?Moll transistor model. 相似文献
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The effect of modulation of the effective width of a narrow-channel MOST by the gate voltage is demonstrated using a two-dimensional integral MOS process and device similator. The realistic shapes of the `bird's beak? and doping concentrations allow a numerical analysis of this effect to be made for typical enhancement- and depletion-mode devices, as well as a comparison with the experiment. 相似文献