Development of smart sensors system for machine fault diagnosis

Machine fault diagnosis is a traditional maintenance problem. In the past, the maintenance using tradition sensors is money-cost, which limits wide application in industry. To develop a cost-effective maintenance technique, this paper presents a novel research using smart sensor systems for machine fault diagnosis. In this paper, a smart sensors system is developed which acquires three types of signals involving vibration, current, and flux from induction motors. And then, support vector machine, linear discriminant analysis, k-nearest neighbors, and random forests algorithm are employed as classifiers for fault diagnosis. The parameters of these classifiers are optimized by using cross-validation method. The experimental results show that smart sensor system has the similar performance for applying in intelligent machine fault diagnosis with reduced product cost. Developed smart sensors have feasibility to apply for intelligent fault diagnosis.     

基于异步IMM融合滤波的网络化系统故障诊断

针对一类带随机丢包的异步多传感器网络化系统,提出了基于网络化异步交互式多模型（Interacting multiple model,IMM）融合滤波的故障诊断方法.考虑不同传感器通道具有不同丢包概率的情况,将未知的故障幅值看作扩维的系统状态,利用提出的网络化异步IMM融合滤波算法对由系统正常模型和各种可能的故障模型构成的模型集进行滤波,根据模型概率进行故障检测和定位,同时得到故障幅值和系统状态的联合估计.提出的方法避免了传统IMM故障诊断方法模型集设计中故障大小难以确定的问题,适用于具有任意采样速率和任意初始采样时刻的异步多传感器网络化系统,并且通过融合多个传感器的信息提高了故障诊断的准确性.仿真实例验证了所提出方法的可行性和有效性.     

LOCST: A Built-In Self-Test Technique

A built-in self-test technique utilizing on-chip pseudorandom-pattern generation, on-chip signature analysis, a ``boundary scan' feature, and an on-chip monitor test controller has been implemented on three VLSI chips by the IBM Federal Systems Division. This method (designated LSSD on-chip self-test, or LOCST) uses existing level-sensitive scan design strings to serially scan random test patterns to the chip's combinational logic and to collect test results. On-chip pseudorandom-pattern generation and signature analysis compression are provided via existing latches, which are configured into linear-feedback shift registers during the self-test operation. The LOCST technique is controlled through the on-chip monitor, IBM FSD's standard VLSI test interface/controller. Boundary scan latches are provided on all primary inputs and primary outputs to maximize self-test effectiveness and to facilitate chip I/O testing. Stuck-fault simulation using statistical fault analysis was used to evaluate test coverage effectiveness. Total test coverage values of 81.5, 85.3, and 88.6 percent were achieved for the three chips with less than 5000 random-pattern sequences. Outstanding test coverage (≫97%) was achieved for the interior logic of the chips. The advantages of this technique, namely very low hardware overhead cost (≪2%), design-independent implementation, and effective static testing, make LOCST an attractive and powerful technique.     

Multiple detection test generation with diversified fault partitioning paths

The dependability of current and future nanoscale technologies highly depends on the ability of the testing process to detect emerging defects that cannot be modeled traditionally. Generating test sets that detect each fault more than one times has been shown to increase the effectiveness of a test set to detect non-modeled faults, either static or dynamic. Traditional n-detect test sets guarantee to detect a modeled fault with minimum n different tests. Recent techniques examine how to quantify and maximize the difference between the various tests for a fault. The proposed methodology introduces a new systematic test generation algorithm for multiple-detect (including n-detect) test sets that increases the diversity of the fault propagation paths excited by the various tests per fault. A novel algorithm tries to identify different propagating paths (if such a path exists) for each one of the multiple (n) detections of the same fault. The proposed method can be applied to any linear, to the circuit size, static or dynamic fault model for multiple fault detections, such as the stuck-at or transition delay fault models, and avoids any path or path segment enumeration. Experimental results show the effectiveness of the approach in increasing the number of fault propagating paths when compared to traditional n-detect test sets.     

Feed-axis gearbox condition monitoring using built-in position sensors and EEMD method

This paper describes a kind of feed-axis gearbox condition monitoring system using the built-in position sensors such as motor encoders and linear scales with high resolution and high precision, which is more directly related to machine dynamics and is sensitive to the early and weak fault. To obtain the position information, several data acquisition approaches for open numerical control systems (NCs) and commercial NCs are suggested. Then, the mathematical models between the faults and the position signals are thoroughly investigated. Finally, the ensemble empirical mode decomposition (EEMD) method is introduced to localize the fault of the feed-axis gearbox. The experimental results show that it is effective to use built-in position sensors and EEMD method for on-line monitoring the gearbox state and fault diagnosis.     

复杂机载电子系统故障综合诊断技术研究

故障综合诊断技术一直是复杂机载电子系统研发过程中的关键部分,当前的故障诊断技术同时需要机内测试（BIT）和场外自动化测试设备（ATE）的测试结果才能得出诊断结果,诊断效率低,时间长并且不能在线诊断。针对新一代战斗机将更加依赖航空电子系统的趋势,迫切需要一种诊断时间短,且能够实现在线诊断的故障诊断技术。因此,一种基于模型的故障诊断方法被提出。该方法通过融合多信号模型和整数编码故障字典模型,模块间采用多信号模型,单个模块中采用整数编码故障字典模型,克服了多信号模型对测试信息的浪费和整数编码故障字典模型建模困难的缺点,并提出一种多目标测试优选方法,通过优化检测方案,充分发挥BIT的检测性能。该方法通过充分使用BIT的测试信息,摆脱了对场外ATE的依赖,实现了在线快速定位故障并识别故障模式。     

串行反馈内置自测试设计的研究

本文给出一种串行反馈内置自测试设计结构，分析了它的状态转移图的拓扑结构，并对若干电路做了模拟实验。研究表明：添加反馈线沟通测试图形生成和响应压缩部分，既能提高测试图形的随机性，又可以降低错误特征被漏检的可能性，从而提高故障覆盖率。     

On-Line Testing of Lab-on-Chip Using Reconfigurable Digital-Microfluidic Compactors

Dependability is an important system attribute for microfluidic lab-on-chip devices. On-line testing offers a promising method for detecting defects, fluidic abnormalities, and bioassay malfunctions during chip operation. However, previous techniques for reading test outcomes and analyzing pulse sequences are cumbersome, sensitive to the calibration of capacitive sensors, and error-prone. We present a built-in self-test (BIST) method for on-line testing of digital microfluidic lab-on-chip. This method utilizes microfluidic compactors based on droplet-based AND gates, which are implemented using digital microfluidics. An optimization method is proposed to schedule logic AND operations in the compactor to minimize the end time for the compaction procedure. Dynamic reconfiguration of these compactors ensures low area overhead and it allows BIST to be interleaved with bioassays in functional mode. We evaluate the on-line testing method using a multiplexed in vitro diagnostics bioassay.     

基于多阶段注意力机制的多种导航传感器故障识别研究

导航传感器在使用过程中容易发生故障, 针对传统方法对其间歇性和渐变性故障识别率低的问题提出了一种基于多阶段注意力机制的多传感器故障识别算法. 该算法采用基于长短期记忆神经网络和注意力机制的编码器−解码器结构, 根据多类导航传感器数据之间的空间相关性和时间相关性来进行多传感器的故障互判. 经验证, 该算法对多种类传感器的故障识别率高达97.5%, 可以高效地实现故障的检测和分类. 该方法可以准确识别出故障传感器和故障类型, 具有很强的工程应用价值.     

基于QPSO的震动传感器片上相位补偿器设计方法

震动传感器的系统相位非一致性会对地震波到时时差提取产生很大的误差,严重影响震源定位精度;针对这一问题,提出了一种基于量子粒子群优化算法（QPSO）的震动传感器片上相位补偿器设计方法。首先对震动传感器进行相位标定,获得传感器与参考传感器的相位差;其次设计基于QPSO算法的相位补偿滤波器对相位差进行修正,使其无限趋近于0;最后,将相位补偿滤波器封装成FPGA软核部署于FPGA上,完成对震动传感器的相位片上实时补偿。为了验证该方法的性能,将相位补偿滤波器部署于自研的多通道震动信号采集系统上,对8个相同型号震动传感器进行相位一致性校准。试验结果表明,在震动传感器频响范围内,该方法可以将2.5°内的传感器相位差实时修正至0.0044°以下,实现了震动传感器阵列的相位一致性实时校准。该成果在地下浅层震源定位领域具有较强的应用价值。     

Self-Testing the Motorola MC6804P2

The internal serial architecture of the MC6804P2?Motorola's smallest 8-bit, single-chip microcomputer?and the need to minimize test costs led to development of a built-in self-test scheme. The self test is based on a ROM-driven signature analysis technique that utilizes polynomial division to compress lengthy output responses (or signatures) to much smaller results. On-chip signature analysis is an attractive alternative to conventional testing. The signature register, associated control logic, and 288 bytes of self-test ROM occupy less than 5 percent of total chip area. High fault coverage and support for parametric testing with minimal chip area are keys to successful application. This was the authors' first experience with on-chip signature analysis in a commercial MOS microcomputer, but the usefulness of the technique for testing and data compression will undoubtedly find its way into future Motorola products.     

基于相关性模型的BIT诊断策略技术研究*

提出了一种基于相关性模型的机内测试诊断策略。首先根据机内测试系统的诊断策略模型,以相关性矩阵为基础,综合考虑可靠性和测试代价等因素,利用AO*算法构建了决策树;然后根据信息量的大小依次选择测试点,并确定出优化的诊断策略序列。实例分析结果表明,该方法计算复杂度小,所得的诊断策略在较低的测试代价下可以有效提高机内测试的故障检测和隔离率。     

基于贝叶斯信息融合的解析余度辅助机内测试决策

利用不同传感器之间的解析关系,产生某传感器的余度信号辅助机内测试(BIT)决策,在虚警率(或漏报率)较高的BIT决策中融合其他可靠性较高的传感器信息.对余度信号的先验分布、虚警率、漏报率进行建模,经残差分析后,给出残差决策结果和BIT结果的后验分布,选择贝叶斯风险小者作为最终决策;同时,给出了贝叶斯融合需满足的条件.实验分析结果表明,该方法增力了BIT决策的可信性,有助于BIT虚警剔除和漏报检测.     

面向存储器核的内建自测试

存储器内建自测试是当前针对嵌入式随机存储器测试的一种经济有效的途径。它实质是BIST测试算法在芯片内部的硬件实现,形成“片上BIST测试结构999作为E-RAM核与芯片系统其他逻辑电路的接口,负责控制功能,实现片上E-RAM的自动测试。根据一个实际项目,本文介绍了MBIST的整体设计过程,并针对测试开销等给出了定量和定性的讨论。     

CMOS电路瞬态电流测试方法研究

集成电路设计与测试是当今计算机技术研究的主要问题之一。集成电路测试技术是生产高性能集成电路和提高集成电路成品率的关键。基于固定型故障模型的测试方法已不能满足高性能集成电路,尤其是对CMOS电路的测试要求。CMOS电路的瞬态电流(IDDT)测试方法自80年代提出以来,已被工业界采用,作为高可靠芯片的测试手段。     

基于惯导辅助地磁的手机室内定位系统设计

目前的室内定位技术大都是需要建立足够多的信号节点,这种有源信号受建筑物干扰衰减快导致其定位精度不足。为了避免这些存在的问题,通过深入研究室内定位方法,提出了基于惯导辅助地磁匹配的适用于手机移动终端的室内定位方法。有别于传统的室外定位系统,本文利用地球磁场在不同点的差异化信息,并通过选择适当的地磁匹配算法,可以实现不依赖于外部设备的移动个体室内定位,同时通过惯导辅助地磁的组合定位方式有效增加地磁信息匹配效率,能获得较高的室内定位的精度。最后设计了基于android平台的手机室内定位软件,可利用手机内置的传感器设备实现室内定位功能,仿真及实验显示该定位方法是有效的。     

FDI based on an adaptive observer for current and speed sensors of PMSM drives

This paper deals with a new method of current and speed sensors faults detection isolation (FDI) and identification for a permanent magnet synchronous motor (PMSM) drives. A new state variable is introduced so that an augmented system can be constructed to treat PMSM sensor faults as actuator faults. This method uses the PMSM model and a bank of adaptive observers to generate residuals. The residuals results are used for sensor fault detection. A logic algorithm is built in such a way to isolate and identify the faulty sensor for a stator phase current fault after detecting the fault occurrence. Simulation results are presented to illustrate the functionality of theoretical developments. Experimental results with 1.1-kW PMSM have validated the effectiveness of the proposed FDI method. The experimental implementation is carried out on powerful dSpace DS1103 controller board based on the DSP TMS320F240.     

管道缺陷多超声传感器检测数据的神经网络融合

针对管道缺陷检测的现状,设计了超声传感器阵列检测系统,将神经网络技术应用于数据融合领域,采用改进的BP-LM算法对多个超声传感器测得的管道缺陷数据进行了融合处理.实验室检验结果表明,基于神经网络的数据融合大大提高了信号的质量,改进的BP-LM算法比标准BP算法融合效果更好,收敛速度更快.     

航空发动机控制系统多传感器软故障检测研究

一般认为两个以上传感器同时发生故障的概率较小,但实际上不能排除其发生的可能性;提出了一种改进的多重故障假设方法来解决航空发动机控制系统多传感器同时发生软故障的问题,这一方法采用一组卡尔曼滤波器,每个滤波器对应一个被检测传感器的故障模态;采用残差加权二乘方处理滤波残差并与门限值作比较来判断是否发生故障;仿真结果表明,所提出的方法能有效解决多传感器软故障的检测与隔离问题.     

基于改进V-detector算法的转子故障识别方法研究

为了提高转子故障诊断识别准确率, 提出一种基于改进V-detector算法的转子故障辨识方法。首先对V-detector算法进行了改进, 该算法通过改变拒绝和接受假设检验的条件来减少无效检测器的产生进而提高算法的检测准确率; 然后将信号的谱熵值作为特征向量, 并根据转子故障类型将其划分为多个自体样本集, 用改进后V-detector算法训练出多个检测器集; 最后利用其设计出能够识别转子故障的分类器。仿真结果表明, 改进的V-detector算法能产生较少的检测器, 覆盖率由95%升高至99%时检测器数目无明显增加, 与原算法相比提高了故障的辨识精度。