A complete fabrication route for atomic-scale, donor-based devices in single-crystal germanium

Despite the rapidly growing interest in Ge for ultrascaled classical transistors and innovative quantum devices, the field of Ge nanoelectronics is still in its infancy. One major hurdle has been electron confinement since fast dopant diffusion occurs when traditional Si CMOS fabrication processes are applied to Ge. We demonstrate a complete fabrication route for atomic-scale, donor-based devices in single-crystal Ge using a combination of scanning tunneling microscope lithography and high-quality crystal growth. The cornerstone of this fabrication process is an innovative lithographic procedure based on direct laser patterning of the semiconductor surface, allowing the gap between atomic-scale STM-patterned structures and the outside world to be bridged. Using this fabrication process, we show electron confinement in a 5 nm wide phosphorus-doped nanowire in single-crystal Ge. At cryogenic temperatures, Ohmic behavior is observed and a low planar resistivity of 8.3 kΩ/□ is measured.     

Electrical Characterization of Ordered Si:P Dopant Arrays

We report on the ability to fabricate arrays of planar, nanoscale, highly doped phosphorus dots in silicon separated by source and drain electrodes using scanning tunneling microscope lithography. We correlate ex situ electrical measurements with scanning tunneling microscope (STM) images of these devices and show that ohmic conduction can be achieved through the disordered array with a P coverage of 0.8times10¹⁴ cm^-2. In comparison, we show that an ordered array of P dots ~6 nm in diameter and containing ~50 P atoms separated by ~4 nm shows nonlinear I-V, characteristic of a series of metallic dots separated by tunnel barriers. These results highlight the use of STM lithography to pattern ordered dopants in silicon down to the sub-10 nm scale     

Characterization of terraces and steps on Cl-terminated Ge(111) surfaces after HCl treatment in N2 ambient

Germanium (Ge) is a promising substrate for semiconductor devices in the near future. However, wet-chemical preparations that enable the control of the structure of the Ge surface have not yet been developed. In this study, the surface structure of Ge(111) after HCl treatment is characterized by X-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM) and scanning tunneling microscopy (STM). XPS spectra revealed that purging with inert gas, such as nitrogen, is necessary to obtain a Ge surface free of oxide, probably because dissolved oxygen from air rapidly oxidizes the surface. Cl-terminated Ge surfaces are microscopically rough, but are composed of terraces and steps, as revealed by magnified STM images. Step edges run not along specific directions reflecting the crystallographic nature of the (111) surface but randomly. Many atomic-scale protrusions with the height of around 0.1 nm are dispersed on terraces. They are likely to be impurities such as carbon contaminants and water on Cl-terminated terraces attracted by Cl atoms with high electronegativity.     

Charge sensing of precisely positioned p donors in Si

Real-time sensing of (spin-dependent) single-electron tunneling is fundamental to electrical readout of qubit states in spin quantum computing. Here, we demonstrate the feasibility of detecting such single-electron tunneling events using an atomically planar charge sensing layout, which can be readily integrated in scalable quantum computing architectures with phosphorus-donor-based spin qubits in silicon (Si:P). Using scanning tunneling microscopy (STM) lithography on a Si(001) surface, we patterned a single-electron transistor (SET), both tunnel and electrostatically coupled to a coplanar ultrasmall quantum dot, the latter consisting of approximately four P donors. Charge transitions of the quantum dot could be detected both in time-averaged and single-shot current response of the SET. Single electron tunneling between the quantum dot and the SET island on a time-scale (τ ～ ms) two-orders-of-magnitude faster than the spin-lattice relaxation time of a P donor in Si makes this device geometry suitable for projective readout of Si:P spin qubits. Crucial to scalability is the ability to reproducibly achieve sufficient electron tunnel rates and charge sensitivity of the SET. The inherent atomic-scale control of STM lithography bodes extremely well to precisely optimize both of these parameters.     

Surface morphology of epitaxial magnetic tunnel junctions

The surface morphology of epitaxial Fe(001)/MgO(001)/Fe(001) magnetic tunnel junctions, which show the giant tunneling magnetoresistance effect, was investigated by in situ scanning tunneling microscopy. It was observed that an epitaxial MgO barrier layer forms flat surface structures. The surface was flatter with distinct steps and terraces after annealing, which would lead to an increase of the tunneling magnetoresistance ratio. Examination of the local electronic structures of 1.05-nm-thick MgO barrier layers by scanning tunneling spectroscopy revealed no pinholes in the layers, so they would be perfect barriers in magnetic tunnel junctions.     

Growth and relaxation processes in Ge nanocrystals on free-standing Si(001) nanopillars

We study the growth and relaxation processes of Ge crystals selectively grown by chemical vapour deposition on free-standing 90 nm wide Si(001) nanopillars. Epi-Ge with thickness ranging from 4 to 80 nm was characterized by synchrotron based x-ray diffraction and transmission electron microscopy. We found that the strain in Ge nanostructures is plastically released by nucleation of misfit dislocations, leading to degrees of relaxation ranging from 50 to 100%. The growth of Ge nanocrystals follows the equilibrium crystal shape terminated by low surface energy (001) and {113} facets. Although the volumes of Ge nanocrystals are homogeneous, their shape is not uniform and the crystal quality is limited by volume defects on {111} planes. This is not the case for the Ge/Si nanostructures subjected to thermal treatment. Here, improved structure quality together with high levels of uniformity of the size and shape is observed.     

Imaging of localized electronic states at a nonconducting surface by single-electron tunneling force microscopy

Localized electronic states near a nonconducting SiO(2) surface are imaged on a approximately 1 nm scale by single-electron tunneling between the states and a scanning probe tip. Each tunneling electron is detected by electrostatic force. The images represent the number of tunneling electrons at each spatial location. The spatial resolution of the single electron tunneling force microscope is determined by quantum mechanical tunneling, providing new atomic-scale access to electronic states in dielectric surfaces and nonconducting nanostructures.     

Engineering Independent Electrostatic Control of Atomic-Scale (∼4 nm) Silicon Double Quantum Dots

Scalable quantum computing architectures with electronic spin qubits hosted by arrays of single phosphorus donors in silicon require local electric and magnetic field control of individual qubits separated by ～10 nm. This daunting task not only requires atomic-scale accuracy of single P donor positioning to control interqubit exchange interaction but also demands precision alignment of control electrodes with careful device design at these small length scales to minimize cross capacitive coupling. Here we demonstrate independent electrostatic control of two Si:P quantum dots, each consisting of ～15 P donors, in an optimized device design fabricated by scanning tunneling microscope (STM)-based lithography. Despite the atomic-scale dimensions of the quantum dots and control electrodes reducing overall capacitive coupling, the electrostatic behavior of the device shows an excellent match to results of a priori capacitance calculations. These calculations highlight the importance of the interdot angle in achieving independent control at these length-scales. This combination of predictive electrostatic modeling and the atomic-scale fabrication accuracy of STM-lithography, provides a powerful tool for scaling multidonor dots to the single donor limit.     

Self‐Assembled Pb Nanostructures on Si(111) Surfaces: From Nanowires to Nanorings

A template‐directed growth method for metals is described in which ordered arrays of super‐long single‐crystalline metal nanowires with atomic‐level‐controlled width, thickness (height), and surface location are prepared by molecular beam epitaxy. Their subsequent examination by in situ scanning tunneling microscopy is also outlined. A phase‐separated stripe pattern composed of alternately a Ge‐rich incommensurate phase and a √3 × √3 phase is first obtained by Ge deposition on Si(111) substrates. Further deposition of Pb on this patterned surface leads to a well‐ordered array of super‐long Pb nanowires. Using the same mechanism, superconducting Pb nanorings can also be fabricated. In this review of our recent work, these Pb single‐crystalline nanowires and nanorings are shown to serve as an ideal platform for the study of superconductivity in reduced dimensionalities. Furthermore, because the widths and spatial distributions of two phases can be precisely controlled by the Ge coverage and substrate temperature, and because a metal will always selectively nucleate on one of two phases, this template‐directed growth method can be applied to a wide range of metals.     

The role of SiGe buffer in growth and relaxation of Ge on free-standing Si(001) nano-pillars

We study the growth and relaxation processes of Ge nano-clusters selectively grown by chemical vapor deposition on free-standing 90?nm wide Si(001) nano-pillars with a thin Si(0.23)Ge(0.77) buffer layer. We found that the dome-shaped SiGe layer with a height of about 28?nm as well as the Ge dot deposited on top of it partially relaxes, mainly by elastic lattice bending. The Si nano-pillar shows a clear compliance behavior-an elastic response of the substrate on the growing film-with the tensile strained top part of the pillar. Additional annealing at 800?°C leads to the generation of misfit dislocation and reduces the compliance effect significantly. This example demonstrates that despite the compressive strain generated due to the surrounding SiO(2) growth mask it is possible to realize an overall tensile strain in the Si nano-pillar and following a compliant substrate effect by using a SiGe buffer layer. We further show that the SiGe buffer is able to improve the structural quality of the Ge nano-dot.     

In situ observation of morphological change in CdTe nano- and submicron wires

We report growth and characterization of CdTe wires 30–400 nm in diameter by the vapor–liquid–solid technique. Individual nanowires were placed on a movable piezotube, which allowed three-dimensional motion toward a scanning tunneling microscope (STM). A bias was applied to the STM tip in contact with the nanowire, and the morphological changes due to Joule heating were observed in situ using a transmission electron microscope (TEM) in real time. For thick CdTe wires (d > ~150 nm), the process results in the growth of superfine nanowires (SFNWs) of 2–4 nm diameter on the surface of the wire. Smaller diameter nanowires, in contrast, disintegrate under the applied bias before the complete evolution of SFNWs on the surface.     

Nucleation of Ge quantum dots on the C-alloyed Si(001) surface

Carbon pre-deposition onto the bare Si(001) surface has been shown to alter the (2×1) surface structure by formation of c(4×4) reconstructed domains containing a high C-concentration. Here we studied by ultra-high vacuum scanning tunneling microscopy the effect of this restructured surface on the initial stages of Ge nucleation by molecular beam epitaxy. Ge is found to form three-dimensional (3D) islands already at sub-monolayer coverage, resulting in a Volmer–Weber growth mode. Strain effects repel Ge adatoms from the C-rich domains, leading to enhanced Ge island formation on the C-free surface regions in between the c(4×4) areas. At a low growth temperature of 350°C, very small three-dimensional islands (3–5 nm in diameter, height 3–4 ML) with a density of nearly 1×10¹² cm⁻² are obtained for only 0.5 ML of Ge. At higher substrate temperatures of approximately 500°C this three-dimensional growth mode is less pronounced, but still evident. The initially nucleated three-dimensional islands define the positions of the larger quantum dots at higher Ge coverage, that exhibit enhanced photoluminescence (PL) properties.     

Fe Nanoclusters on the Ge（001） Surface Studied by Scanning Tunneling Microscopy,Density Functional Theory Calculations and X-Ray Magnetic Circular Dichroism

The growth of Fe nanoclusters on the Ge(001) surface has been studied using low-temperature scanning tunneling microscopy (STM) and density functional theory (DFT) calculations. STM results indicate that Fe nucleates on the Ge(001) surface, forming well-ordered nanoclusters of uniform size. Depending on the preparation conditions, two types of nanoclusters were observed having either four or sixteen Fe atoms within a nanocluster. The results were confirmed by DFT calculations. Annealing the nanoclusters at 420 K leads to the formation of nanorow structures, due to cluster mobility at such temperature. The Fe nanoclusters and nanorow structures formed on the Ge(001) surface show a superparamagnetic behaviour as measured by X-ray magnetic circular dichroism.      

Nanofabrication of heteromolecular organic nanostructures on epitaxial graphene via room temperature feedback-controlled lithography

Nanoscale control of surface chemistry holds promise for tailoring the electronic, optical, and chemical properties of graphene. Toward this end, the nanofabrication of sub-5-nm heteromolecular organic nanostructures is demonstrated on epitaxial graphene using room temperature ultrahigh vacuum scanning tunneling microscopy. In particular, monolayers of the organic semiconductor 3,4,9,10-perylene-tetracarboxylic dianhydride (PTCDA) are nanopatterned on epitaxial graphene using feedback-controlled lithography (FCL) and then used as chemical resists to template the deposition of N,N'-dioctyl-3,4,9,10-perylene-tetracarboxylic diimide (PTCDI-C8). The generality of this FCL-based nanofabrication procedure suggests its applicability to a wide range of fundamental studies and prototype device fabrication on chemically functionalized graphene.     

Graphene induced surface reconstruction of cu

An atomic-scale study utilizing scanning tunneling microscopy (STM) in ultrahigh vacuum (UHV) is performed on large single crystalline graphene grains synthesized on Cu foil by a chemical vapor deposition (CVD) method. After thermal annealing, we observe the presence of periodic surface depressions (stripe patterns) that exhibit long-range order formed in the area of Cu covered by graphene. We suggest that the observed stripe pattern is a Cu surface reconstruction formed by partial dislocations (which appeared to be stair-rod-like) resulting from the strain induced by the graphene overlayer. In addition, these graphene grains are shown to be more decoupled from the Cu substrate compared to previously studied grains that exhibited Moiré patterns.     

Nanopatterning of Si(001) for bottom-up fabrication of nanostructures

The epitaxial growth of Si on Si(001) under conditions at which the (2?×?n) superstructure is forming has been investigated by scanning tunneling microscopy and Monte Carlo simulations. Our experiments reveal a periodic change of the surface morphology with the surface coverage of Si. A regular (2?×?n) stripe pattern is observed at coverages of 0.7-0.9 monolayers that periodically alternates with less dense surface structures at lower Si surface coverages. The MC simulations show that the growth of Si is affected by step-edge barriers, which favors the formation of a rather uniform two-dimensional framework-like configuration. Subsequent deposition of Ge onto the (2?×?n) stripe pattern yields a dense array of small Ge nanostructures.     

High quality Ge epitaxial layers on Si by ultrahigh vacuum chemical vapor deposition

Flat, relaxed Ge epitaxial layers with low threading dislocation density (TDD) of 1.94 × 10⁶ cm^− 2 were grown on Si(001) by ultrahigh vacuum chemical vapor deposition. High temperature Ge growth at 500 °C on 45 nm low temperature (LT) Ge buffer layer grown at 300 °C ensured the growth of a flat surface with RMS roughness of 1 nm; however, the growth at 650 °C resulted in rough intermixed SiGe layer irrespective of the use of low temperature Ge buffer layer due to the roughening of LT Ge buffer layer during the temperature ramp and subsequent severe surface diffusion at high temperatures. Two-dimensional Ge layer grown at LT was very crucial in achieving low TDD Ge epitaxial film suitable for device applications.     

Stacking of 2D Electron Gases in Ge Probed at the Atomic Level and Its Correlation to Low-Temperature Magnetotransport

Stacking of two-dimensional electron gases (2DEGs) obtained by δ-doping of Ge and patterned by scanning probe lithography is a promising approach to realize ultrascaled 3D epitaxial circuits, where multiple layers of active electronic components are integrated both vertically and horizontally. We use atom probe tomography and magnetotransport to correlate the real space 3D atomic distribution of dopants in the crystal with the quantum correction to the conductivity observed at low temperatures, probing if closely stacked δ-layers in Ge behave as independent 2DEGs. We find that at a separation of 9 nm the stacked-2DEGs, while interacting, still maintain their individuality in terms of electron transport and show long phase coherence lengths (～220 nm). Strong vertical electron confinement is crucial to this finding, resulting in an interlayer scattering time much longer (～1000 × ) than the scattering time within the dopant plane.     

Ordering of Ge islands on Si(001) substrates patterned by nanoindentation

Spatial organization of Ge islands, grown by physical vapor deposition, on prepatterned Si(001) substrates has been investigated. The substrates were patterned prior to Ge deposition by nanoindentation. Characterization of Ge dots is performed by atomic force microscopy and scanning electron microscopy. The nanoindents act as trapping sites, allowing ripening of Ge islands at those locations during subsequent deposition and diffusion of Ge on the surface. The results show that island ordering is intrinsically linked to the nucleation and growth at indented sites and it strongly depends on pattern parameters.     

Fabrication of high quality Ge virtual substrates by selective epitaxial growth in shallow trench isolated Si (001) trenches

To further boost the CMOS device performance, Ge has been successfully integrated on shallow trench isolated Si substrates for pMOSFET fabrication. However, the high threading dislocation densities (TDDs) in epitaxial Ge layers on Si cause mobility degradation and increase in junction leakage. In this work, we studied the fabrication of Ge virtual substrates with low TDDs by Ge selective growth and high temperature anneal followed by chemical mechanical polishing (CMP). With this approach, the TDDs in both submicron and wider trenches were simultaneously reduced below 1 × 10⁷ cm^− 2 for 300 nm thick Ge layers. The resulting surface root-mean-square (RMS) roughness is about 0.15 nm. This fabrication scheme provides high quality Ge virtual substrates for pMOSFET devices as well as for III-V selective epitaxial growth in nMOSFET areas. A confined dislocation network was observed at about 50 nm above the Ge/Si interface. This dislocation network was generated as a result of effective threading dislocation glide and annihilation. The separation between the confined threading dislocations was found in the order of 100 nm.