Current mode second breakdown in epitaxial planar transistors

Current mode second breakdown is a type of voltage "switchback" observed in epitaxial transistors. The phenomenon is initiated when the emitter is injecting at a collector voltage in excess of the collector-emitter sustaining voltage, and is characterized by delay and voltage fall times on the order of a nanosecond. The device can be sustained in the low voltage state only as long as there is sufficient charge to produce conductivity modulation within the collector-base depletion region. When the available charge is exhausted, the collector voltage will recharge at a rate determined by the external circuit. At some critical current density, the collector-base depletion region collapses toward the high conductivity substrate. The electric field within the depletion region increases as the depletion region width narrows, until avalanche occurs. The sustaining voltage will be determined by the bulk base-to-collector avalanche voltage. A consequence of this behavior is that most epitaxial transistors cannot operate stably in the LVCERmode, and switching-off unclamped inductive circuits with the emitter-base junction terminated in some finite resistance will lead to second breakdown.     

Second breakdown in high-voltage switching transistors

A 2-dimensional mathematical model which includes the avalanche multiplication and internal self-heating effects has been used to predict the internal behaviour of a typical high-voltage power-transistor design. Collector n?-n+ interface is the region of high electrical and thermal stresses which cause second-breakdown failure at high-current and high-voltage operating conditions.     

Second breakdown of IC structured power transistors

The authors attempt to characterize second breakdown as heating phenomena which can occur in one of two places, either at the p-n interface at low current or at the n-n⁺interface at higher current. The transition point between these two states occurs at a current It= qVsatNDS where the n-region field is uniform and at a voltage Vt= εsatWepijust necessary to saturate the drift velocity in Wepi.     

Second breakdown of transistors during inductive turnoff

During turnoff, current is localized to the center of the emitter stripe of a transistor. Depending on the magnitude of reverse base current and device parameters, the current density can reach levels which trigger avalanche injection. A simple model is presented which describes this effect and shows good agreement with measurements.     

Second breakdown and crystallographic defects in transistors

A study was conducted to determine the effect, on second breakdown in transistors, of some of the crystallographic defects that can develop during handling and fabricating procedures. X-ray diffraction microscopy was used to detect these defects. The susceptibility to second breakdown of about 1500 epitaxial planar silicon transistors diffused on two wafers was measured and the site of the current constriction of second breakdown was registered on most of these transistors. These data were then compared with the X-ray topographs. Any effect of the observed gross dislocations was masked by other factors, such as apparent surface induced effects, that were not discernible hi the X-ray topographs. It is proposed that a faulted emitter structure, that has been correlated with the emitter diffusion step, may be of importance in affecting the susceptibility of the transistor to second breakdown. The heating in the transistor at the second breakdown current constriction site to temperatures above 600°C and recrystallized laser-induced melt regions smaller that about 30 µm in diameter produced no crystallographic changes nor any frozen-in strain fields detectable in the X-ray topographs.     

Second breakdown in power transistors due to avalanche injection

Second breakdown in power transistors continues to be an actively discussed subject. Although there is general agreement that the lateral thermal instability model adequately explains forward bias second breakdown, it fails to explain the reverse bias failure mechanism. The thermal initiation and electrical initiation processes have been successful in explaining only some aspects of this phenomena. This paper studies the subject of reverse bias second breakdown both experimentally and analytically. It is seen that there is excellent correlation between theory and experiment. The conclusion of this investigation is that avalanche injection is the triggering mechanism. Further, the filamentary currents that result from this can in most cases result in device failure. It is also concluded that under fixed circuit conditions, the reverse bias second breakdown potential of a transistor is completely specified by the single parameter Vpwhich is the voltage necessary for avalanche injection.     

Investigation into the survival of epitaxial bipolar transistors in current mode second breakdown

Measurements have been obtained of the time for which epitaxial transistors are able to survive when pulsed into the current mode second breakdown condition. The results have been analysed to provide information on the nature of the constricted current distribution. The work indicates the effects that emitter geometry has on the extent of the current constriction.     

An investigation of the damage produced in epitaxial transistors by second breakdown mechanisms

Avalanche injection at the epitax-substrate interface of bipolar transistors has been shown to be responsible for a substantial amount of the damage produced in transistors that experience second breakdown. Dislocation damage and corresponding parameter degradation has been shown to result directly from entry into the avalanche injection phase (current mode second breakdown), which if allowed to proceed into thermal breakdown, leads to aluminium-silicon eutectics and collector-emitter shorting. These observations are explained in terms of the nature of the current distribution established during the current mode phase of second breakdown.     

Molecular beam epitaxial double heterojunction bipolar transistors with high current gains

Double heterojunction Al0.35Ga0.65As/GaAs bipolar junction transistors (DHBJTs) grown by molecular beam epitaxy (MBE) were fabricated and tested. Devices with 2000 ? and 500 ? base widths exhibited common emitter current gains of about 325 and 500, respectively, in a wide range of base and collector currents. The use of such high Al mole fraction and double heterojunctions placed stringent requirements on the growth parameter which had to be optimised and controlled very precisely to obtain such high current gains. These current gains compare with the previous best value of 120 obtained in a molecular beam epitaxial single heterojunction bipolar transistor having a 500 ?-thick base region.     

Boundary conditions between current mode and thermal mode second breakdown in epitaxial planar transistors

The dependence of the increase of current in a transistor of n⁺-p-n-n⁺type on time is investigated, and current mode second breakdown (CSB)and thermal mode second breakdown (TSB) are discriminated by the duration of the delay time before which second breakdown occurs. The boundary conditions between CSB and TSB in steady state are clarified. The critical voltage between CSB and TSB is determined by the width of the n layer, the immobile charge density of the n layer, and the injected electron density from the emitter to the n layer. The numerical analysis was in qualitative agreement with the experimental results.     

High injection in epitaxial transistors

An analysis of base widening and the current dependence of the cutoff frequency fThas been given previously [1]. The analysis is approximate and is based on the location of the edges of transition regions. Definition of transition regions becomes problematic in transistors having nonuniform base doping and for high-current densities. Such difficulties are avoided in this paper by use of the charge control approach. Numerical solutions of delay time (= 1/2pi f_{T}) as a function of current density are given for low reverse collector bias. Whereas transition regions can be defined only approximately, the electric field is a well-defined quantity, and changes in the electric field that accompany base widening are shown in detail. At low injection levels, a high-field region exists near the transition between base and epitaxial layer. This high-field region is relocated to the interface between epitaxial layer and substrate under high injection conditions. When this "high-field relocation" has occurred, the epitaxial layer acts as an extension of the base with an attendant increase in the delay time [1].     

The collector-base avalanche voltage of epitaxial transistors

The effect of a low resistivity substrate on the avalanche voltage characteristics of diffused epitaxial pnn⁺ junctions has been considered. Curves are given of the reduction in the “intrinsic” avalanche voltage and also of the movement of the depletion layer boundaries with junction voltage, thus aiding the process of optimizing the design of a transistor.     

Hot-hole-induced dielectric breakdown in LDMOS transistors

A novel failure mechanism in an n-channel lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor biased in the saturation mode is investigated. A correlation between time-to-breakdown and hot hole gate current is established and the static safe operating area (SOA), limited by hot-hole-induced dielectric breakdown, is defined. A method based on the evaluation of the time integral of an "effective" hot-hole gate current is proposed which allows us to estimate the time-to-fail of the device operating in any dynamic (periodic) mode, beyond its static SOA. The prebreakdown degradation of some electrical parameters, attributed to hot hole injection into the gate oxide, is also discussed.     

High frequency breakdown in diffused transistors

In addition to offering such desirable performance characteristics as very large bandwidth and appreciably high current gain, transistors manufactured by diffusion techniques possess a high frequency voltage capability that is significantly in excess of the breakdown voltage which materializes under quiescent operating conditions. This paper attributes voltage capability enhancement in diffused transistors to the excess phase which is evidenced in the current gain characteristics of these devices. An "excess breakdown function," developed in this paper, permits direct calculation of the factor by which quiescent breakdown specifications can be safely exceeded at given frequencies of operation.     

The emitter-base breakdown voltage of planar transistors

The emitter-base breakdown voltage for double diffused planar transistors has been examined both theoretically and experimentally. A convenient chart is given for the calculation of the breakdown voltage for a wide range of transistors structures.     

Diffusivity at high injection in epitaxial power transistors

Pulsed f_t measurement of high voltage epitaxial planar transistors is shown to be a suitable means to determine the electron diffusivity at high injection. As predicted by theory, the f_t measured in hard-driven quasi-saturation condition is inversely proportional to the square of collector plus base thickness. Electron diffusivity computed by means of the simple injection model agrees well with theoretical prediction, while wide emitter stripe (270 μ) devices show some disagreement, probably due to crowding. Exact calculation confirms the validity of the approach at low collector voltage.     

Trench-isolated transistors in lateral CVD epitaxial silicon-on-insulator films

Completely dielectrically isolated, p-channel MOS transistors have been obtained by lateral chemical vapor deposition (CVD) epitaxial overgrowth of buried oxide layers and subsequent lateral isolation with refilled trenches. The transistor characteristics are similar to those in bulk control wafers. Isolation between the device island and the substrate is approximately 10¹²Ω.