A high-gain GaAs/AlGaAs n-p-n heterojunction bipolar transistor on(100) Si grown by molecular beam epitaxy

High-gain GaAs/AlGaAs n-p-n heterojunction bipolar transistors (HBT's) on Si substrates grown by molecular beam epitaxy (MBE) have been fabricated and tested. In this structure, an n⁺-InAs emitter cap layer was grown in order to achieve a nonalloyed ohmic contact. Typical devices with an emitter dimension of 50×50 μm² exhibited a current gain as high as 45 at a collector current density of 2×10³ A/cm² with an ideality factor of 1.4. This is the highest current gain reported for HBT's grown on Si substrates. Breakdown voltages as high as 10 and 15 V were observed for the emitter-base and collector-base junctions respectively. The investigation on devices with varying emitter dimensions demonstrates that much higher current gains can be expected     

High-performance AlGaAs/GaAs SDHTs and ring oscillators grown byMBE on Si substrates

High-performance AlGaAs/GaAs selectively doped heterojunction transistors (SDHTs) and 19-stage oscillators fabricated on silicon substrates are discussed. Epitaxial layers of AlGaAs/GaAs were grown by MBE on Si substrates. The mobility of two-dimensional electron gas (2DEG) in the SDHTs was as high as 53000 cm²/V-s at 77 K for a sheet charge density of 10×1¹² cm^-2. For 1-μm-gate-length devices, maximum transconductances of 220 and 364 mS/mm were measured at 300 and 77 K, respectively, for the SDHTs. A minimum propagation delay time of 27 ps/stage at room temperature was obtained for a 19-stage direct-coupled FET logic ring oscillator with a power dissipation of 1.1 mW/stage. The propagation delay time was reduced to 17.6 ps/stage at 77 K. From microwave S-parameter measurements at 300 K, current gain and power gain cutoff frequencies of 15 and 22 GHz, respectively, were measured. These results are comparable to those obtained for SDHT technology on GaAs substrates     

A low-noise K-Ka band oscillator AlGaAs/GaAsheterojunction bipolar transistors

The design considerations, fabrication process, and performance of the first K-Ka-band oscillator implemented using a self-aligned AlGaAs/GaAs heterojunction bipolar transistor (HBT) are described. A large-signal time-domain-based design approach has been used which applies a SPICE-F simulator for optimization of the oscillator circuit parameters for maximum output power. The oscillator employs a 2×10-μm² emitter AlGaAs/GaAs HBT that was fabricated using a pattern inversion technology. The HBT has a base current 1/f noise power density lower than 1×10^-20 A²/Hz at 1 kHz and lower than 1×10^-22 A/²/Hz at 100 kHz for a collector current of 1 mA. The oscillator, which is composed of only low-Q microstrip transmission lines, has a phase noise of -80 dBc/Hz at 100 kHz off carrier when operated at 26.6 GHz. These results indicate the applicability of the HBTs to low-phase-noise monolithic oscillators at microwave and millimeter-wave frequencies, where both Si bipolar transistors and GaAs FETs are absent     

Low-resistance bandgap-engineeredW/Si1-xGex/Si contacts

Bandgap-engineered W/Si_1-xGe_x/Si junctions (p⁺ and n⁺) with ultra-low contact resistivity and low leakage have been fabricated and characterized. The junctions are formed via outdiffusion from a selectively deposited Si_0.7Ge _0.3 layer which is implanted and annealed using RTA. The Si _1-xGe_x layer can then be selectively thinned using NH₄OH/H₂O₂/H₂O at 75°C with little change in characteristics or left as-deposited. Leakage currents were better than 1.6×10^-9 A/cm² (areal), 7.45×10^-12 A/cm (peripheral) for p⁺/n and 3.5×10^-10 A/cm² (peripheral) for n⁺/p. W contacts were formed using selective LPCVD on Si_1-xGe_x. A specific contact resistivity of better than 3.2×10^-8 Ω cm² for p ⁺/n and 2.2×10^-8 Ω cm² for n⁺/p is demonstrated-an order of magnitude n⁺ better than current TiSi₂ technology. W/Si_1-xGe _x/Si junctions show great potential for ULSI applications     

Electrical properties of Si p+-n junctions for sub-0.25μm CMOS fabricated by Ga FIB implantation

p⁺-n junction diodes for sub-0.25-μm CMOS circuits were fabricated using focused ion beam (FIB) Ga implantation into n-Si (100) substrates with background doping of N_b=(5-10)×10 ¹⁵ and N_b⁺=(1-10)×10¹⁷ cm^-3. Implant energy was varied from 2 to 50 keV at doses ranging from 1×10¹³ to 1×10¹⁵ cm^-2 with different scan speeds. Rapid thermal annealing (RTA) was performed at either 600 °C or 700°C for 30 s. Diodes fabricated on N_b⁺ with 10-keV Ga⁺ exhibited a leakage current (^I_R) 100× smaller than those fabricated with 50-keV Ga⁺. Tunneling was determined to be the major current transport mechanism for the diodes fabricated on N_b⁺ substrates. An optimal condition for I_R on N_b⁺ substrates was obtained at 15 keV/1×10¹⁵ cm^-2. Diodes annealed at 600°C were found to have an I_R 1000× smaller than those annealed at 700°C. I-V characteristics of diodes fabricated on N_b substrates with low-energy Ga⁺ showed no implant energy dependence. I-V characteristics were also measured as a function of temperature from 25 to 200°C. For diodes implanted with 15-keV Ga ⁺, the cross-over temperatures between I_diff and I_g-r occurred at 106°C for N_b ⁺ and at 91°C for N_b substrates     

High-performance, 0.1 μm InAlAs/InGaAs high electron mobilitytransistors on GaAs

This letter describes the material characterization and device test of InAlAs/InGaAs high electron mobility transistors (HEMTs) grown on GaAs substrates with indium compositions and performance comparable to InP-based devices. This technology demonstrates the potential for lowered production cost of very high performance devices. The transistors were fabricated from material with room temperature channel electron mobilities and carrier concentrations of μ=10000 cm² /Vs, n=3.2×10¹² cm^-2 (In=53%) and μ=11800 cm²/Vs, n=2.8×10¹² cm^-2 (In=60%). A series of In=53%, 0.1×100 μm² and 0.1×50 μm² devices demonstrated extrinsic transconductance values greater than 1 S/mm with the best device reaching 1.074 S/mm. High-frequency testing of 0.1×50 μm² discrete HEMT's up to 40 GHz and fitting of a small signal equivalent circuit yielded an intrinsic transconductance (g_m,i) of 1.67 S/mm, with unity current gain frequency (f_T) of 150 GHz and a maximum frequency of oscillation (f_max) of 330 GHz. Transistors with In=60% exhibited an extrinsic g_m of 1.7 S/mm, which is the highest reported value for a GaAs based device     

Si/Si1-xGex heterojunction bipolartransistors produced by limited reaction processing

Si/Si_1-xGe_x heterojunction transistors (HBTs) fabricated by a chemical vapor deposition (CVD) technique are reported. A rapid thermal CVD limited-reaction processing (LRP) technique was used for the in situ growth of all three device layers, including a 20-mm Si_1-xGe_x layer in the base. The highest current gains observed (β=400) were for a Si/Si_1-x Ge_x HBT with a base doping of 7×10¹⁸ cm^-3 near the junction and a shallow arsenic implant to form ohmic contacts and increase current gain. Ideal base currents were observed for over six decades of current and the collector current remained ideal for nearly nine current decades starting at 1 pA. The bandgap difference between a p-type Si layer doped to 5×10¹⁷ cm^-3 and the Si_1-xGe_x(x=0.31) base measured 0.27 eV. This value was deduced from the measurements of the temperature dependence of the base current and is in good agreement with published calculations for strained Si_1-xGe_x layers on Si     

⟨110⟩-oriented GaAs MESFETs

GaAs metal semiconductor field-effect transistors (MESFETs) have been successfully fabricated on molecular-beam epitaxial (MBE) films grown on the off-axis (110) GaAs substrate. The (110) substrates were tilted 6° toward the (111) Ga face in order to produce device quality two-dimensional MBE growth. Following the growth of a 0.4-μm undoped GaAs buffer, a 0.18-μm GaAs channel with a doping density of 3.4×10¹⁷ cm^-3 and a 0.12-μm contact layer with a doping density of 2×10¹⁸ cm^-3, both doped with Si, were grown. MESFET devices fabricated on this material show very low-gate leakage current, low output conductance, and an extrinsic transconductance of 200 mS/mm. A unity-current-gain cutoff frequency of 23 GHz and a maximum frequency of oscillation of 56 GHz have been achieved. These (110) GaAs MESFETs have demonstrated their potential for high-speed digital circuits as well as microwave power FET applications     

A high breakdown-voltage SiCN/Si heterojunction diode forhigh-temperature applications

Cubic crystalline p-SiCN films are deposited on n-Si(100) substrates to form SiCN/Si heterojunction diodes (HJDs) with a rapid thermal chemical vapor deposition (RTCVD) technique. The developed SiCN/Si HJDs exhibit good rectifying properties up to 200°C. At room temperature, the reverse breakdown voltage is more than 29 V at the leakage current density of 1.2×10^-4 A/cm². Even at 200°C, the typical breakdown voltage of SiCN/Si HJDs is still preserved about 5 V at the leakage current density of 1.47×10^-4 A/cm². These properties are better than the β-SiC on Si HJDs for high temperature applications     

Design study of AlGaAs/GaAs HBTs

The frequency performance of AlGaAs/GaAs heterojunction bipolar transistors (HBTs) having different layouts, doping profiles, and layer thicknesses was assessed using the BIPOLE computer program. The optimized design of HBTs was studied, and the high current performances of HBTs and polysilicon emitter transistors were compared. It is shown that no current crowding effect occurs at current densities less than 1×10⁵ A/cm² for the HBT with emitter stripe width S_E<3 μm, and the HBT current-handling capability determined by the peak current-gain cutoff frequency is more than twice as large as that of the polysilicon emitter transistor. An optimized maximum oscillation frequency formula has been obtained for a typical process n-p-n AlGaAs/GaAs HBT having base doping of 1×10 ¹⁹ cm^-3     

Diamond cold cathode

Diamond cold cathodes have been formed by fabricating mesa-etched diodes using carbon ion implantation into p-type diamond substrates. When these diodes are forward biased, current is emitted into vacuum. The cathode efficiency (emitted current divided by diode current) varies from 2×10^-4 to 1×10^-10 and increases with the addition of 10^-2-torr partial pressure of O₂ into the vacuum system. Current densities of 0.1 to 1 A-cm^-2 are estimated for a diode current of 10 mA. This compares favorably with Si cold cathodes (not coated with Cs), which have efficiencies of ~2×10^-5 and current densities of ~2×10^-2 A-cm^-2. It is believed that higher current densities and efficiencies can be obtained with more efficient cathode designs and an ultrahigh-vacuum environment     

A high-performance InGaAs/InAlAs double-heterojunction bipolartransistor with nonalloyed n+-InAs cap layer on InP(n) grownby molecular beam epitaxy

An InGaAs/InAlAs double-heterojunction bipolar transistor (DHBT) on InP(n) grown by molecular-beam epitaxy (MBE) that exhibits high DC performance is discussed. An n⁺-InAs emitter cap layer was used for nonalloyed contacts in the structure and specific contact resistances of 1.8×10^-7 and 6.0×10^-6 Ω-cm² were measured for the nonalloyed emitter and base contacts, respectively. Since no high-temperature annealing is necessary, excellent contact surface morphology on thinner base devices can easily be obtained. In devices with 50×50-μm² emitter area, common-emitter current gains as high as 1500 were achieved at a collector current density of 2.7×10³ A/cm² . The current gain increased up to 2000 for alloyed devices     

In0.52Al0.48As/In0.53Ga0.47As double-heterojunction p-n-p bipolar transistors grown bymolecular beam epitaxy

P-n-p In_0.52Al_0.48As/In_0.53Ga_0.47 As double-heterojunction bipolar transistors with a p⁺-InAs emitter cap layer grown by molecular-beam epitaxy have been realized and tested. A five-period 15-Å-thick In_0.53Ga_0.47As/InAs superlattice was incorporated between the In_0.53Ga_0.47As and InAs cap layer to smooth out the valence-band discontinuity. Specific contact resistance of 1×10^-5 and 2×10^-6 Ω-cm² were measured for nonalloyed emitter and base contacts, respectively. A maximum common emitter current gain of 70 has been measured for a 1500-Å-thick base transistor at a collector current density of 1.2×10³ A/cm². Typical current gains of devices with 50×50-μm² emitter areas were around 50 with ideality factors of 1.4     

Influence of buffer layer thickness on DC performance ofGaAs/AlGaAs heterojunction bipolar transistors grown on siliconsubstrates

The DC performance of GaAs/AlAs heterojunction bipolar transistors (HBTs) grown on silicon substrates with buffer layers ranging from 0 to 5 μm was investigated. Current gain, collector-emitter breakdown voltage, emitter-base and collector-base diode ideality factors, and breakdown voltages were measured as the buffer layer thickness was varied between 0 and 5 μm. The current gain steadily increases with increasing buffer layer thickness until the layer reaches 3 μm. However, the other DC parameters are relatively insensitive to the buffer layer thickness. A small-signal current gain of 60 is typically achieved for devices with 6×6-μm² emitters at a density of 6×10⁴ A/cm² when the buffer layer is ⩾3 μm     

A GSMBE grown GaInP/GaAs narrow base DHBT exhibiting N-shapenegative differential resistance with variable peak-to-valley currentratio up to 1×107 at room temperature

A Ga_0.51In_0.49P/GaAs DHBT with a heavily doped (1×10¹⁹ cm^-3) narrow base (8 nm) grown by gas source molecular beam epitaxy and fabricated by simple wet chemical etching was demonstrated for the first time. A variable “N” shape negative differential resistance (NDR) controlled by base current was observed in the common-emitter current-voltage characteristics of this device at room temperature. A maximum peak-to-valley current ratio of 1×10⁷ and a maximum current gain of 83 were achieved at room temperature. The largest peak-to-valley current ratio (1×10⁷) achieved is, to our knowledge, the highest reported value to date. The NDR characteristics were explained by the base resistance effect     

Optimization of the germanium preamorphization conditions forshallow-junction formation

Shallow p⁺-n and n⁺-p junctions were formed in germanium preamorphized Si substrates. Germanium implantation was carried out over the energy range of 50-125 keV and at doses from 3×10¹⁴ to 1×10¹⁵ cm^-2. p ⁺-n junctions were formed by 10-keV boron implantation at a dose of 1×10¹⁵ cm^-2. Arsenic was implanted at 50 keV at a dose of 5×10¹⁵ cm^-2 to form the n⁺-p junctions. Rapid thermal annealing was used for dopant activation and damage removal. Ge, B, and As distribution profiles were measured by secondary ion mass spectroscopy. Rutherford backscattering spectrometry was used to study the dependence of the amorphous layer formation on the energy and dose of germanium ion implantation. Cross-sectional transmission electron microscopy was used to study the residual defects formed due to preamorphization. Complete elimination of the residual end-of-range damage was achieved in samples preamorphized by 50-keV/1×10¹⁵ cm^-2 germanium implantation. Areal and peripheral leakage current densities of the junctions were studied as a function of germanium implantation parameters. The results show that high-quality p⁺-n and n⁺-p junctions can be formed in germanium preamorphized substrates if the preamorphization conditions are optimized     

High-transconductance n-type Si/SiGe modulation-doped field-effecttransistors

The authors report on the fabrication and the resultant device characteristics of the first 0.25-μm gate-length field-effect transistor based on n-type modulation-doped Si/SiGe. Prepared using ultrahigh vacuum/chemical vapor deposition (UHV/CVD), the mobility and electron sheet charge density in the strained Si channel are 1500 (9500) cm²/V-s and 2.5×10¹² (1.5×10¹² ) cm^-2 at 300 K (77 K). At 77 K, the devices have a current and transconductance of 325 mA/mm and 600 mS/mm, respectively. These values far exceed those found in Si MESFETs and are comparable to the best results achieved in GaAs/AlGaAs modulation-doped transistors     

The performances of (InAs)1/(GaAs)2short-period superlattice strained single-quantum-well laser on GaAssubstrate

We fabricated an (InAs)₁/(GaAs)₂ short-period superlattice (SPS) strained quantum-well laser at 1.07 μm by MOVPE. The SPS active layer has 10 periods of (InAs)₁/(_GaAs)₂ and an average mismatch of over 2.2%. In highly strained conditions the device showed a lasing wavelength of 1.07 μm, a threshold of 130 A/cm², and a characteristic temperature T₀ of 175 K. We measured the gain characteristic by the Hakki and Paoli method at LED conditions and obtained a high differential gain of 2.0×10^-15 cm² at the threshold current     

Formation of 0.05-μm p+-n and n+-pjunctions by very low (<500 eV) ion implantation

The current-voltage (I-V) characteristics of ultrashallow p⁺ -n and n⁺-p diodes, obtained using very-low-energy (<500-eV) implantation of B and As, are presented. the p⁺-n junctions were formed by implanting B⁺ ions into n-type Si (100) at 200 eV and at a dose of 6×10¹⁴ cm^-2, and n⁺-p junctions were obtained by implanting As⁺ ions into p-type (100) Si at 500 eV and at a dose 4×10¹² cm^-2. A rapid thermal annealing (RTA) of 800°C/10 s was performed before I-V measurements. Using secondary ion mass spectrometry (SIMS) on samples in-situ capped with a 20-nm ²⁸Si isotopic layer grown by a low-energy (40 eV) ion-beam deposition (IBD) technique, the depth profiles of these junctions were estimated to be 40 and 20 nm for p⁺-n and n⁺-p junctions, respectively. These are the shallowest junctions reported in the literature. The results show that these diodes exhibit excellent I-V characteristics, with ideality factor of 1.1 and a reverse bias leakage current at -6 V of 8×10^-12 and 2×10^-11 A for p⁺-n and n⁺-p diodes, respectively, using a junction area of 1.96×10^-3 cm²     

High-current-gain small-offset-voltage In0.49Ga0.51P/GaAs tunneling emitter bipolar transistors grown by gas sourcemolecular beam epitaxy

Different emitter size, self-aligned In_0.49Ga_0.51 P/GaAs tunneling emitter bipolar transistors (TEBTs) grown by gas source molecular beam epitaxy (GSMBE) with 100-Å barrier thickness and 1000-Å p⁺(1×10¹⁹ cm^-3) base have been fabricated and measured at room temperature. A small-signal current gain of 236 and a small common-emitter offset voltage of 40 mV were achieved without any grading. It is found that the emitter size effect on current gain was reduced by the use of a tunnel barrier. The current gain and the offset voltage obtained were the highest and lowest reported values to date, respectively, in InGaP/GaAs system heterojunction bipolar transistors (HBTs) or TEBTs with similar base dopings and thicknesses