Experimental application of a quadratic optimal iterative learning control method for control of wafer temperature uniformity in rapid thermal processing

A quadratic-optimal iterative learning control (ILC) method has been designed and implemented on an experimental rapid thermal processing system used for fabricating 8-in silicon wafers. The controller was designed to control the wafer temperatures at three separate locations by manipulating the power inputs to three groups of tungsten-halogen lamps. The controller design was done based on a time-varying linear state-space model, which was identified using experimental input-output data obtained at two different temperatures. When initialized with the input profiles produced by multiloop PI controllers, the ILC controller was seen to be capable of improving the control performance significantly with repeating runs. In a series of experiments with wafers on which thermocouples are glued, the ILC controller, over the course of ten runs, gradually steered the wafer temperatures very close to the respective reference trajectories despite significant disturbances and model errors.     

Adaptive control approach of rapid thermal processing

This paper presents an adaptive control approach for achieving the control of the wafer temperature in a rapid thermal processing system (RTP). Numerous studies have addressed the temperature control problem in RTP and most researches on this problem require exact knowledge of the systems dynamics. However, it is difficult to acquire this exact knowledge. Thus, various approaches cannot guarantee the desired performance in practical application when there exist some modeling errors between the model and the actual system. In this paper, an adaptive control scheme is applied to RTP without exact information on the dynamics. The system dynamics are assumed to be an affine nonlinear form, and the unknown portion of the dynamics are estimated by a neural network referred to a piecewise linear approximation network (PLAN). The controller architecture is based on an adaptive feedback linearization scheme and augmented by sliding mode control. The performance of the proposed method is demonstrated by experimental results on an RTP system of Kornic Systems Corporation, Korea.     

Thermal uniformity of 12-in silicon wafer in linearlyramped-temperature transient rapid thermal processing

This paper presents a systematic method for estimating the dynamic incident-heat-flux profiles required to achieve thermal uniformity in 12-in silicon wafers during linearly ramped-temperature transient rapid thermal processing using the inverse heat-transfer method. A two-dimensional thermal model and temperature-dependent silicon wafer thermal properties are adopted in this study. The results show that thermal nonuniformities on the wafer surfaces occur during ramped increases in direct proportion to the ramp-up rate. The maximum temperature differences in the present study are 0.835°C, 1.174°C, and 1.516°C, respectively, for linear 100°C/s, 200°C/s, and 300°C/s ramp-up rates. Although a linear ramp-up rate of 300°C/s was used and measurement errors did reach 3.864°C, the surface temperature was maintained within 1.6°C of the center of the wafer surface when the incident-heat-flux profiles were dynamically controlled according to the inverse-method approach. These thermal nonuniformities could be acceptable in rapid thermal processing systems     

Process uniformity and slip dislocation patterns in linearlyramped-temperature transient rapid thermal processing of silicon

Rapid thermal processing (RTP) of silicon using transient linearly ramped-temperature saw-toothed and triangular thermal cycles has been evaluated by characterization of the process uniformity and slip dislocation line patterns for a wide range of process parameters. Rapid thermal oxidation was chosen as the process vehicle for these studies. The process uniformity and slip dislocation line patterns are strongly affected by both the transient and steady-state segments of the thermal cycles. The strong dependencies of the process uniformity and slip dislocation lines on the thermal cycle parameters suggest that the overall performance of a RTP reactor must be specified not only under steady-state thermal conditions, but also for controlled transient thermal cycles. Transient ramped-temperature RTP cycles with medium-to-high peak process temperatures (i.e. T_max=1100°-1150°C) were found to be the optimal process conditions for growing thin gate oxides in the range of 60-120 Å with superior process uniformity and minimum slip dislocation line generation. The results of this work provide insight and useful methodology for process optimization in order to improve process uniformity, minimize generation of slip dislocation lines, and obtain good device electrical characteristics     

A global model for rapid thermal processors

A simple model for the components that make up a rapid thermal processing system is given. These components are the furnace, the pyrometer used to measure temperature, and the control system that utilizes the pyrometer measurement to control the power to the lamps. The models for each of the components are integrated in a numerical code to give a computer simulation of the complete furnace operation. The simulation can be used to investigate the interaction of the furnace, temperature-sensing technique, and the control system. Therefore, the interplay of heat transfer (furnace) properties, optical (pyrometer) parameters, and control gains can be studied. The objective is to define variability in wafer temperature as process parameters change. The following three applications of the model are included: (1) a simulation of open-loop operation; (2) a simulation of the ramp up and subsequent operation with a step change in wafer optical properties; and (3) a simulation of the rapid thermal chemical vapor deposition of polysilicon on silicon oxide which demonstrates the applicability model for actual processes. A technique for correction of pyrometer output to improve temperature control is also presented     

Rapid thermal processing uniformity using multivariable control ofa circularly symmetric 3 zone lamp

Defect introduction and process variations commonly observed in conventional rapid thermal processing (RTP) systems have impeded its widespread acceptance in manufacturing. The main problem lies in the conventional approach of using scalar control, where optimal steady-state temperature uniformity at one set of processing conditions is used to fix the hardware geometry, leaving only one input variable-the lamp power-for control. It is demonstrated that this control is inadequate, since the radiative and convective heat exchange at the wafer are functions of the processing conditions, and that the resultant nonuniformity can be corrected by dynamic control of the spatial optical flux profile. Such control is demonstrated through two key innovations: a lamp system in which tungsten-halogen point sources are configured in three concentric rings to provide a circularly symmetric flux profile, and multivariable control whereby each of the three rings is independently and dynamically controlled to provide for control over the spatial flux profile. This approach offers good temperature uniformity over transients, thus improving reliability of individual processes     

Modelling of rapid thermal processing

An overview is given of modelling issues in rapid thermal processing. Firstly, the influence of surface and bulk properties on wafer emissivity is discussed. Secondly, the influence of back-side layers, wafer transparency and back-side roughness on temperature measurement is discussed. Thirdly, several causes of temperature non-uniformity are mentioned.     

Lamp configuration design for rapid thermal processing systems

We have studied lamp configuration design for rapid thermal processing (RTP) systems. We considered a configuration consisting of four concentric circular lamp zones, three of them above the wafer and one circumventing the wafer. We propose a method to determine the geometric parameters, the width, height and radius, of the lamp zones so that the configuration designed has the capacity to achieve a uniform temperature on the wafer. The method is based on a necessary and sufficient condition for uniform temperature tracking and analytic expressions of the view factors. A design example is given in which a least square open-loop control law yields good temperature uniformity     

Transient effects in rapid thermal processing

Using a realistic model of a rapid thermal processing chamber including Navier-Stokes calculations of the gas losses, the stresses and yield strengths of silicon wafers were determined for several linear ramp rates. It was found that the stress to yield strength ratio is a sensitive function of the ramp rate and the radiant uniformity. Radiation patterns that produce good steady-state thermal nonuniformity overheat the wafer edges during heating transients, leading to high stress levels     

Recent developments in rapid thermal processing

Rapid thermal annealing (RTA) with a short dwell time at maximum temperature is used with ion implantation to form shallow junctions and polycrystalline-Si gate electrodes in complementary, metal-oxide semiconductor (CMOS) Si processing. Wafers are heated by electric lamps or steady heat sources with rapid wafer transfer. Advanced methods use “spike anneals,” wherein high-temperature ramp rates are used for both heating and cooling while also minimizing the dwell time at peak temperature to nominally zero. The fast thermal cycles are required to reduce the undesirable effects of transient-enhanced diffusion (TED) and thermal deactivation of the dopants. Because junction profiles are sensitive to annealing temperature, the challenge in spike annealing is to maintain temperature uniformity across the wafer and repeatability from wafer to wafer. Multiple lamp systems use arrayed temperature sensors for individual control zones. Other methods rely on process chambers that are designed for uniform wafer heating. Generally, sophisticated techniques for accurate temperature measurement and control by emissivity-compensated infrared pyrometry are required because processed Si wafers exhibit appreciable variation in emissivity.     

A contribution to optimal lamp design in rapid thermal processing

Recent studies of wafer temperature control in rapid thermal processing systems have indicated that a multiring circularly symmetric lamp configuration with independent (multivariable) control of the power applied to each ring is likely to be more successful than the earlier lamp design approaches. An important issue in such multiring lamp systems is the optimal shaping of the output heat flux profile (HFP) of each ring to provide maximum controllability of the wafer temperature. In this paper we seek to optimize the ring HFP's via the lamp design parameters: ring positions and widths. We start by determining the heat loss profiles over the wafer surface for a variety of temperature setpoints and processing conditions. In order to maintain temperature uniformity across the wafer at a given setpoint, the lamp system should provide a compensating HFP. The total lamp HFP is the sum of the individual ring HFPs weighted by their respective applied powers. The HFP's are, in turn, functionally dependent on the lamp design parameters and this dependence can be measured through a calibration process. Therefore, the resulting optimization problem reduces to determining the lamp design parameters that result in lamp HFP's which best approximates the collection of the wafer heat loss profiles. Our method provides a practical technique for determining the optimal lamp design parameters     

Model identification in rapid thermal processing systems

Of the various techniques for controlling the temperature in rapid thermal processing (RTP), model-based control has the greatest potential for attaining the best performance, when the model is accurate. Some system identification methods are introduced to help obtain more accurate models from measured input-output data. For the first identification method, techniques for estimating the parameters (time constant and gain) of a particular physics-based model are presented. For the other, it is shown how to use the input-output measurements to obtain a black-box (autoregressive exogenous) model of the RTP system, which turns out to have better predictive capability. For each problem, the theoretical derivation of the identification technique and assumptions on which it is based are summarized, and experimental results based on data collected from an RTP system are described. Studying the DC response using the identified model led to a reconfiguration of the chamber geometry of the existing RTP system to more effectively distribute the light energy from the lamps     

Polysilicon capacitor failure during rapid thermal processing

Rapid thermal-processing-induced polysilicon capacitor failure is investigated. Polysilicon-SiO2-Si capacitors fail at the perimeter upon heating to temperatures in excess of 1050°C for a few seconds in vacuum or argon. Shorting occurs when the silicon grains deform due to surface energy-driven diffusion and extend over etch-damaged oxide surrounding the capacitor. The presence of oxygen or nitrogen during, or regrowth of the damaged oxide prior to, rapid thermal processing substantially reduces the failure rate.     

Nonlinear model reduction strategies for rapid thermal processingsystems

We present a systematic method for developing low order nonlinear models from physically based, large scale finite element models of rapid thermal processing (RTP) systems. These low order models are extracted from transient results of a detailed finite element model using the proper orthogonal decomposition (POD) method. Eigenfunctions obtained from the POD method are then used as basis functions in spectral Galerkin expansions of the governing partial differential equations solved by the finite element model to generate the reduced models. Simulation results with the reduced order models demonstrate good agreement with steady state and transient data generated from the finite element model, with an order of magnitude reduction in execution time     

Improvement in ultrathin rapid thermal oxide uniformity by thecontrol of gas flow

A methodology to improve the temperature uniformity for the wafer in a rapid thermal processing (RTP) system is presented. The work aims at the temperature compensation at the wafer surface by thermal convection. From simulation results of the flow field, it is seen that the cold gas, while flowing from the periphery of the wafer toward the wafer center, causes a lower pressure at and around the center. This lower pressure is due to the flow away of gas by buoyancy and it aggregates thermal nonuniformity. A technique is suggested that consists of suppressing the upward gas flow using a transparent quartz cap above the monitored wafer. Simulation and experimental results show that by implementing this technique, the temperature uniformity of the wafer is improved     

Defect generation and gettering during rapid thermal processing

The authors present results showing that deep-level transient spectroscopy (DLTS) is particularly efficient in identifying the origin of rapid thermal processing (RTP) related defects. It was found that defects are mostly related to residual impurities present in the as-grown silicon wafers or unintentionally introduced during high-temperature processing steps. It was shown, in particular, that these impurities can be thermally annealed out or neutralized by a hydrogenation process. In addition, the authors demonstrated that these impurities can be swept out of the active region of the device by a gettering effect during the RTP which is similar to that occurring in a classical thermal treatment     

In-situ processing using rapid thermal chemical vapor deposition

Metal-Oxide-Semiconductor Capacitors (MOSCAP’s) were fabricated using Rapid Thermal Processing (RTP) techniques. MOSCAP’s that received in-situ polysilicon gate deposition after oxide growth evinced significantly tighter oxide breakdown voltage distribution as compared to devices that received ex-situ polysilicon deposition. Capacitance-Voltage (C-V) measurements of electrically unstressed and stressed devices indicate that the oxide charge, interface state density, electron trapping, and interface state generation characteristics are identical, irrespective of the mode of polysilicon gate deposition. It is concluded that, while in-situ processing may be capable of reducing particle related defects, no improvement is seen in the intrinsic properties of the oxide itself.     

Thin polyoxide films grown by rapid thermal processing

The growth of thin (80-200 Å) oxide films by rapid thermal processing (RTP) on LPCVD poly and amorphous silicon is reported. Oxide growth kinetics are affected by dopant concentration, implant species, and preoxidation anneal conditions. Breakdown fields > 11 MV/ cm have been measured. Constant current stress measurements indicate a higher rate of negative charge trapping in oxides grown on top of polysilicon as compared to amorphous silicon.     

Design and modeling of rapid thermal processing systems

The concept of rapid thermal processing (RTP) has many potential applications in microelectronics manufacturing, but the details of chamber design, temperature dynamics, process control, and temperature measurement remain active areas of research. This paper discusses the design rules used in an RTP test bed installed at SEMATECH with respect to the placement of lamps and the geometry and reflectivity of the enclosure. The distribution of light across the wafer was modeled, and a theory fur the wafer's dynamic temperature response was derived analytically with a few simplifying assumptions, parameters for this model were estimated from experimental data to yield a set of linear ordinary differential equations with temperature dependent coefficients. This particular model form is convenient for control system design and analysis     

Steady-state thermal uniformity and gas flow patterns in a rapidthermal processing chamber

The steady-state temperature distribution and gas flow patterns in a rapid thermal processing system are calculated numerically for various process conditions. The results are verified by comparison to experimental epitaxial growth rate data. The gas flow patterns and temperature distributions depend strongly on pressure and ambient composition. Steady-state uniformity is found to be described to first order by the radiant uniformity at the wafer surface and substrate heat flow considerations alone. For high-thermal-uniformity systems, however, convective cooling does play an important role, approximately equal to that of edge losses