Strained‐SiGe Complementary MOSFETs Adopting Different Thicknesses of Silicon Cap Layers for Low Power and High Performance Applications

We introduce a strained‐SiGe technology adopting different thicknesses of Si cap layers towards low power and high performance CMOS applications. By simply adopting 3 and 7 nm thick Si‐cap layers in n‐channel and p‐channel MOSFETs, respectively, the transconductances and driving currents of both devices were enhanced by 7 to 37% and 6 to 72%. These improvements seemed responsible for the formation of a lightly doped retrograde high‐electron‐mobility Si surface channel in nMOSFETs and a compressively strained high‐hole‐mobility Si_0.8Ge_0.2 buried channel in pMOSFETs. In addition, the nMOSFET exhibited greatly reduced subthreshold swing values (that is, reduced standby power consumption), and the pMOSFET revealed greatly suppressed 1/f noise and gate‐leakage levels. Unlike the conventional strained‐Si CMOS employing a relatively thick (typically > 2 µm) Si_xGe_1‐x relaxed buffer layer, the strained‐SiGe CMOS with a very thin (20 nm) Si_0.8Ge_0.2 layer in this study showed a negligible self‐heating problem. Consequently, the proposed strained‐SiGe CMOS design structure should be a good candidate for low power and high performance digital/analog applications.     

Self-Aligned SiGe MOS-Gate FET with Modulation-Doped Quantum Wire Channel for Millimeter Wave Application

This paper describes a self-aligned SiGe MOS-gate field-effect transistor (FET) having a modulation-doped (MOD) quantum wire channel. An analytical model based on modified charge control equations accounting for the quantum wire channel, is presented predicting the transport characteristics of the MOS-gate MODFET structure. In particular, transport characteristics of devices having strained SiGe layers, realized on Si or Ge substrates, are computed. The transconductance g_m and unity-current gain cutoff frequency (f_T) are also computed as a function of the gate voltage V_G. The calculated values of f_T suggest the operation of one-dimensional SiGe MODFETs to be around 200 GHz range at 77°K, and 120 GHz at 300°K.     

High‐Performance,Air‐Stable,Top‐Gate,p‐Channel WSe2 Field‐Effect Transistor with Fluoropolymer Buffer Layer

High‐performance, air‐stable, p‐channel WSe₂ top‐gate field‐effect transistors (FETs) using a bilayer gate dielectric composed of high‐ and low‐k dielectrics are reported. Using only a high‐k Al₂O₃ as the top‐gate dielectric generally degrades the electrical properties of p‐channel WSe₂, therefore, a thin fluoropolymer (Cytop) as a buffer layer to protect the 2D channel from high‐k oxide forming is deposited. As a result, a top‐gate‐patterned 2D WSe₂ FET is realized. The top‐gate p‐channel WSe₂ FET demonstrates a high hole mobility of 100 cm²_­ V^?1 s^?1 and a I_ON/I_OFF ratio > 10⁷ at low gate voltages (V_GS ca. ?4 V) and a drain voltage (V_DS) of ?1 V on a glass substrate. Furthermore, the top‐gate FET shows a very good stability in ambient air with a relative humidity of 45% for 7 days after device fabrication. Our approach of creating a high‐k oxide/low‐k organic bilayer dielectric is advantageous over single‐layer high‐k dielectrics for top‐gate p‐channel WSe₂ FETs, which will lead the way toward future electronic nanodevices and their integration.     

Shallow and Undoped Germanium Quantum Wells: A Playground for Spin and Hybrid Quantum Technology

Buried‐channel semiconductor heterostructures are an archetype material platform for the fabrication of gated semiconductor quantum devices. Sharp confinement potential is obtained by positioning the channel near the surface; however, nearby surface states degrade the electrical properties of the starting material. Here, a 2D hole gas of high mobility (5 × 10⁵ cm² V^?1 s^?1) is demonstrated in a very shallow strained germanium (Ge) channel, which is located only 22 nm below the surface. The top‐gate of a dopant‐less field effect transistor controls the channel carrier density confined in an undoped Ge/SiGe heterostructure with reduced background contamination, sharp interfaces, and high uniformity. The high mobility leads to mean free paths ≈ 6 µm, setting new benchmarks for holes in shallow field effect transistors. The high mobility, along with a percolation density of 1.2 × 10¹¹cm^?2, light effective mass (0.09m_e), and high effective g‐factor (up to 9.2) highlight the potential of undoped Ge/SiGe as a low‐disorder material platform for hybrid quantum technologies.     

FABRICATION OF STRAINED-Si CHANNEL P-MOSFET’s ON ULTRA-THIN SiGe VIRTUAL SUBSTRATES

In the ultra-thin relaxed SiGe virtual substrates, a strained-Si channel p-type Metal Oxide Semiconductor Field Effect Transistor （p-MOSFET） is presented. Built on strained-Si/240nm relaxed-Si0.8 Ge0.2/ 100nm Low Temperature Si （LT-Si）/10nm S i buffer was grown by Molecular Beam Epitaxy （MBE）, in which LT-Si layer is used to release stress of the SiGe layer and made it relaxed. Measurement indicates that the strained-Si p-MOSFET＇s （L=4.2μm） transconductance and the hole mobility are enhanced 30% and 50% respectively, compared with that of conventional bulk-Si. The maximum hole mobility for strained-Si device is 140cm^2/Vs. The device performance is comparable to devices achieved on several μm thick composition graded buffers and relaxed-SiGe layer virtual substrates.     

Performance analysis of nanoscale GeSn MOSFETs for mixed-mode circuit applications

Using extensive numerical analysis we investigate the impact of Sn ranging 0–6% in compressively strained GeSn on insulator (GeSnOI) MOSFETs for mixed-mode circuit performance at channel lengths (L_g) ranging 100–20 nm with channel thickness values of 10 and 5 nm. Our results reveal that 10 nm thick Ge_0.94Sn_0.06 channel MOSFETs produce improvement of peak transconductance g_m, peak gain Av, peak cut-off frequency f_T and maximum frequency of oscillations f_max by 80.5%, 18.8%, 83.5% and 81.7%, respectively compared with equivalent GeOI device at L_g =20 nm. Furthermore, such devices exhibit 78.8% increase in ON-current I_ON while yield 44.5% reduction in delay as compared to Ge control devices enabling them attractive for logic applications. Thinning of the channel thickness from 10 to 5 nm increases peak Av, peak transconductance efficiency and reduces output conductance and OFF-current I_OFF while degrading other parameters in all GeSnOI and control Ge devices.     

Low Voltage and Ferroelectric 2D Electron Devices Using Lead‐Free BaxSr1‐xTiO3 and MoS2 Channel

Coupling between non‐toxic lead‐free high‐k materials and 2D semiconductors is achieved to develop low voltage field effect transistors (FETs) and ferroelectric non‐volatile memory transistors as well. In fact, low voltage switching ferroelectric memory devices are extremely rare in 2D electronics. Now, both low voltage operation and ferroelectric memory function have been successfully demonstrated in 2D‐like thin MoS₂ channel FET with lead‐free high‐k dielectric Ba_xSr_1‐xTiO₃ (BST) oxides. When the BST surface is coated with a 5.5‐nm‐ultrathin poly(methyl methacrylate) (PMMA)‐brush for improved roughness, the MoS₂ FET with BST (x = 0.5) dielectric results in an extremely low voltage operation at 0.5 V. Moreover, the BST with an increased Ba composition (x = 0.8) induces quite good ferroelectric memory properties despite the existence of the ultrathin PMMA layer, well switching the MoS₂ FET channel states in a non‐volatile manner with a ±3 V low voltage pulse. Since the employed high‐k dielectric and ferroelectric oxides are lead‐free in particular, the approaches for applying high‐k BST gate oxide for 2D MoS₂ FET are not only novel but also practical towards future low voltage nanoelectronics and green technology.     

High‐Performance n‐Channel Thin‐Film Field‐Effect Transistors Based on a Nanowire‐Forming Polymer

A new electrontransport polymer, poly{[N,N′‐dioctylperylene‐3,4,9,10‐bis(dicarboximide)‐1,7(6)‐diyl]‐alt‐[(2,5‐bis(2‐ethyl‐hexyl)‐1,4‐phenylene)bis(ethyn‐2,1‐diyl]} (PDIC8‐EB), is synthesized. In chloroform, the polymer undergoes self‐assembly, forming a nanowire suspension. The nanowire's optical and electrochemical properties, morphological structure, and field‐effect transistor (FET) characteristics are investigated. Thin films fabricated from a PDIC8‐EB nanowire suspension are composed of ordered nanowires and ordered and amorphous non‐nanowire phases, whereas films prepared from a homogeneous PDIC8‐EB solution consist of only the ordered and amorphous non‐nanowire phases. X‐ray scattering experiments suggest that in both nanowires and ordered phases, the PDIC8 units are laterally stacked in an edge‐on manner with respect to the film plane, with full interdigitation of the octyl chains, and with the polymer backbones preferentially oriented within the film plane. The ordering and orientations are significantly enhanced through thermal annealing at 200 °C under inert conditions. The polymer film with high degree of structural ordering and strong orientation yields a high electron mobility (0.10 ± 0.05 cm² V^?1 s^?1), with a high on/off ratio (3.7 × 10⁶), a low threshold voltage (8 V), and negligible hysteresis (0.5 V). This study demonstrates that the polymer in the nanowire suspension provides a suitable material for fabricating the active layers of high‐performance n‐channel FET devices via a solution coating process.     

Non‐Lithographic Fabrication of All‐2D α‐MoTe2 Dual Gate Transistors

As one of the emerging new transition‐metal dichalcogenides materials, molybdenum ditelluride (α‐MoTe₂) is attracting much attention due to its optical and electrical properties. This study fabricates all‐2D MoTe₂‐based field effect transistors (FETs) on glass, using thin hexagonal boron nitride and thin graphene in consideration of good dielectric/channel interface and source/drain contacts, respectively. Distinguished from previous works, in this study, all 2D FETs with α‐MoTe₂ nanoflakes are dual‐gated for driving higher current. Moreover, for the present 2D dual gate FET fabrications on glass, all thermal annealing and lithography processes are intentionally exempted for fully non‐lithographic method using only van der Waal's forces. The dual‐gate MoTe₂ FET displays quite a high hole and electron mobility over ≈20 cm² V^?1 s^?1 along with ON/OFF ratio of ≈10⁵ in maximum as an ambipolar FET and also demonstrates high drain current of a few tens‐to‐hundred μA at a low operation voltage. It appears promising enough to drive organic light emitting diode pixels and NOR logic functions on glass.     

Highly Connected Silicon–Copper Alloy Mixture Nanotubes as High‐Rate and Durable Anode Materials for Lithium‐Ion Batteries

Seeking high‐capacity, high‐rate, and durable anode materials for lithium‐ion batteries (LIBs) has been a crucial aspect to promote the use of electric vehicles and other portable electronics. Here, a novel alloy‐forming approach to convert amorphous Si (a‐Si)‐coated copper oxide (CuO) core–shell nanowires (NWs) into hollow and highly interconnected Si–Cu alloy (mixture) nanotubes is reported. Upon a simple H₂ annealing, the CuO cores are reduced and diffused out to alloy with the a‐Si shell, producing highly interconnected hollow Si–Cu alloy nanotubes, which can serve as high‐capacity and self‐conductive anode structures with robust mechanical support. A high specific capacity of 1010 mAh g^?1 (or 780 mAh g^?1) has been achieved after 1000 cycles at 3.4 A g^?1 (or 20 A g^?1), with a capacity retention rate of ≈84% (≈88%), without the use of any binder or conductive agent. Remarkably, they can survive an extremely fast charging rate at 70 A g^?1 for 35 runs (corresponding to one full cycle in 30 s) and recover 88% capacity. This novel alloy‐nanotube structure could represent an ideal candidate to fulfill the true potential of Si‐loaded LIB applications.     

Silicon‐Based Self‐Assemblies for High Volumetric Capacity Li‐Ion Batteries via Effective Stress Management

Silicon nanoparticles (Si NPs) have been considered as promising anode materials for next‐generation lithium‐ion batteries, but the practical issues such as mechanical structure instability and low volumetric energy density limit their development. At present, the functional energy‐storing architectures based on Si NPs building blocks have been proposed to solve the adverse effects of nanostructures, but designing ideal functional architectures with excellent electrochemical performance is still a significant challenge. This study shows that the effective stress evolution management is applied for self‐assembled functional architectures via cross‐scale simulation and the simulated stress evolution can be a guide to design a scalable self‐assembled hierarchical Si@TiO₂@C (SA‐SiTC) based on core–shell Si@TiO₂ nanoscale building blocks. It is found that the carbon filler and TiO₂ layer can effectively reduce the risk of cracking during (de)lithiation, ensuring the stability of the mechanical structure of SA‐SiTC. The SA‐SiTC electrode shows long cycling stability (842.6 mAh g^?1 after 1000 cycles at 2 A g^?1), high volumetric capacity (174 mAh cm^?3), high initial Coulombic efficiency (80.9%), and stable solid‐electrolyte interphase (SEI) layer. This work provides insight into the development of the structural stable Si‐based anodes with long cycle life and high volumetric energy density for practical energy applications.     

Surface passivation of high‐efficiency silicon solar cells by atomic‐layer‐deposited Al2O3

Atomic‐layer‐deposited aluminium oxide (Al₂O₃) is applied as rear‐surface‐passivating dielectric layer to passivated emitter and rear cell (PERC)‐type crystalline silicon (c‐Si) solar cells. The excellent passivation of low‐resistivity p‐type silicon by the negative‐charge‐dielectric Al₂O₃ is confirmed on the device level by an independently confirmed energy conversion efficiency of 20·6%. The best results are obtained for a stack consisting of a 30 nm Al₂O₃ film covered by a 200 nm plasma‐enhanced‐chemical‐vapour‐deposited silicon oxide (SiO_x) layer, resulting in a rear surface recombination velocity (SRV) of 70 cm/s. Comparable results are obtained for a 130 nm single‐layer of Al₂O₃, resulting in a rear SRV of 90 cm/s. Copyright © 2008 John Wiley & Sons, Ltd.     

Multicore–Shell Bi@N‐doped Carbon Nanospheres for High Power Density and Long Cycle Life Sodium‐ and Potassium‐Ion Anodes

Bismuth (Bi) is an attractive material as anodes for both sodium‐ion batteries (NIBs) and potassium‐ion batteries (KIBs), because it has a high theoretical gravimetric capacity (386 mAh g^?1) and high volumetric capacity (3800 mAh L^?1). The main challenges associated with Bi anodes are structural degradation and instability of the solid electrolyte interphase (SEI) resulting from the huge volume change during charge/discharge. Here, a multicore–shell structured Bi@N‐doped carbon (Bi@N‐C) anode is designed that addresses these issues. The nanosized Bi spheres are encapsulated by a conductive porous N‐doped carbon shell that not only prevents the volume expansion during charge/discharge but also constructs a stable SEI during cycling. The Bi@N‐C exhibits unprecedented rate capability and long cycle life for both NIBs (235 mAh g^?1 after 2000 cycles at 10 A g^?1) and KIBs (152 mAh g^?1 at 100 A g^?1). The kinetic analysis reveals the outstanding electrochemical performance can be attributed to significant pseudocapacitance behavior upon cycling.     

Applications and processing of SiGe and SiGe:C for high-speed HBT devices

The continued growth of high-speed-digital data transmission and wireless communications technology has motivated increased integration levels for ICs serving these markets. Further, the increasing use of portable wireless communications tools requiring long battery lifetimes necessitates low power consumption by the semiconductor devices within these tools. The SiGe and SiGe:C materials systems provide solutions to both of these market needs in that they are fully monolithically integratible with Si BiCMOS technology. Also, the use of SiGe or SiGe:C HBTs for the high-frequency bipolar elements in the BiCMOS circuits results in greatly decreased power consumption when compared to Si BJT devices.Either a DFT (graded Ge content across the base) or a true HBT (constant Ge content across the base) bipolar transistor can be fabricated using SiGe or SiGe:C. Historically, the graded profile has been favored in the industry since the average Ge content in the pseudomorphic base is less than that of a true HBT and, therefore, the DFT is tolerant of higher thermal budget processing after deposition of the base. The inclusion of small amounts of C (e.g. <0.5%) in SiGe is effective in suppressing the diffusion of B such that very narrow extremely heavily doped base regions can be built. Thus the f_T and f_max of a SiGe:C HBT/DFT are capable of being much higher than that of a SiGe HBT/DFT.The growth of the base region can be accomplished by either nonselective mixed deposition or by selective epitaxy. The nonselective process has the advantage of reduced complexity, higher deposition rate and, therefore, higher productivity than the selective epitaxy process. The selective epi process, however, requires fewer changes to an existing fabrication sequence in order to accommodate SiGe or SiGe:C HBT/DFT devices into the BiCMOS circuit.     

Full Energy Spectra of Interface State Densities for n‐ and p‐type MoS2 Field‐Effect Transistors

2D materials are promising to overcome the scaling limit of Si field‐effect transistors (FETs). However, the insulator/2D channel interface severely degrades the performance of 2D FETs, and the origin of the degradation remains largely unexplored. Here, the full energy spectra of the interface state densities (D_it) are presented for both n‐ and p‐ MoS₂ FETs, based on the comprehensive and systematic studies, i.e., full rage of channel thickness and various gate stack structures with h‐BN as well as high‐k oxides. For n‐MoS₂, D_it around the mid‐gap is drastically reduced to 5 × 10¹¹ cm^?2 eV^?1 for the heterostructure FET with h‐BN from 5 × 10¹² cm^?2 eV^?1 for the high‐k top‐gate. On the other hand, D_it remains high, ≈ 10¹³ cm^?2 eV^?1, even for the heterostructure FET for p‐MoS₂. The systematic study elucidates that the strain induced externally through the substrate surface roughness and high‐k deposition process is the origin for the interface degradation on conduction band side, while sulfur‐vacancy‐induced defect states dominate the interface degradation on valance band side. The present understanding of the interface properties provides the key to further improving the performance of 2D FETs.     

A New Carbazole‐Constructed Hyperbranched Polymer: Convenient One‐Pot Synthesis,Hole‐Transporting Ability,and Field‐Effect Transistor Properties

A new hyperbranched polymer ( HB‐car ), constructed fully by carbazole moieties, is successfully synthesized through a one‐pot Suzuki coupling reaction. The resultant polymer is well‐characterized, and its hole‐transporting ability is studied carefully. The device, in which HB‐car is utilized as a hole‐transporting layer and tris‐(8‐hydroxyquinoline) aluminum as an electron‐emitting layer as well as electron‐transporting layer, gives a much higher efficiency (3.05 cd A^–1), than that of a poly(N‐vinylcarbazole) based device (2.19 cd A^–1) under similar experimental conditions. The remarkable performance is attributed to its low energy barrier and enhanced hole‐drifting ability in the HB‐car based device. In addition, for the first time, a field‐effect transistor (FET) based on the hyperbranched polymer is fabricated, and the organic FET device shows that HB‐car is a typical p‐type FET material with a saturation mobility of 1 × 10^–5 cm² V^–1 s^–1, a threshold voltage of –47.1 V, and an on‐to‐off current ratio of 10³.     

Fully Transparent p‐MoTe2 2D Transistors Using Ultrathin MoOx/Pt Contact Media for Indium‐Tin‐Oxide Source/Drain

Since transition metal dichalcogenide (TMD) semiconductors are found as 2D van der Waals materials with a discrete energy bandgap, many 2D‐like thin field effect transistors (FETs) and PN diodes are reported as prototype electrical and optoelectronic devices. As a potential application of display electronics, transparent 2D FET devices are also reported recently. Such transparent 2D FETs are very few in report, yet no p‐type channel 2D‐like FETs are seen. Here, 2D‐like thin transparent p‐channel MoTe₂ FETs with oxygen (O₂) plasma‐induced MoO_x/Pt/indium‐tin‐oxide (ITO) contact are reported for the first time. For source/drain contact, 60 s short O₂ plasma and ultrathin Pt‐deposition processes on MoTe₂ surface are sequentially introduced before ITO thin film deposition and patterning. As a result, almost transparent 2D FETs are obtained with a decent mobility of ≈5 cm² V^?1 s^?1, a high ON/OFF current ratio of ≈10⁵, and 70% transmittance. In particular, for normal MoTe₂ FETs without ITO, O₂ plasma process greatly improves the hole injection efficiency and device mobility (≈60 cm² V^?1 s^?1), introducing ultrathin MoO_x between Pt source/drain and MoTe₂. As a final device application, a photovoltaic current modulator, where the transparent FET stably operates as gated by photovoltaic effects, is integrated.     

Variable Temperature Mobility Analysis of n‐Channel,p‐Channel,and Ambipolar Organic Field‐Effect Transistors

The temperature dependence of field‐effect transistor (FET) mobility is analyzed for a series of n‐channel, p‐channel, and ambipolar organic semiconductor‐based FETs selected for varied semiconductor structural and device characteristics. The materials (and dominant carrier type) studied are 5,5′′′‐bis(perfluorophenacyl)‐2,2′:5′,2″:5″,2′′′‐quaterthiophene ( 1 , n‐channel), 5,5′′′‐bis(perfluorohexyl carbonyl)‐2,2′:5′,2″:5″,2′′′‐quaterthiophene ( 2 , n‐channel), pentacene ( 3 , p‐channel); 5,5′′′‐bis(hexylcarbonyl)‐2,2′:5′,2″:5″,2′′′‐quaterthiophene ( 4 , ambipolar), 5,5′′′‐bis‐(phenacyl)‐2,2′: 5′,2″:5″,2′′′‐quaterthiophene ( 5 , p‐channel), 2,7‐bis((5‐perfluorophenacyl)thiophen‐2‐yl)‐9,10‐phenanthrenequinone ( 6 , n‐channel), and poly(N‐(2‐octyldodecyl)‐2,2′‐bithiophene‐3,3′‐dicarboximide) ( 7 , n‐channel). Fits of the effective field‐effect mobility (µ_eff) data assuming a discrete trap energy within a multiple trapping and release (MTR) model reveal low activation energies (E_As) for high‐mobility semiconductors 1 – 3 of 21, 22, and 30 meV, respectively. Higher E_A values of 40–70 meV are exhibited by 4 – 7 ‐derived FETs having lower mobilities (µ_eff). Analysis of these data reveals little correlation between the conduction state energy level and E_A, while there is an inverse relationship between E_A and µ_eff. The first variable‐temperature study of an ambipolar organic FET reveals that although n‐channel behavior exhibits E_A = 27 meV, the p‐channel regime exhibits significantly more trapping with E_A = 250 meV. Interestingly, calculated free carrier mobilities (µ₀) are in the range of ～0.2–0.8 cm² V^?1 s^?1 in this materials set, largely independent of µ_eff. This indicates that in the absence of charge traps, the inherent magnitude of carrier mobility is comparable for each of these materials. Finally, the effect of temperature on threshold voltage (V_T) reveals two distinct trapping regimes, with the change in trapped charge exhibiting a striking correlation with room temperature µ_eff. The observation that E_A is independent of conduction state energy, and that changes in trapped charge with temperature correlate with room temperature µ_eff, support the applicability of trap‐limited mobility models such as a MTR mechanism to this materials set.     

Alkyl‐Chain‐Length‐Independent Hole Mobility via Morphological Control with Poly(3‐alkylthiophene) Nanofibers

The field‐effect transistor (FET) and diode characteristics of poly(3‐alkylthiophene) (P3AT) nanofiber layers deposited from nanofiber dispersions are presented and compared with those of layers deposited from molecularly dissolved polymer solutions in chlorobenzene. The P3AT n‐alkyl‐side‐chain length was varied from 4 to 9 carbon atoms. The hole mobilities are correlated with the interface and bulk morphology of the layers as determined by UV–vis spectroscopy, transmission electron microscopy (TEM) with selected area electron diffraction (SAED), atomic force microscopy (AFM), and polarized carbon K‐edge near edge X‐ray absorption fine structure (NEXAFS) spectroscopy. The latter technique reveals the average polymer orientation in the accumulation region of the FET at the interface with the SiO₂ gate dielectric. The previously observed alkyl‐chain‐length‐dependence of the FET mobility in P3AT films results from differences in molecular ordering and orientation at the dielectric/semiconductor interface, and it is concluded that side‐chain length does not determine the intrinsic mobility of P3ATs, but rather the alkyl chain length of P3ATs influences FET diode mobility only through changes in interfacial bulk ordering in solution processed films.     

Fabrication and Shell Optimization of Synergistic TiO2‐MoO3 Core–Shell Nanowire Array Anode for High Energy and Power Density Lithium‐Ion Batteries

A novel synergistic TiO₂‐MoO₃ (TO‐MO) core–shell nanowire array anode has been fabricated via a facile hydrothermal method followed by a subsequent controllable electrodeposition process. The nano‐MoO₃ shell provides large specific capacity as well as good electrical conductivity for fast charge transfer, while the highly electrochemically stable TiO₂ nanowire core (negligible volume change during Li insertion/desertion) remedies the cycling instability of MoO₃ shell and its array further provides a 3D scaffold for large amount electrodeposition of MoO₃. In combination of the unique electrochemical attributes of nanostructure arrays, the optimized TO‐MO hybrid anode (mass ratio: ca. 1:1) simultaneously exhibits high gravimetric capacity (ca. 670 mAh g^?1; approaching the hybrid's theoretical value), excellent cyclability (>200 cycles) and good rate capability (up to 2000 mA g^?1). The areal capacity is also as high as 3.986 mAh cm^?2, comparable to that of typical commercial LIBs. Furthermore, the hybrid anode was assembled for the first time with commercial LiCoO₂ cathode into a Li ion full cell, which shows outstanding performance with maximum power density of 1086 W kg_total ^?1 (based on the total mass of the TO‐MO and LiCoO₂) and excellent energy density (285 Wh kg_total ^?1) that is higher than many previously reported metal oxide anode‐based Li full cells.