多元LDPC码与二元LDPC码的性能分析

为了比较多元LDPC码与二元LDPC码的性能,文章从校验矩阵、Tanner图、BP译码算法等方面将两者进行有效的分析,并结合具体的Monte Carlo仿真实验,得出多元LDPC码的性能确实优于等长度码长的二元LDPC码.     

一种兼容Turbo码的LDPC解码器

提出了一种兼容Turbo码的低密度校验码(LDPC)解码器,它可以将Turbo码完全转化为LDPC码来进行解码,由于采用了校验分裂方法来处理由Turbo码转化而来的LDPC码中所存在的短环,从而使其解码性能优于联合校验置信度传递(JCBP)算法0.8 dB,仅仅比Turbo码专用的BCJR算法损失约为1dB.本文提出的通用解码器,为多系统兼容通信设备的应用提供了一种新的、灵活方便的实现途径.     

一种引入积分修正的二维信息大数逻辑LDPC译码算法

为了解决基于可靠度的迭代大数逻辑译码(Modified Reliability-based Iterative Majority Logic Decoding, MRBI-MLGD)算法的错误平层问题,提出了一种基于大数逻辑的低密度奇偶校验(Low Density Parity Check, LDPC)译码算法。所提算法在译码函数中引入积分修正项,实现了基于二维信息修正的译码策略,可有效降低错误平层。此外,与基于二元译码信息的的迭代大数逻辑译码(Binary Message Majority Logic Decoding, BM-MLGD)算法不一样,所提算法可适用于不同列重的LDPC码。仿真结果表明,所提译码算法在整个工作信噪比区间内都具有稳定的译码性能,表现出更好的普适性和鲁棒性。     

基于可靠度差值特征的自适应判决多元LDPC译码算法

利用变量节点符号可靠度在迭代过程中的分布特征,提出了一种基于可靠度差值特征的自适应判决多元低密度奇偶校验（Low Density Parity Check,LDPC)译码算法。整个迭代过程划分为两个阶段,针对不同阶段节点可靠度的差值特征分别采用不同的判决策略:前期阶段,采用传统的基于最大可靠度的判决策略;后期阶段,根据最大、次大可靠度之间的差值特征,设计自适应的码元符号判决策略。仿真结果表明,所提算法在相当的译码复杂度前提下,能获得0.15~0.4 dB的性能增益。同时,对于列重较小的LDPC码,具有更低的译码错误平层。     

A dual-function mixed-signal circuit for LDPC encoding/decoding

We present a low power, dual-function encode/decode circuit for a class of reversible low-density parity-check codes. The circuit offers a small silicon footprint, by operating as an analog decoder and reusing resources to switch into a digital encode mode. In order to achieve this behaviour from a single circuit we have developed mode-switching gates. These logic gates are able to switch between analog (soft) and digital (hard) computation. Only a small overhead in circuit area is required to transform the analog decoder into a full codec. The encode operation can be performed two orders of magnitude faster than the decode operation, making the circuit suitable for full-duplex applications. The low power and small area of the circuit make it an attractive option for battery powered wireless devices. Circuit simulations indicate a decoding latency of with negligible SNR loss with respect to digital sum-product decoders.     

Concatenation of polar codes with three‐dimensional parity check (3D‐PC) codes to improve error performance over fading channels

In this paper, we concatenated of three‐dimensional parity check (3D‐PC) block and polar codes for improving error correction performance and bit error rate (BER). Three different sizes of 3D parity check blocks (4 × 4 × 4, 8 × 8 × 8, and 16 × 16 × 16) are used for polar code concatenation. The 4 × 4 × 4 block returns the best performance, but higher complexity of decoder is needed unlikely. The 8 × 8 × 8 has returned acceptable complexity and good performacne. The complexity of decoder is less in the case of 16 × 16 × 16 with slight performance. The performance of the 3D‐PC is reduced when the codewords length is increased. The experiment considered the presence of additive white Gaussian noise (AWGN) with Rayleigh and Rician fading environments. 3D‐PC and polar code concatenation is more precise with codewords of short length, whereas there is insufficient concatenation accuracy with longer codewords. The outcomes of this study contain comparison between AWGN, Rayleigh, and Rician environments. The AWGN is noticed to have a lesser negative impact on the performance of code. Furthermore, increasing the code length may slightly fill the gap of performance between the concatenated and none concatenated polar codes due to the impact of code length on parity check code performance. Simulation results showed the coding performance in case of the polar code with concatenation and without concatenation for different code lengths. Generally, the 3D‐PC polar code concatenation is drawn the optimal result in AWGN environments.     

Min-Sum Approximation Decoding of LDPC Codes with Adaptive Non-Uniform Quantization

To reduce the implementation complexity and mitigate the performance loss, an adaptive non- uniform quantized rain-sum approximation decoding for Low-density parity-check （LDPC） codes is proposed. The rain-sum approximation decoding is analyzed by density evolution. Since the probability density of variable nodes messages can be well approximated by Gaussian distri- bution, the density of variable nodes messages can be tracked by variance estimation during the iteration. Thus the non-uniform quantization scheme can be optimized ac- cordingly. Simulation results show that the adaptive nonuniform quantization scheme can achieve better error rate performance and faster decoding convergence than conven-tional non-uniform quantization and uniform quantization schemes.     

一种可快速编码的QC-LDPC码构造新方法

为解决LDPC码的编码复杂度问题,使其更易于硬件实现,提出了一种可快速编码的准循环LDPC码构造方法。该方法以基于循环置换矩阵的准循环LDPC码为基础,通过适当的打孔和行置换操作,使构造码的校验矩阵具有准双对角线结构,可利用校验矩阵直接进行快速编码,有效降低了LDPC码的编码复杂度。仿真结果表明,与IEEE 802.16e中的LDPC码相比,新方法构造的LDPC码在低编码复杂度的基础上获得了更好的纠错性能。     

An area efficient and high throughput multi-rate quasi-cyclic LDPC decoder for IEEE 802.11n applications

In this paper, an area efficient and high throughput multi-rate quasi-cyclic low-density parity-check (QC-LDPC) decoder for IEEE 802.11n applications is proposed. An overlapped message passing scheme and the non-uniform quantization scheme are incorporated to reduce the overall area and power of the proposed QC-LDPC decoder. In order to enhance the decoding throughput and reduce the size of memories storing soft messages, an improved early termination (ET) scheme and base matrix reordering technique is employed. These techniques significantly reduce the total number of decoding iterations and memory accessing conflicts without mitigating the decoding performance. Equipped with these techniques an area efficient and high throughput multi-rate QC-LDPC decoder is designed, simulated and implemented with Xilinx Virtex6 (XC6VLX760-2FF1760) for an irregular LDPC code of length 1944 and code rates (1/2–5/6) specified in IEEE 802.11n standard. With a maximum clock frequency of 574.136–587.458 MHz the proposed QC-LDPC decoder can achieve throughput in the range of 1.27–2.17 Gb/s for 10 decoding iterations. Furthermore, by using Cadence RTL compiler with UMC 130 nm VLSI technology, the core area of the proposed QC-LDPC decoder is found to be 1.42 mm² with a power dissipation in the range of 101.25–140.42 mW at 1.2 V supply voltage.     

未来宽带移动通信系统中LDPC码与OFDM技术的结合

OFDM多频波调制技术是未来高速数字通信系统的核心技术.在其实现中,必须结合优秀的前向纠错码(Forward-error Correction Code)以降低误码率.卷积码、里德-所罗门码以及Turbo码都已相继使用在OFDM系统中.文章提出将LDPC码与OFDM系统相结合,通过分析可以发现它具有比Turbo码与OFDM系统的结合更好的性能.文章的最后还将给出一个LDFC与OFDM系统结合的概念性通信系统一LDFC-COFDM系统.     

光通信系统中LDPC码的构造及其编译码算法分析

针对低密度奇偶校验（LDPC）码的相关理论和LDPC码自身特性以及光通信系统具有低噪声、高信噪比的传输特点进行分析后,提出了光通信系统中LDPC码型的构造方法,这为光通信系统中LDPC码型的构造和仿真分析奠定了基础。并对光通信系统中LDPC码的编译码算法进行了深入分析与研究,得到一些有利于降低其编译码算法复杂度的重要结论,这有助于降低其编译码器的设计与实现复杂度。     

New stopping criteria for iterative decoding of LDPC codes in H‐ARQ systems

Under severely unreliable channel, decoding of error‐correcting codes frequently fails, which requires a lot of computational complexity, especially, in the iterative decoding algorithm. In hybrid automatic repeat request systems, most of computation power is wasted on failed decoding if a codeword is retransmitted many times. Therefore, early stopping of iterative decoding needs to be adopted. In this paper, we propose a new stopping algorithm of iterative belief propagation decoding for low‐density parity‐check codes, which is effective on both high and low signal‐to‐noise ratio ranges and scalable to variable code rate and length. The proposed stopping algorithm combines several good stopping criteria. Each criterion is extremely simple and will not be a burden to the overall system. With the proposed stopping algorithm, it is shown via numerical analysis that the decoding complexity of hybrid automatic repeat request system with adaptive modulation and coding scheme can be fairly reduced. Copyright © 2012 John Wiley & Sons, Ltd.     

Variable non-uniform quantized belief propagation algorithm for LDPC decoding

Non-uniform quantization for messages in Low-Density Parity-Check（LDPC）decoding can reduce implementation complexity and mitigate performance loss.But the distribution of messages varies in the iterative decoding.This letter proposes a variable non-uniform quantized Belief Propagation（BP）algorithm.The BP decoding is analyzed by density evolution with Gaussian approximation.Since the probability density of messages can be well approximated by Gaussian distribution,by the unbiased estimation of variance,the distribution of messages can be tracked during the iteration.Thus the non-uniform quantization scheme can be optimized to minimize the distortion.Simulation results show that the variable non-uniform quantization scheme can achieve better error rate performance and faster decoding convergence than the conventional non-uniform quantization and uniform quantization schemes.     

高速相干光通信系统中水印辅助的低密度奇偶校验方案

为了研究水印辅助的低密度奇偶校验(LDPC)方 案在高速相干接收光通信系统 中的译码性能,提出了一种适用于相干光通信系统的水印符号辅助的LDPC前向纠错方案 ,与传统LDPC相比,可以大大提高相干接 收机的抗噪声能力。在100Gbit/s 16进制正 交幅度高制(16QAM)相干接收光通信系统上的仿真实验结果表明, 在误码率(BER)为10－9时, 所提出的前向纠错方案与传统LDPC相比 较,信噪比(SNR)增益提高了0.45dB ;同时,在相同BER下,水印符号辅助的LDPC方 案的译码迭代次数有很明显的降低。     

A new construction method of LDPC codes for optical transmission systems

Based on the construction method of systematically constructed Gallager (SCG)(4,k) code,a new improved construction method of low density parity check (LDPC) code is proposed.Compared with the construc...     

A multi-D trellis decoder for A 155 Mb/s concatenated codec

An implementation of a 16 state, rate 8/9 six-dimensional (6-D) 8PSK rotationally invariant trellis decoder for use in a concatenated codec is described. The concatenated codec allows transmission of STM-1 signals (at the 155.52 Mb/s information rate) over a 72 MHz satellite transponder. The inner trellis decoder is used with an outer (255,239) RS block decoder. The trellis decoder operates at 165.93 Mb/s and currently has an implementation loss of only 0.2 dB. The concatenated codec achieves a bit error ratio of 10^?10 at an Eb/N⁰ of 8.2 dB (assuming an ideal modem and AWGN channel). Details are given of many Viterbi decoding ‘tricks’ that were used in order to implement the main functions of the decoder on two 10,000 gate equivalent CMOS programmable gate arrays.     

Improved Reliability‐Based Iterative Decoding of LDPC Codes Based on Dynamic Threshold

A serial concatenated decoding algorithm with dynamic threshold is proposed for low‐density parity‐check codes with short and medium code lengths. The proposed approach uses a dynamic threshold to select a decoding result from belief propagation decoding and order statistic decoding, which improves the performance of the decoder at a negligible cost. Simulation results show that, under a high SNR region, the proposed concatenated decoder performs better than a serial concatenated decoder without threshold with an E_b/N₀ gain of above 0.1 dB.     

重量分布式约束的LDPC码性能研究

本文对"重量分布式约束的码集合内码性能"这一命题进行了初步研究,分别得到了码集合性能的上限和下限,本文给出了性能下限码的Fill-Shift构造方法,而且由LDPC码校验矩阵不变性可以对LDPC码的校验矩阵作必要的初等变换,这样可以在保持码性能不变的前提下降低编码复杂度和实现系统编码;此外,还可以利用该性质加强对重要信息符号的差错保护.     

Effects of LDPC Code on the BER Performance of MPSK System with Imperfect Receiver Components over Rician Channels

In this letter, we study the influence of receiver imperfections on bit error rate (BER) degradations in detecting low‐density parity‐check coded multilevel phase‐shift keying signals transmitted over a Rician fading channel. Based on the analytical system model which we previously developed using Monte Carlo simulations, we determine the BER degradations caused by the simultaneous influences of stochastic phase error, quadrature error, in‐phase‐quadrature mismatch, and the fading severity.     

一种混合多边缘型LDPC码密度进化算法

在二进制输入加性高斯白噪声信道下,研究了基于多边缘型低密度奇偶校验码（Multi-edge Low Density Parity Check,MET-LDPC）的密度进化算法。针对高斯近似算法在前期迭代中的不准确问题,提出了一种改进算法。在分析MET-LDPC码的密度进化的基础上,将全密度进化与高斯近似算法结合,通过设置切换限制条件,弥补早期迭代的不准确,提高编码阈值估计的准确性。仿真结果表明,与MET-LDPC全密度进化算法相比,所提算法可以有效提高编码阈值估计的准确性,对LDPC编码的设计有一定的参考价值。