Low-noise silicon carbide X-ray sensor with wide operating temperature range

A silicon carbide (SiC) sensor is presented with high energy resolution in X-ray spectroscopy over a wide temperature range (27-100/spl deg/C). The sensor, consisting of a Schottky barrier diode on high resistivity epitaxial SiC, is characterised by an extremely low noise due to its ultra-low reverse current density even at high operating temperature (15 pA/cm/sup 2/ at 27/spl deg/C and 0.5 nA/cm/sup 2/ at 100/spl deg/C). Equivalent noise charges as low as 17 electrons rms at 27/spl deg/C and 47 electrons rms at 100/spl deg/C have been measured, allowing X-ray spectroscopy with an energy resolution as low as 315 eV and 797 eV FWHM, respectively.     

Room-temperature 2.81-/spl mu/m continuous-wave operation of GaInAsSb-AlGaAsSb laser

GaInAsSb-AlGaAsSb multiple quantum-well (QW) lasers with an emission wavelength of 2.81 /spl mu/m are reported. The ridge waveguide lasers with highly strained QWs show continuous-wave laser emission up to 25/spl deg/C; in pulsed mode, the lasers operate up to 60/spl deg/C. For pulsed operation, a threshold current density of 360 A/cm/sup 2/ is found for devices with 30-/spl mu/m stripe width and 2-mm cavity length at room temperature. A low threshold current density at infinite length of 248 A/cm/sup 2/ is derived.     

High-performance singlemode InGaNAs/GaAs laser

Performance characteristics of an InGaNAs/GaAs ridge-waveguide in-plane laser diode, which is grown by molecular beam epitaxy, are reported. The laser emits at a wavelength of 1.262 /spl mu/m in a single lateral mode, launching an output up to 240 mW at 20/spl deg/C and 20 mW at 120/spl deg/C. The threshold is 15 mA at 20/spl deg/C, corresponding to a threshold current density of 313 A/cm/sup 2/.     

Si interlayer passivation on germanium MOS capacitors with high-/spl kappa/ dielectric and metal gate

We have demonstrated the advantages of silicon interlayer passivation on germanium MOS devices, with CVD HfO/sub 2/ as the high-/spl kappa/ dielectric and PVD TaN as the gate electrode. A silicon interlayer between a germanium substrate and a high-/spl kappa/ dielectric, deposited using SiH/sub 4/ gas at 580/spl deg/C, significantly improved the electrical characteristics of germanium devices in terms of low D/sub it/ (7/spl times/10/sup 10//cm/sup 2/-eV), less C- V hysteresis and frequency dispersion. Low leakage current density of 5/spl times/10/sup -7/ A/cm/sup 2/ at 1 V bias with EOT of 12.4 /spl Aring/ was achieved. Post-metallization annealing caused continuing V/sub fb/ positive shift and J/sub g/ increase with increased annealing temperature, which was possibly attributed to Ge diffusion into the dielectric during annealing.     

Low-Temperature Materials and Thin Film Transistors for Flexible Electronics

This paper addresses the low-temperature deposition processes and electronic properties of silicon based thin film semiconductors and dielectrics to enable the fabrication of mechanically flexible electronic devices on plastic substrates. Device quality amorphous hydrogenated silicon (a-Si:H), nanocrystalline silicon (nc-Si), and amorphous silicon nitride (a-SiN/sub x/) films and thin film transistors (TFTs) were made using existing industrial plasma deposition equipment at the process temperatures as low as 75/spl deg/C and 120/spl deg/C. The a-Si:H TFTs fabricated at 120/spl deg/C demonstrate performance similar to their high-temperature counterparts, including the field effect mobility (/spl mu//sub FE/) of 0.8 cm/sup 2/V/sup -1/s/sup -1/, the threshold voltage (V/sub T/) of 4.5 V, and the subthreshold slope of 0.5 V/dec, and can be used in active matrix (AM) displays including organic light emitting diode (OLED) displays. The a-Si:H TFTs fabricated at 75/spl deg/C exhibit /spl mu//sub FE/ of 0.6 cm/sup 2/V/sup -1/s/sup -1/, and V/sub T/ of 4 V. It is shown that further improvement in TFT performance can be achieved by using n/sup +/ nc-Si contact layers and plasma treatments of the interface between the gate dielectric and the channel layer. The results demonstrate that with appropriate process optimization, the large area thin film Si technology suits well the fabrication of electronic devices on low-cost plastic substrates.     

Sub-500/spl deg/C solid-phase epitaxy of ultra-abrupt p/sup +/-silicon elevated contacts and diodes

A well-controlled low-temperature process, demonstrated from 350/spl deg/C to 500/spl deg/C, has been developed for epitaxially growing elevated contacts and near-ideal diode junctions of Al-doped Si in contact windows to the Si substrate. A physical-vapor-deposited (PVD) amorphous silicon layer is converted to monocrystalline silicon selectively in the contact windows by using a PVD aluminum layer as a transport medium. This is a solid-phase-epitaxy (SPE) process by which the grown Si is Al-doped to at least 10/sup 18/ cm/sup -3/. Contact resistivity below 10/sup -7/ /spl Omega//spl middot/cm/sup 2/ is achieved to both p/sup -/ and p/sup +/ bulk-silicon regions. The elevated contacts have also been employed to fabricate p/sup +/-n diodes and p/sup +/-n-p bipolar transistors, the electrical characterization of which indicates a practically defect-free epitaxy at the interface.     

Characterization of the temperature sensitivity of gain and recombination mechanisms in 1.3-/spl mu/m AlGaInAs MQW lasers

The potential of 1.3-/spl mu/m AlGaInAs multiple quantum-well (MQW) laser diodes for uncooled operation in high-speed optical communication systems is experimentally evaluated by characterizing the temperature dependence of key parameters such as the threshold current, transparency current density, optical gain and carrier lifetime. Detailed measurements performed in the 20/spl deg/C-100/spl deg/C temperature range indicate a localized T/sub 0/ value of 68 K at 98/spl deg/C for a device with a 2.8 /spl mu/m ridge width and 700-/spl mu/m cavity length. The transparency current density is measured for temperatures from 20/spl deg/C to 60/spl deg/C and found to increase at a rate of 7.7 A/spl middot/cm/sup -2//spl middot/ /spl deg/C/sup -1/. Optical gain characterizations show that the peak modal gain at threshold is independent of temperature, whereas the differential gain decreases linearly with temperature at a rate of 3/spl times/10/sup -4/ A/sup -1//spl middot//spl deg/C/sup -1/. The differential carrier lifetime is determined from electrical impedance measurements and found to decrease with temperature. From the measured carrier lifetime we derive the monomolecular ( A), radiative (B), and nonradiative Auger (C) recombination coefficients and determine their temperature dependence in the 20/spl deg/C-80/spl deg/C range. Our study shows that A is temperature independent, B decreases with temperature, and C exhibits a less pronounced increase with temperature. The experimental observations are discussed and compared with theoretical predictions and measurements performed on other material systems.     

Thin-film transistors on plastic and glass substrates using silicon deposited by microwave plasma ECR-CVD

Thin-film transistors (TFTs) were fabricated on polyimide and glass substrates at low temperatures using microwave ECR-CVD deposited amorphous and nanocrystalline silicon as active layers. The amorphous Si TFT fabricated at 200 /spl deg/C on the polyimide foil had a saturation region field effect mobility of 4.5 cm/sup 2//V-s, a linear region mobility of 5.1 cm/sup 2//V-s, a threshold voltage of 3.7 V, a subthreshold swing of 0.69 V/decade, and an ON/OFF current ratio of 7.9 /spl times/ 10/sup 6/. This large mobility and high ON/OFF current ratio were attributed to the high-quality channel materials with less dangling bond defect states. Nanocrystalline Si TFTs fabricated on glass substrates at 400 /spl deg/C showed a saturation region mobility of 14.1 cm/sup 2//V-s, a linear region mobility of 15.3 cm/sup 2//V-s, a threshold voltage of 3.6 V, and an ON/OFF current ratio of 6.7 /spl times/ 10/sup 6/. TFT performance was mostly independent of substrate type when fabrication conditions were the same.     

Anodic Oxidation of Si in Oxygen/Chlorine Plasma

By adding a few percent of chlorine to oxygen plasma, the anodization rate of Si was enhanced; for example, the rate was doubled for oxygen containing 3-percent chlorine. With a chlorine concentration of 1.5 percent, the density of trap states at the Si-SiO/sub 2/ interface was reduced from 7 X 10/sup 11//cm/sup 2//spl dot/eV to 5 X 10/sup 11//cm/sup 2/ /spl dot/eV at the midgap of Si; after annealing at 800/spl deg/C in argon for 60 min, it was reduced to 8 X 10/sup 10//cm/sup 2//spl dot/eV, and did not return to the original value after heating the specimen to 800/spl deg/C. The density and capture cross section of traps in plasma-anodic oxide were also measured using the constant-current avalanche-injection method. The number of electron traps with small cross sections in plasma-anodic SiO/sub 2/ films was reduced by annealing them at 800/spl deg/C in argon, but SiO/sub 2/ films which were anodized in oxygen/chlorine plasma showed an increase of trap density under the same annealing condition.     

Low-threshold operation of 1.34-/spl mu/m GaInNAs VCSEL grown by MOVPE

Low-threshold operation was demonstrated for a 1.34-/spl mu/m vertical-cavity surface-emitting laser (VCSEL) with GaInNAs quantum wells (QWs) grown by metal-organic vapor-phase epitaxy. Optimizing the growth conditions and QW structure of the GaInNAs active layers resulted in edge-emitting lasers that oscillated with low threshold current densities of 0.87 kA/cm/sup 2/ at 1.34 /spl mu/m and 1.1 kA/cm/sup 2/ at 1.38 /spl mu/m, respectively. The VCSEL had a low threshold current of 2.8 mA and a lasing wavelength of 1.342 /spl mu/m at room temperature and operated up to 60/spl deg/C.     

Large domains of continuous grain silicon on glass substrate for high-performance TFTs

Structural and electronic properties of continuous grain (CG) silicon fabricated by the low temperature catalyst-assisted solid-phase crystallization, was investigated by comparing it with those of so-called low-temperature polycrystalline silicon (LTPS). CG silicon showed a very large domain size, up to 15 /spl mu/m, whereas the size of conventional LTPS is typically less than 1 /spl mu/m. Misorientation angles at the grain boundaries for CG silicon were found mostly to be less than 10/spl deg/ in contrast to that between 30 and 60/spl deg/ for the LTPS. In addition, the lattice images at the grain boundary of CG silicon are almost aligned regularly, leaving only a few stacking faults. The trap state density at the grain boundaries was evaluated to be 4.5/spl times/10/sup 11//cm/sup 2/ by the modified Levinson analysis of CG silicon thin-film transistors (TFTs), which is less than half of the value for the conventional LTPS. It was concluded that the CG silicon with larger domains and lower misoriented grain boundaries has significantly higher potential for the lower trap state density at the grain boundaries and higher performance of CG silicon-TFTs over the LTPS-TFTs.     

Complementary metal-oxide-semiconductor thin-film transistor circuits from a high-temperature polycrystalline silicon process on steel foil substrates

We fabricated CMOS circuits from polycrystalline silicon films on steel foil substrates at process temperatures up to 950/spl deg/C. The substrates were 0.2-mm thick steel foil coated with 0.5-/spl mu/m thick SiO/sub 2/. We employed silicon crystallization times ranging from 6 h (600/spl deg/C) to 20 s (950/spl deg/C). Thin-film transistors (TFTs) were made in either self-aligned or nonself-aligned geometries. The gate dielectric was SiO/sub 2/ made by thermal oxidation or from deposited SiO/sub 2/. The field-effect mobilities reach 64 cm/sup 2//Vs for electrons and 22 cm/sup 2//Vs for holes. Complementary metal-oxide-silicon (CMOS) circuits were fabricated with self-aligned TFT geometries, and exhibit ring oscillator frequencies of 1 MHz. These results lay the groundwork for polycrystalline silicon circuitry on flexible substrates for large-area electronic backplanes.     

Continuous-wave operation of quantum cascade laser emitting near 5.6 /spl mu/m

Buried heterostructure quantum cascade lasers emitting at 5.64 /spl mu/m are presented. Continuous-wave (CW) operation has been achieved at -30/spl deg/C for junction down mounted devices with both facets coated. A 750 /spl mu/m-long laser exhibited 3 mW of CW power with a threshold current density of 5.4 kA/cm/sup 2/.     

Oxide-silicon-oxide buffer structure for ultralow temperature polycrystalline silicon thin-film transistor on plastic substrate

A novel oxide-silicon-oxide buffer structure to prevent damage to a plastic substrate in an ultralow temperature (<120/spl deg/C) polycrystalline silicon thin-film transistor (ULTPS TFT) process is presented. Specifically, an amorphous silicon film was inserted as an absorption layer into buffer oxide films. The maximum endurable laser energy was increased from 200 to 800 mJ/cm/sup 2/. The fabricated ULTPS nMOS TFT showed a performance with mobility of 30 cm/sup 2//Vs.     

Improvement of voltage linearity in high-/spl kappa/ MIM capacitors using HfO/sub 2/-SiO/sub 2/ stacked dielectric

It is demonstrated that the voltage coefficients of capacitance (VCC) in high-/spl kappa/ metal-insulator-metal (MIM) capacitors can be actively engineered and voltage linearity can be significantly improved maintaining high capacitance density, by using a stacked insulator structure of high-/spl kappa/ and SiO/sub 2/ dielectrics. A MIM capacitor with capacitance density of 6 fF/spl mu/m/sup 2/ and quadratic VCC of only 14 ppm/V/sup 2/ has been demonstrated together with excellent frequency and temperature dependence (temperature coefficients of capacitance of 54 ppm /spl deg/C) as well as low leakage current of less than 10 nA/cm/sup 2/ up to 4 V at 125 /spl deg/C.     

Effect of annealing on GaN-insulator interfaces characterized by metal-insulator-semiconductor capacitors

GaN metal-oxide-semiconductor (MOS) capacitors have been used to characterize the effect of annealing temperature and ambient on GaN-insulator interface properties. Silicon dioxide was deposited on n-type GaN at 900 /spl deg/C by low-pressure chemical vapor deposition and MOS capacitors were fabricated. The MOS capacitors were used to characterize the GaN-SiO/sub 2/ interface with a low interface-state density of 3 /spl times/ 10/sup 11/ cm/sup -2/eV/sup -1/ at 0.25 eV below the conduction band edge, even after annealing in N/sub 2/ at temperatures up to 1100 /spl deg/C; however, insulator properties were degraded by annealing in NO and NH/sub 3/ at 1100 /spl deg/C.     

High-performance poly-Si TFTs made by Ni-mediated crystallization through low-shot laser annealing

High-performance polycrystalline silicon (poly-Si) thin-film transistors (TFTs) have been fabricated using metal-induced crystallization followed by laser annealing (L-MIC). Laser annealing after MIC was found to yield a major improvement to the electrical characteristics of poly-Si TFTs. At a laser fluence of 330 mJ/cm/sup 2/, the field effect mobility increased from 71 to 239 cm/sup 2//Vs, and the minimum leakage current reduced from around 3.0/spl times/10/sup -12/ A//spl mu/m to 2.9/spl times/10/sup -13/ A//spl mu/m at a drain voltage of 5 V. In addition, the dependence of the TFT characteristics on the laser energy density was much weaker than that for conventional excimer laser annealed poly-Si TFTs.     

High-Pressure Oxidation for Thin Gate InsuIator Process

High-pressure oxidation of silicon was performed at a pressure of 8.9 kg/cm/sup 2/ at a temperature range of 650 to 950/spl deg/C. The oxidation temperature dependence of the film density, refractive index, chemical etching rate, and residual stress was measured. The film density of the oxide film was found to increase with decreasing oxidation temperature. The refractive index of the film also increased with decreasing oxidation temperature. The residual stress was found to be dependent on the oxidation temperature. The dielectric breakdown strength of the oxide film was measured by the voltage ramping method. The defect density of the oxide film calculated from the distribution of dielectric breakdown strength slightly decreased with decreasing oxidation temperature. The surface-state density of the oxide film was about 1.1 X 10/sup 11/ cm/sup -2/ throughout the oxidation temperature range. The oxide grown on a doped polysilicon layer at a temperature of 750/spl deg/C was five times as thick as the oxide simultaneously grown on the silicon substrate. The high-pressure and low-temperature oxidation was applied to the fabrication process of a device with a double polysilicon layer structure.     

High performance quantum dot lasers on GaAs substrates operating in 1.5 /spl mu/m range

Stacked InAs/InGaAs quantum dots are used as an active media of metamorphic InGaAs-InGaAlAs lasers grown on GaAs substrates by molecular beam epitaxy. High quantum efficiency (/spl eta//sub i/>60%) and low internal losses (/spl alpha/<3-4 cm/sup -1/) are realised. The transparency current density per single QD layer is estimated as /spl sim/70 A/cm/sup 2/ and the characteristic temperature is 60 K (20-85/spl deg/C). The emission wavelength exceeds 1.51 /spl mu/m at temperatures above 60/spl deg/C.     

High-quality 1.3 /spl mu/m GaInNAs single quantum well lasers grown by MBE

High-quality 1.3 /spl mu/m GaInNAs/GaNAs single quantum well lasers grown by molecular beam epitaxy are reported. The broad area lasers show a record low threshold current density of 318 A/cm/sup 2/ for a cavity length of 1 mm, a transparent current density of 84 A/cm/sup 2/, and a characteristic temperature of 103 K from 8 to 70/spl deg/C.