谈英飞凌1ED020I12在IGBT驱动电路中的应用

介绍英飞凌磁隔离驱动芯片1ED020I12的基本组成及主要特性;详细描述了1ED020I12在IGBT驱动电路中的工作过程及其设计要点,并指出IGBT驱动电路设计过程中需要注意的问题及解决方法。     

大功率IGBT驱动模块2ED300的特性及其应用

针对大功率IGBT的驱动问题,详细介绍了一种大功率IGBT专用驱动模块2ED300的内部结构、参数设置及性能特点。以驱动800A/1200V的IGBT为例,设计了2ED300在直接模式下的外围应用电路。并对应用中需要注意的关键问题进行了分析和讨论,最后给出了实际的驱动波形。     

自举式2ED020I12-F芯片在IGBT驱动电路中的应用

介绍了自举式2ED020112-F驱动芯片的内部结构和特点,对其典型应用电路做了详尽的分析,提出了自举电路中二极管和自举电容的计算方法、电流检测电路、负压电路设计方法以及应用中的一些抗干扰技术,并在实际应用中验证了这种驱动芯片性能好、体积小、价格低、可靠性高等特点。     

两种典型拓扑功率驱动电路的介绍

本文介绍了两种典型拓扑的功率驱动电路,一种为半桥功率驱动器IR2114/IR2214,另一种为单通道隔离驱动器1ED020I12FTA.     

一种用于光隔离IGBT栅极驱动的智能型LED驱动电路

采用双极型工艺设计了一种智能型高速LED驱动电路,可用于光隔离IGBT栅极驱动芯片的输入驱动。该设计采用一种新型逻辑门结构来实现信号传输、故障反馈以及外部置位等功能,同时达到降低信号传输延迟时间的目的。测试结果表明,在常温条件下,LED驱动电路的输入信号传输延迟时间为70 ns,复位信号有效到故障消除的延迟时间为4.59μs。所设计的驱动电路能够满足光耦隔离IGBT栅极驱动芯片的使用要求。     

面向小功率驱动应用的新型SOI驱动器和SmartPACK／Smart PIM模块

本文基于SOI技术,开发了一款新型的600V/0.3A 6-pack IGBT/MOSFET驱动器芯片.此款名为6ED003L06-F的芯片集成了三相电平转换、门极驱动和电路保护等诸多特性，在缩小芯片尺寸的同时也提高了性能，例如抗反相瞬态电压的鲁棒性等。另外，本文还利用该SOI驱动芯片开发了SmartPACK/SmartPIM系列新型IPM模块，该模块在一块基于DCB层的底板上集成了SOI驱动器，600V IGBT3和自举功能，并且无须支承板。这种IPM可对应6A-12A的额定电流，同时具有结构紧凑、成本低廉、操作简单等优点，适用于各类小功率驱动特别是消费类驱动应用。     

弧流放电用功率直流电源的设计和实现

介绍了一种弧流放电用功率直流电源的设计方案和实现,该电源满载输出功率为120kW（400V/300A）,调节部分采用传统的Buck电路和高频全桥逆变电路,研究和设计了50kV隔离的高频变压器。IGBT驱动控制芯片采用2SD315A驱动模块,实现了电源短路、过流时高速保护功能。     

一种紧凑型全桥DC-DC隔离电源设计

针对半桥IGBT集成驱动板上隔离电源及驱动板负载的特点,设计了一种两组磁芯共用一组高频全桥开关的DC-DC隔离电源。简洁的电路产生4路全桥驱动脉冲信号,无需隔离,实现了板上电源的紧凑设计,提高了功率密度。对关键信号的产生进行了仿真实验,结果表明,该电源电路简洁、高效、可靠,与IGBT半桥集成驱动板达到了良好的结合。     

基于I2C总线电子万年历的设计与实现

本文基于I2C总线,设计了电子万年历计时系统,给出了系统的硬件组成电路和软件设计方法.该系统以P89V51RB2作为系统主控芯片,飞利浦PCF8563实时时钟芯片构成时钟电路模块,用ZLG7290专用显示、按键驱动芯片构成显示电路模块和按键电路模块.与同类产品最大的不同的是使用了ZLG7290芯片,并利用I2C总线通信...     

镁合金微弧氧化电源驱动电路的可靠性分析

微弧氧化是一种新型的表面处理方法,利用该电路可输出双端不对称的高压脉冲,且脉冲幅值、频率、占空比均在一定范围内连续可调。本文首先介绍了微弧氧化电源技术的发展现状,然后对试验中使用过的几种IGBT驱动模块M57959、2ED300、2SD315 3种驱动电路的结构、工作原理和使用性能做了详细分析对比。实验表明,Eupec系列的2ED300驱动电路结构简单,可靠性高,适用于大功率微弧氧化电源的驱动。     

An Improved Switch Compensation Technique for Inverted R-2R Ladder DACs

Many recent applications are based on DSPs interfaced to analog I/0s with data converters. In this context, high-performance DACs have become crucial building blocks. The current-steering-flash DAC architecture is the most popular architecture for speed demanding applications. Although limited by component mismatches, resolution of these converters is typically enhanced by calibration solutions such as laser trimming or corrective active circuitry. Dynamic performances, on the other hand, are strongly dependent on switch design and operation which can easily spoil even the best static accuracy level at higher speeds. For this reason, much effort is concentrated on the design of clean switching processes to optimize signal to noise ratios delivered at the output of the DAC. In this paper, we present a novel switch sizing and compensation technique for inverted R-2R ladder DACs. While traditional switch compensation in the ladder leads to very large switch devices steering MSBs currents, our method allows current-steering with reduced equally sized switches. Results of 12-b DAC test chips fabricated in a 0.18 $mu{hbox {m}}$ process show that this new technique allows significant area savings, without impairing static accuracy. Other improvements brought by this technique include simplified switch driving circuitry and improved settling time.      

一种新型I2C总线彩电白平衡自动调整仪

介绍一种采用独立仪器机箱，江集白场信号发生器、测量、自动调整、显示为一体的新型Ｉ＾２Ｃ总线彩电白平衡自动调整仪，适合东芝ＴＢ系列、三洋ＬＡ系列等机芯的Ｉ＾２Ｃ总线彩电的白平衡自动调整，它在满足质量要求的前提下，具有快速（７～８ｓ／台）和高通过率（９９．６％）等特点。介绍该仪器的调整原理、硬件结构以及仿真手工调整的自动调整策略等软件设计方法。     

A mixed EFL/I/SUP 2/L digital telecommunication integrated circuit

A bipolar integrated circuit has been designed as part of a VLSI upgrade of an existing digital switching circuit. The chip exploits the OXIL (oxide isolated) process which makes it possible to use both high-gain `up' and `down' devices, for I/SUP 2/L (integrated injection logic) and EFL (emitter function logic) respectively. This allowed the circuit designers to tailor power consumption, circuit speed, and gate density as needed. In particular, the high-speed properties of EFL were utilized in the control section to provide accurate timing signals and satisfy tight propagation delay requirements in the register section. I/SUP 2/L, because of its greater density and low power, was used in the gate-intensive register sections. Another novel feature is the treatment of bus lines (up to 250 fanout) such as clock, clear, etc., in the I/SUP 2/L sections. The common multiline I/SUP 2/L drive problem has been overcome by using high-drive translators from EFL circuitry and a single pullup resistor per bus line to provide switched currents to all gates on that line.     

Common gate cross-coupled differential amplifier for near-field sensors

A differential amplifier with an input stage of a common gate cross-coupled differential type is presented. The first and the two other common source differential stages are connected via single-ended source follower type level shifting buffers. Feedback circuitry is added to compensate the offset owing to the process, temperature and supply mismatches of the transistors at the input differential stage. The amplifier is designed using OMMIC ED02AH GaAs technology having a semi-insulating substrate which is advantageous for monolithic integration of low-loss passive elements such as loops. The realised amplifier achieves a gain of greater than 28 dB over a bandwidth of 10 GHz.     

计算机与I^2C总线间的接口与编程

Ｉ＾２Ｃ总线已成为集成电路器件间数据通信的一种协议，具有简单方便，智能快 特点。本文在介绍其工作原理的基础上设计了一种计算机与Ｉ＾２Ｃ总线间的接口电路对软件编程作了说明。     

模拟路标识别及其FPGA实现

针对路标信号的多变性给驾驶员行车途中带来诸多隐患,提出了基于FPGA辅助驾驶中的模拟路标识别系统,该系统实现了实时检测和识别路标信号,并将识别结果显示出来,以便驾驶员做出相应的响应,在一定程度上维护了交通安全。实验结果表明,基于硬件编程语言Verilog设计的硬件电路可快速、稳定地对图像进行二值化处理,且该系统可实现识别向左、向右、禁止停车、禁止通行4种路标,对辅助驾驶系统的研究具有一定的意义。     

高分辨率大面阵CCD相机的高帧频设计

目前采用高分辨率全帧CCD FTF4052作图像传感器的航拍相机帧频一般不超过1 f/s,不能满足高帧频应用.文章对FTF4052基本驱动电路进行了改进,利用CCD四个输出放大器进行同时输出,使最高帧频达到了3.4 f/s.介绍了四路输出时CCD驱动时序、前端处理电路、直流偏置电路、接口电路等的设计.改进后的驱动电路能满足多种航拍相机的应用要求.