Implementation of an interleaved pulse‐width modulation converter for renewable energy conversion

This paper presents an interleaved soft switching converter to achieve the features of zero voltage switching (ZVS) turn‐on for power switches, zero current switching turn‐off for rectifier diodes at full load, less transformer secondary winding with full‐wave diode rectifier topology, and balance primary currents with series connection of the transformer secondary windings. Two circuit modules are adopted in the proposed circuit, and they are operated with an interleaved pulse‐width modulation. Thus, ripple currents at the input and output sides are reduced. In each module, two ZVS converters using the same switches are operated with interleaved half switching cycle. The secondary windings of transformers are connected in series in order to ensure that the primary side currents are balanced. The full‐wave diode rectifier topology is used on the output side such that the voltage stress of rectifier diodes equals output voltage, rather than being two times the output voltage as in a conventional center‐tapped rectifier topology. Laboratory experiments with a 1000‐W prototype are provided to describe the effectiveness of the proposed converter. Copyright © 2011 John Wiley & Sons, Ltd.     

An advanced VHDL‐AMS PiN diode model: towards simulation‐based design of power converters

This paper focuses on the modeling of a power PiN diode. The focal point basis is the dependence on temperature. The PiN diode remains a difficult device to model mainly during switching transients. An advanced PiN diode temperature‐dependent model is developed and implemented in VHDL‐AMS. Heterogeneous simulation scheme including the circuit wiring parasitic components, the probe effects and the dependent diode models is successfully simulated using SIMPLORER simulator. Experimental data of several commercial PiN diodes are compared to simulation results at different temperature levels. A good rate of consistency is found. Copyright © 2014 John Wiley & Sons, Ltd.     

High‐efficiency grid‐connected inverter topology for low‐power photovoltaic applications

For low‐power applications, such as household photovoltaic panels, the efficiency and reliability of the distributed generation system is an important issue. A high‐efficiency inverter topology derived from the normal full‐bridge circuit is proposed for grid‐connected photovoltaic applications. In the proposed topology, a couple of diodes are added in parallel with the grid‐frequency switches as freewheeling diodes working during the positive and negative half‐cycles of the utility voltage, respectively, thus preventing the output current from flowing through the body diodes of switches. Because of its natural configuration, simple operation, and three‐level function, the proposed topology features a high level of efficiency and reliability over a wide voltage range, and allows the best cost–effective ratio. These characteristics are compared with those of other existing advanced topologies, followed by a theoretical analysis on the output filter and the implemented circuit of modulation scheme. Experimental results from a 3 kW hardware prototype verify the feasibility of the proposed solution. © 2016 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

A matrix pencil approach to the local stability analysis of non‐linear circuits

This paper addresses local stability issues in non‐linear circuits via matrix pencil theory. The limitations of the state–space approach in circuit modelling have led to semistate formulations, currently framed within the context of differential‐algebraic equations (DAEs). Stability results for these DAE models can be stated in terms of matrix pencils, avoiding the need for state–space reductions which are not advisable in actual circuit simulation problems. The stability results here presented are applied to electrical circuits containing non‐linear devices such as Josephson junctions or MOS transistors. Copyright © 2004 John Wiley & Sons, Ltd.     

Wireless power charger for wearable medical devices with in‐band communication

A wireless power charger integrated circuit has been developed for wearable medical devices in a 0.18‐µm Bipolar, Complementary metal‐oxide‐semiconductor, and Lightly‐Doped Metal‐Oxide‐Semiconductor (BCDMOS) process. A passive full‐wave rectifier consisting of Schottky diodes and cross‐coupled n‐type Metal‐Oxide‐Semiconductor (nMOS) transistors performs the alternating current to direct current power conversion without any reverse leakage current. To charge a battery, a linear charger circuit follows the passive rectifier instead of a switching charger circuit for the small form factor of wearable medical devices. An in‐band communication circuit notifies the proper connection of the wireless power receiver and the battery charging status to the charging pad (wireless power transmitter) through the wireless power transmission channel. The wireless power charger integrated circuit occupies 1.44‐mm² silicon area and shows 31.7% power efficiency when the charging current is 26.6 mA. Copyright © 2015 John Wiley & Sons, Ltd.     

Effects of magnetic field on the carrier density distribution of semiconductor power device operated in pulsed power conditions

Turn‐on characteristics of semiconductor power devices are evaluated under external magnetic field to study the effects of external magnetic field generated in a pulsed power circuit. Two pin diodes that have a basic structure of power devices are connected in parallel and driven by a pulsed voltage source. It was found the magnetic field applied to one diode in the perpendicular direction of current‐flow changed the current balance between the diodes. Besides the on‐resistance of a diode was increased under external magnetic field. The carrier‐density distribution inside of the diodes was measured by using a free carrier absorption method. The data show that the carrier‐density distribution changes from nearly the uniform one to the one‐sided one. It can be concluded that the effects of magnetic‐field have to be considered for the evaluation of switching characteristic in pulsed power operations. © 2004 Wiley Periodicals, Inc. Electr Eng Jpn, 147(1): 10–16, 2004; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.10271     

Development of self-conducting current bypass circuit for series-connected diodes in high power semiconductor light source

This paper proposes a self-conducting current bypass circuit for series-connected diodes in high power semiconductor light source. This circuit enables the main circuit current flow continuously, even if several of the diodes connected in series are open because of breakdowns. Herein, the composition, operation, and circuit design method of the proposed circuit are described. Moreover, the development of a simulation model of the fuse, which is an element of the circuit, is described. Furthermore, the simulation result of the proposed circuit using the fuse model is presented, and the method of determining the circuit constant based on the simulation result is demonstrated. Finally, by connecting a prototype circuit based on this study in parallel with series-connected diodes, we show that the main circuit current of 60 A flow continuously even when one of the diodes is open.     

New electrical shunt with two rectangular holes in a copper plate

A new concept of an electrical shunt with two rectangular holes in a copper plate (ESRP) has been developed to be used for measuring a large current with a short‐duration steep wave in a high‐voltage field. The ratio of the input current to the output current is 10⁶, as obtained from a DC voltage test circuit. The electrical shunt has a special configuration. To verify the shunt current ratio of ESRP in a real application, the shunt current was connected to a sphere‐to‐sphere electrode breakdown test circuit with a 10 mm gap to measure the large damping current (8.4 kA) of a DC breakdown voltage. The voltage signal from the shunt was transmitted to excite two light‐emitting diodes (max. 50 mA, 4 V), which were reverse‐connected in series. The light‐emitting diodes operated properly and were illuminated, which validated the capability of the newly designed electrical shunt. © 2015 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Wave digital simulation of passive systems in linear state‐space form

This paper deals with wave digital modeling of passive state‐space models. The set of differential equations must be of linear state‐space form, but all parameters can be time‐variant and/or nonlinear. For such state‐space models, a canonical internally passive reference circuit is presented and used for deriving wave digital structures. In order to show the usability, special solutions for important basic linear time‐variant models are compared with wave digital simulation results. Moreover, the wave digital modeling of a nonlinear and time‐variant oscillator is discussed. Especially for a lossless oscillator an implementation is proposed, which preserves energy under finite‐arithmetic conditions. This is verified by comparing simulation results with the analytical solution of a gravity pendulum. Copyright © 2009 John Wiley & Sons, Ltd.     

A general SPICE compatible circuit model for single‐electron devices and application to bit‐error‐rate calculations

The main purpose of this paper is study of the single‐electron devices (SEDs) behavior, having metal islands, in the time domain. On this basis, some new conceptions, such as division of islands in independent type and dependent type and introduction of multi‐dimensional state space for a SED, have been presented. Then, a new circuit model is introduced for SEDs in general N‐dimensional case. This model is based on the orthodox theory and the solution of the time‐dependent master equation with the capability of installation in the HSPICE software. Hence, one can simulate behavior of the compound circuits including SEDs and other circuit elements by help of this model. Another interesting characteristic of the introduced circuit model is the possibility of using it in calculation of bit error rate in single‐electron logical gates considering both the time and the temperature effects. The behavior of various SEDs in low frequencies is studied, and the results are compared with the results of SIMON, often used as a reference. Furthermore, the time‐dependent results of these devices in high frequencies are calculated and compared with the analytic results for step inputs. These comparisons indicate accuracy and validity of the model. Finally, the model is used for simulating time‐dependent behavior of some single‐electron logic gates, and their total error rate are calculated. Copyright © 2013 John Wiley & Sons, Ltd.     

Fractional charge packet counting with constant relative resolution

A charge‐to‐digital converter concept suitable for pixel‐level charge sensitive amplifiers is presented. The circuit implements a technique referred here as fractional charge packet counting, which ensures large dynamic range operation using constant integration time. By means of a particular circuit arrangement a constant number of significant bits is provided as output, thus ensuring a constant relative resolution over the entire dynamic range. A circuit implementing the concepts described above has been designed and simulated. Each block of the circuit is described in details and its characterization is presented. The circuit is capable to convert input currents in the range of 100 fA to 100 nA at 2 ksample/s with a constant resolution of 10 bit without the need of gain switching. Copyright © 2010 John Wiley & Sons, Ltd.     

Electronic model of a Ferroelectric Field Effect transistor

Abstract

A pair of electronic models has been developed of a Ferroelectric Field Effect transistor. These models can be used in standard electrical circuit simulation programs to simulate the main characteristics of the FFET. The models use the Schmitt trigger circuit as a basis for their design. One model uses bipolar junction transistors and one uses MOSFET's. Each model has the main characteristics of the FFET, which are the current hysterisis with different gate voltages and decay of the drain current when the gate voltage is off. The drain current from each model has similar values to an actual FFET that was measured experimentally. The input and output resistance in the models are also similar to that of the FFET. The models are valid for all frequencies below RF levels. Each model can be used to design circuits using FFET's with standard electrical simulation packages. These circuits can be used in designing non-volatile memory circuits and logic circuits and are compatible with all SPICE based circuit analysis programs. The models consist of only standard electrical components, such as BJT's, MOSFET's, diodes, resistors, and capacitors. Each model is compared to the experimental data measured from an actual FFET.     

Numerically distributed circuit parameters model on microstrip transmission line circuits and its application on CAD

A new numerical model of microstrip transmission line circuits in terms of distributed circuit parameters is here illustrated. Based on full‐wave electromagnetic results, the extraction methods of these distributed circuit parameters on different types of microstrip transmission line circuits are introduced. As a preparatory experiment, an improved CAD method using this model is tested on microstrip low‐pass filter. Copyright © 2003 John Wiley & Sons, Ltd.     

Parametric CMOS upconverters and downconverters

This paper discusses parametric CMOS mixers as potential radio‐frequency front‐end contributors to advanced mm‐wave and sub‐mm‐wave wireless communicators. It outlines fundamental concepts underlying parametric circuit operation highlighting its benefits with regards to power consumption, speed, and noise performance. The implementation of parametric CMOS architectures is detailed. Critical device properties and figures of merit are shown. Measurement results of prototype designs are given. Copyright © 2013 John Wiley & Sons, Ltd.     

一种箝位软开关移相全桥电路研究

针对传统移相全桥电路存在的变压器及次级二极管电压振荡问题,提出一种在变压器初级插入一个耦合电感及箝位二极管臂的方案.该电路既能实现滞后臂开关管的零电压开通(ZVS),又能抑制变压器寄生电容和初级谐振电感产生的变压器电压振荡及伴随的次级整流二极管尖峰电压.详细阐述了电路各阶段工作过程,重点分析了耦合电感和卸能电阻的设计....     

Frequency‐dependent modeling of transmission lines using bergeron cells

This paper proposes using Bergeron's equivalent circuit with traveling time equal to the simulation time step as an element for frequency‐dependent modeling of transmission lines for electromagnetic transient (EMT) simulations of power systems. According to the simulation time step used, a transmission line is divided into aforementioned Bergeron's equivalents, each of which is called a ‘Bergeron cell’ in this paper. In this way, the traveling‐wave nature of a line is represented by the cascaded Bergeron cells. Then, the frequency‐dependent loss nature of the line is represented by a matrix partial fraction expansion, and this is inserted at each connection point of the Bergeron cells in the form of a multiphase Norton equivalent. Since the frequency‐dependent loss is modeled in the dimension of impedance, the change of the line length is easily taken into account by a simple multiplication. This methodology thus allows variable‐length modeling and completely avoids modal decomposition in both model identification and EMT simulation stages. The proposed methodology is applied to the frequency‐dependent modeling of overhead and submarine‐cable transmission lines, and its accuracy is assessed.     

Efficient bridgeless PFC converter with reduced voltage stress

An efficient bridgeless power factor correction converter with reduced voltage stress is proposed. In the proposed converter, the input full‐bridge rectifier is removed to reduce the conduction loss of rectification, and the voltage stress of switching devices is significantly reduced by utilizing the additional circuit composed of a capacitor and a diode. Therefore, low‐voltage‐rating diodes with less forward voltage drop and low‐voltage‐rating Metal‐Oxide‐Semiconductor Field‐Effect Transistor (MOSFET) with low R_DS(on) is utilized. The proposed converter is based on the single‐ended primary‐inductor converter power factor correction operation in discontinuous conduction mode to achieve a high power factor with a simple control circuit. Consequently, the proposed converter can provide a high power factor and a high power efficiency, and it is also suitable for low‐cost converter for high input/output voltage system. The operational principles, steady‐state analysis, and design equations of the proposed converter are described in detail. Experimental results are verified for a 130 W prototype at a constant switching frequency 100 kHz. Copyright © 2015 John Wiley & Sons, Ltd.