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1.
InP and SiGe technologies are both attractive for design of circuits operating at 40 GB/s and beyond. In this paper, we describe a fully differential SiGe transimpedance amplifier (TIA) suitable for differential phase-shift keying applications. The TIA exhibits 49 dB-/spl Omega/ transimpedance, greater than 50-GHz bandwidth, and input-referred current noise less than 30 pA//spl radic/Hz. For comparison, we have also developed a similar TIA in an InP double-heterostructure bipolar transistor technology. The InP TIA had 48 dB-/spl Omega/ transimpedance and 49-GHz bandwidth.  相似文献   

2.
High-gain and high-bandwidth transimpedance amplifiers (TIAs) are required for fiber-optic receiver modules. This paper reports on the design, fabrication, and characterization of a 40-Gb/s TIA for SONET/SDH STS-768/STM-256 applications based on an InP-InGaAs single heterojunction bipolar transistor (SHBT) process developed at Vitesse Semiconductor Corporation (Vitesse Indium Phosphide Release 1 or VIP-1). This amplifier consists of a single-ended input transimpedance pre-amplifier and a differential output post-amplifier. The measured differential transimpedance is 1800 /spl Omega/ with -3-dB bandwidth greater than 40 GHz. The high gain of this circuit eliminates the need for a standalone limiting amplifier between the conventional transimpedance pre-amplifier and the demultiplexer in short-reach applications.  相似文献   

3.
A 20-GHz differential two-stage low-noise amplifier (LNA) is demonstrated in a foundry digital 130-nm CMOS technology with 8-metal layers. This LNA has 20-dB voltage gain and /spl sim/5.5-dB noise figure at 20GHz with 24-mW power consumption. The measured IP/sub 1 dB/ and IIP/sub 3/ are -11 dBm and -4dBm. Compared to the previously published bulk CMOS LNAs operating above 20GHz, this LNA has exceptionally low power and current consumption especially considering its differential topology and wide bandwidth.  相似文献   

4.
A wide-bandwidth automatic gain control (AGC) amplifier IC was developed using a self-aligned selective-epitaxial SiGe heterojunction bipolar transistor (HBT). A transimpedance load circuit was used, and its damping factor was optimized to achieve a wide bandwidth of 32.7 GHz. Capacitor peaking was introduced to the second variable-gain amplifier in order to obtain a wide gain dynamic range of 19 dB. The amplifier IC has a noise figure of 18 dB and an eye pattern at 25 Gb/s  相似文献   

5.
A 2 /spl mu/m InGaP/GaAs heterojunction bipolar transistor (HBT) matrix amplifier with a new gain cell achieving 17.2 dB gain and 41 GHz bandwidth is reported. Using the gain-bandwidth products per transistor f/sub t/ and f/sub max/ as the figures of merit for measuring the effectiveness of amplifier design, it achieves 4.72 and 4.43, respectively, demonstrating among the best-reported bipolar broadband amplifiers  相似文献   

6.
In this letter, we demonstrate a monolithically integrated optoelectronic integrated circuit (OEIC) for 1.55-/spl mu/m wavelength application. The presented OEIC consists of an evanescently coupled photodiode (ECPD) and a single-stage common-base InP-InGaAs heterojunction bipolar transistor (HBT) amplifier. The guide structure was grown first by metal-organic chemical vapor deposition and pin/HBT was then regrown by molecular beam epitaxy. The ECPD exhibits a responsivity of 0.3 A/W and a -3-dB electrical bandwidth of 30 GHz. The photoreceiver demonstrates a -3-dB electrical bandwidth of 37 GHz with a transimpedance gain of 32 dB/spl middot//spl Omega/. This is, to our knowledge, the first ECPD/HBT ever reported for a monolithically integrated OEIC.  相似文献   

7.
This paper describes a novel low-power low-noise CMOS voltage-current feedback transimpedance amplifier design using a low-cost Agilent 0.5-/spl mu/m 3M1P CMOS process technology. Theoretical foundations for this transimpedance amplifier by way of gain, bandwidth and noise analysis are developed. The bandwidth of the amplifier was extended using the inductive peaking technique, and, simulation results indicated a -3-dB bandwidth of 3.5 GHz with a transimpedance gain of /spl ap/60 dBohms. The dynamic range of the amplifier was wide enough to enable an output peak-to-peak voltage swing of around 400 mV for a test input current swing of 100 /spl mu/A. The output noise voltage spectral density was 12 nV//spl radic/Hz (with a peak of /spl ap/25 nV//spl radic/Hz), while the input-referred noise current spectral density was below 20 pA//spl radic/Hz within the amplifier frequency band. The amplifier consumes only around 5 mA from a 3.3-V power supply. A test chip implementing the transimpedance amplifier was also fabricated using the low-cost CMOS process.  相似文献   

8.
A monolithically integrated 1-Gb/s p-i-n/HBT transimpedance photoreceiver is discussed. The optoelectronic integrated circuit (OEIC) was made from metalorganic vapor-phase epitaxy (MOVPE)-grown InP/InGaAs heterostructures and had a transimpedance of 1375 Ω, a sensitivity of -26.1 dBm, >25-dB dynamic range, and a 500-MHz bandwidth  相似文献   

9.
An 18-GHz, 300-mW SiGe power heterojunction bipolar transistor (HBT) is demonstrated. The optimization of SiGe HBT vertical profile has enabled this type of devices to operate with high gain and high power at this high frequency. In the common-base configuration, a continuous wave output power of 24.73 dBm with a power gain of 4.5 dB was measured from a single 20-emitter stripe SiGe (2/spl times/30 /spl mu/m/sup 2/ of each emitter finger) double HBT. The overall performance characteristics represent the state-of-the-art SiGe power HBTs operating in the K-band frequency range.  相似文献   

10.
This paper describes the design of a transimpedance amplifier (TIA) for a low-power, short-distance, high-density fiber-optic interconnect communication system. The single-ended circuit has been designed in an 80-nm digital CMOS process and consumes only 2.2 mW from a 1-V supply. The measured results show a transimpedance gain of 52 dB/spl Omega/ and a large bandwidth of 20 GHz. This work presents the highest bandwidth at the lowest power consumption for CMOS transimpedance amplifiers reported to date.  相似文献   

11.
A monolithic integrated transimpedance amplifier for the receiver in a 40-Gb/s optical-fiber TDM system has been fabricated in an InP-based HBT technology. Despite its high gain (transimpedance of 2 kΩ in the limiting mode, 10 kΩ in the linear mode) the complete amplifier was realized on a single chip. Clear output eye diagrams were measured up to 43 Gb/s under realistic driving conditions. The voltage swing of 0.6 Vpp at the differential 50 Ω output does not change within the demanded input dynamic range of 6 dB. At the upper input current level even 48 Gb/s were achieved. The power consumption is approximately 600 mW at a single supply voltage of -5.5 V  相似文献   

12.
InP-In/sub 0.53/Ga/sub 0.47/As-InP double heterojunction bipolar transistors (DHBT) have been designed for use in high bandwidth digital and analog circuits, and fabricated using a conventional mesa structure. These devices exhibit a maximum 391-GHz f/sub /spl tau// and 505-GHz f/sub max/, which is the highest f/sub /spl tau// reported for an InP DHBT-as well as the highest simultaneous f/sub /spl tau// and f/sub max/ for any mesa HBT. The devices have been aggressively scaled laterally for reduced base-collector capacitance C/sub cb/. In addition, the base sheet resistance /spl rho//sub s/ along with the base and emitter contact resistivities /spl rho//sub c/ have been lowered. The dc current gain /spl beta/ is /spl ap/36 and V/sub BR,CEO/=5.1 V. The devices reported here employ a 30-nm highly doped InGaAs base, and a 150-nm collector containing an InGaAs-InAlAs superlattice grade at the base-collector junction. From this device design we also report a 142-GHz static frequency divider (a digital figure of merit for a device technology) fabricated on the same wafer. The divider operation is fully static, operating from f/sub clk/=3 to 142.0 GHz while dissipating /spl ap/800 mW of power in the circuit core. The circuit employs single-buffered emitter coupled logic (ECL) and inductive peaking. A microstrip wiring environment is employed for high interconnect density, and to minimize loss and impedance mismatch at frequencies >100 GHz.  相似文献   

13.
This paper presents a CMOS fully differential current feedback operational amplifier with controllable 3-dB bandwidth. The FDCFOA has the advantage of a wide range controllable 3-dB bandwidth (∼57–500 MHz) without changing the feedback resistance. The FDCFOA has a standby current of 320 μA. Application of the proposed FDCFOA in realizing second order low-pass filter with controllable 3-dB bandwidth is given. PSpice simulations of the FDCFOA block and its application are given using 0.25 μm CMOS technology from MOSIS and dual supply voltages ±0.75 V.  相似文献   

14.
15.
High-speed oxide-confined polyimide-planarized 850-nm vertical-cavity surface-emitting lasers exhibit -3-dB modulation bandwidths up to 17.0 GHz. The devices are fabricated using a reproducible, simple process incorporating polyimide with good adhesion that does not require implantation or semiinsulating substrates to achieve low capacitance.  相似文献   

16.
介绍ADI公司的大带宽AD8351运算放大器特性及其引脚功能;描述AD8351在采样速率为400 MS/s的多路模数转换系统中的应用;给出多路差分模拟放大电路的详细设计方案和参考电路,同时也对工作中可能出现的问题进行了讨论,以供硬件设计者参考.  相似文献   

17.
5-GHz SiGe HBT monolithic radio transceiver with tunable filtering   总被引:1,自引:0,他引:1  
A wide-band CDMA-compliant fully integrated 5-GHz radio transceiver was realized in SiGe heterojunction-bipolar-transistor technology with on-chip tunable voltage controlled oscillator (VCO) tracking filters. It allows for wide-band modulation schemes with bandwidth up to 20 MHz. The receiver has a single-ended single-sideband noise figure of 5.9 dB, more than 40 dB on-chip image rejection, an input compression point of -22 dBm, and larger than 70 dB local-oscillator-RF isolation. The phase noise of the on-chip VCO is -100 and -128 dBc/Hz at 100 kHz and 5 MHz offset from the carrier, respectively. The transmitter output compression point is +10 dBm. An image rejection better than 40 dB throughout the VCO tracking range has been demonstrated in the transmitter with all spurious signals 40 dB below the carrier. The differential transceiver draws 125 mA in transmit mode and 45 mA in receive mode from a 3.5-V supply  相似文献   

18.
Palmisano  G. Pennisi  S. 《Electronics letters》1999,35(14):1126-1127
A high-frequency CMOS amplifier is proposed which can be used as a gain stage in RF front-ends. The circuit is based on a traditional transconductance amplifier unconventionally arranged to achieve both accurate input biasing and single-to-differential conversion. It takes advantage of an innovative approach to greatly improve frequency performance. Owing to this technique, the operating frequency of a basic amplifier in a 0.8 μm CMOS process could be extended from 290 to 650 MHz without affecting the gain  相似文献   

19.
文章提出一种速率为1.25 Gbit/s、具有可控电流监控的光纤通信用跨阻放大器(TIA)电路,该放大器可以通过拉电流和灌电流两种方式来检测电流监控的电流流向.设计使用的是0.18 μm的标准互补型金属氧化物半导体(CMOS)工艺.仿真结果表明,光电流在1 μA~1 mA范围内时,各种工艺条件下检测到的光电流误差均小于...  相似文献   

20.
An InGaP-GaAs HBT MMIC smart power amplifier for W-CDMA mobile handsets   总被引:1,自引:0,他引:1  
We demonstrate a new linearized monolithic microwave integrated circuit smart power amplifier of extraordinary high power-added efficiency (PAE), especially at the most probable transmission power of wide-band code-division multiple-access handsets. A PAE of 21% at 16 dBm of output power, which is the maximum bound of the most probable transmission power in IS-95 systems, was obtained, as well as 40% at 28 dBm, the required maximum output power, with a single-chip MMIC power amplifier. The power amplifier has been devised with two InGaP-GaAs heterojunction bipolar transistor amplifying chains parallel connected, each chain being optimized for a different P/sub 1dB/ (1-dB compression point) value: one for 16 dBm for the low-power mode, targeting the most probable transmission power, and the other for 28 dBm for the high-power mode. The high-power mode operation shows 40% of PAE and -30 dBc of adjacent channel leakage power ratio (ACLR) at the maximum output power of 28 dBm. The low-power mode operation exhibits -34 dBc of ACLR at 16 dBm with 14 mA of a quiescent current. This amplifier improves power usage efficiency and, consequently, the battery lifetime of the handset by a factor of three.  相似文献   

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