纳米级SET/CMOS混合器件的研究进展

SET/CMOS作为一种单电子晶体管与纳米级CMOS混合结构的新兴纳米电子器件,不仅实现两者优势互补,而且其突出的功能特性极大影响着电路微型化发展的道路。从SET/CMOS的串联和并联两种基本结构出发,阐述了各自的工作原理与特性、进而介绍了该混合器件目前在实验室制备、电路设计以及数值模拟研究方面的现状,最后讨论了器件在发展中尚需解决的问题及其应用前景。SET/CMOS的容错电路及互连结构新型设计将会加速实用化的进程,使集成电路产生质的飞跃,进而有望实现超高密度的信息存储和超高速信息处理,并将在未来智能计算机、通信设备和自动化方面发挥重要作用。     

固体纳米电子器件的发展及应用

介绍固体纳米电子器件及其应用。固体纳米电子器件包括共振隧穿器件(RTD)、量子点器件(QD)和单电子器件(SED)。单电子器件又分为单电子晶体管(SET)和单电子存储器(SEM)，     

Bi-CMOS双极型晶体管的研制

本文论述了在常规CMOS工艺下制作Bi-CMOS双极型晶体管的设计方法及制造工艺.首先通过对Bi-CMOS双极型晶体管版图结构的分析,探讨了工作机理,阐明了采用标准CMOS工艺制作高性能Bi-CMOS双极型晶体管的设计方法.然后,建立了分析计算晶体管直流特性的数学模型,并分析计算了工艺参数、器件结构对器件性能的影响,给出了CMOS工艺全兼容的Bi-CMOS双极型npn晶体管的最佳设计方案.采用常规p阱CMOS工艺进行了投片试制.测试结果表明,器件性能达到了设计指标;器件的电流增益在200以上,与理论计算完全一致.     

基于单电子晶体管细胞神经网络的实现方法

基于单电子晶体管(SET)的I-V特性和CNN细胞单元的硬件结构原理，给出了三种基于SET的CNN硬件电路具体实现方法：一是基于SET的库仑振荡特性和CMOS数字电路的设计思想方法；二是根据细胞单元的等效结构分块实现方法；三是基于SET阵列的传输特性实现CNN方法，并重点阐述了后两种SET的CNN实现方法，分析了它们的优缺点。     

基于单电子晶体管的动态全加器电路设计

基于单电子晶体管的I-V特性,运用CMOS动态电路的设计思想,提出了一种基于单电子晶体管的全加器动态电路,利用SPICE对设计的电路进行了仿真验证,分析了电荷分享问题.相对于静态互补逻辑电路的设计方法,基于单电子晶体管的动态逻辑电路不仅克服了单电子晶体管固有的电压增益低的缺点,而且器件数目也大幅减少.多栅SET的使用可以减少电荷分享问题对动态电路的影响.     

单电子晶体管及其SPM加工方法

在电子技术领域,高度集成化是人们不断追求的目标,纳米电子器件迎合了人们的这种需要,将逐步取代微电子器件成为芯片的主要单元。单电子器件以其高效、高功能、高速、低耗(可在常温下工作)、高集成化及经济可靠等优点受到了人们的广泛重视。纳米电子器件具有纳米量级,因而许多科研人员都致力于寻求一种良好的加工方法。SPM电场诱导氧化方法以其简单性和低成本越来越受到人们的广泛重视。主要介绍了单电子晶体管(SET)的结构及基本原理,着重介绍了大气状态下用SPM电场诱导氧化加工的制作原理。     

纳米器件的发展动态

介绍了纳米CMOS器件、纳米电子器件和量子器件的发展动态,提出以信息载体来分类纳米器件的方式。在纳米CMOS器件方面,主要介绍近半年来65nm工艺及器件的最新动态;在纳米电子器件方面,主要介绍共振隧穿器件(RTD)的动态;在量子器件方面,主要介绍量子器件和半导体自旋器件的概况。     

纳米电子器件及其集成

对基于Top-Down加工技术的纳米电子器件如:单电子器件、共振器件、分子电子器件等的研究现状、面临的主要挑战等进行了讨论.采用CMOS兼容的工艺成功地研制出单电子器件,观察到明显的库仑阻塞效应;在半绝缘GaAs衬底上制作了AlAs/GaAs/In0.1 Ga0.9As/GaAs/AlAs双势垒共振隧穿二极管,采用环型集电极和薄势垒结构研制的共振隧穿器件,在室温下测得其峰谷电流比高达13.98,峰电流密度大于89kA/cm2;概述了交叉阵列的分子存储器的研究进展.     

纳米电子器件及其集成

对基于Top-Down加工技术的纳米电子器件如:单电子器件、共振器件、分子电子器件等的研究现状、面临的主要挑战等进行了讨论.采用CMOS兼容的工艺成功地研制出单电子器件,观察到明显的库仑阻塞效应;在半绝缘GaAs衬底上制作了AlAs/GaAs/In0.1 Ga0.9As/GaAs/AlAs双势垒共振隧穿二极管,采用环型集电极和薄势垒结构研制的共振隧穿器件,在室温下测得其峰谷电流比高达13.98,峰电流密度大于89kA/cm2;概述了交叉阵列的分子存储器的研究进展.     

纳米电子器件及其集成

对基于Top-Down加工技术的纳米电子器件如：单电子器件、共振器件、分子电子器件等的研究现状、面临的主要挑战等进行了讨论. 采用CMOS兼容的工艺成功地研制出单电子器件，观察到明显的库仑阻塞效应；在半绝缘GaAs衬底上制作了AlAs/GaAs/In0.1Ga0.9As/GaAs/AlAs双势垒共振隧穿二极管,采用环型集电极和薄势垒结构研制的共振隧穿器件，在室温下测得其峰谷电流比高达13.98，峰电流密度大于89kA/cm2；概述了交叉阵列的分子存储器的研究进展.     

Transparent Gate Silicon Photodetectors

Optical and electrical properties of silicon imaging devices with In/sub 2/O/sub 3/-SnO/sub 2/ gates are reported. The optically transparent electrically conducting films were sputtered from both glass and metal targets. Quantum efficiencies of such devices are significantly better than photodiodes or polysilicon gate devices. The electrical properties such as dark current and interface state density are as low as conventional aluminum gate devices after appropriate anneals.     

RTD与PHEMT集成的几个关键工艺

在新型的共振隧穿二极管(RTD)器件与PHEMT器件单片集成材料结构上，研究和分析了分立器件的制作工艺，给出了分立器件的制作工艺参数．利用上述工艺成功制作了RTD和PHEMT器件，并在室温下分别测试了RTD器件和PHEMT器件的电学特性．测试表明：在室温下，RTD器件的峰电流密度与谷电流密度之比提高到1.78;PHEMT器件的最大跨导约为120mS/mm,在Vgs＝0.5V时的饱和电流约为270mA/mm．这将为RTD集成电路的研制奠定工艺基础．     

Transparent gate silicon photodetectors

Optical and electrical properties of silicon imaging devices with In2O3-SnO2gates are reported. The optically transparent electrically conducting films were sputtered from both glass and metal targets. Quantum efficiencies of such devices are significantly better than photodiodes or polysilicon gate devices. The electrical properties such as dark current and interface state density are as low as conventional aluminum gate devices after appropriate anneals.     

Digital CMOS IC's in 6H-SiC operating on a 5-V power supply

A CMOS technology in 6H-SiC utilizing an implanted p-well process is developed. The p-wells are fabricated by implanting boron ions into an n-type epilayer. PMOS devices are fabricated on an n-type epilayer while the NMOS devices are fabricated on implanted p-wells using a thermally grown gate oxide. The resulting NMOS devices have a threshold voltage of 3.3 V while the PMOS devices have a threshold voltage of -4.2 V at room temperature. The effective channel mobility is around 20 cm ²/Vs for the NMOS devices and around 7.5 cm²/Vs for the PMOS devices. Several digital circuits, such as inverters, NAND's, NOR's, and 11-stage ring oscillators are fabricated using these devices and exhibited stable operation at temperatures ranging from room temperature to 300°C. These digital circuits are the first CMOS circuits in 6H-SiC to operate with a 5-V power supply for temperatures ranging from room temperature up to 300°C     

Subthreshold Performance of Dual-Material Gate CMOS Devices and Circuits for Ultralow Power Analog/Mixed-Signal Applications

Analog circuits based on the subthreshold operation of CMOS devices are very attractive for ultralow power, high gain, and moderate frequency applications. In this paper, the analog performance of 100 nm dual-material gate (DMG) CMOS devices in the subthreshold regime of operation is reported for the first time. The analog performance parameters, namely drain-current (I_d), transconductance (g_m), transconductance generation factor (g_m/I_d), early voltage (V_A), output resistance (R_o) and intrinsic gain for the DMG n-MOS devices, and and for the DMG p-MOS devices are systematically investigated with the help of extensive device simulations. The effects of different capacitances on the unity-gain frequency are also studied. The DMG CMOS devices are found to have significantly better performance as compared to their single-material gate (SMG) counterpart. More than 70% improvement in the voltage gain is observed for the CMOS amplifiers when dual-material gates, instead of single-material gates, are used in both the n- and p-channel devices.     

Study of single- and dual-channel designs for high-performance strained-Si-SiGe n-MOSFETs

Results comparing strained-Si-SiGe n-channel MOSFET performance of single-and dual-surface channel devices fabricated using 15% Ge content SiGe virtual substrates are presented. Device fabrication used high thermal budget processes and virtual substrates were not polished. Mobility enhancement factors exceeding 1.6 are demonstrated for both single-and dual-channel device architectures compared with bulk-Si control devices. Single-channel devices exhibit improved gate oxide quality, and larger mobility enhancements, at higher vertical effective fields compared with the dual-channel strain-compensated devices. The compromised performance enhancements of the dual-channel devices are attributed to greater interface roughness and increased Ge diffusion resulting from the Si/sub 0.7/Ge/sub 0.3/ buried channel layer.     

表面贴装型微波器件

介绍了表面贴装型微波器件的最新进展状况,如陶瓷/铁氧体叠层共烧元件、微波陶瓷介质谐振器器件、SAW和FBAR器件、薄膜器件、RF宽带器件以及无源/有源集成功能模块等。     

Gaq3有机薄膜电致发光器件

首次报道了采用８－羟基喹啉镓螯合物作为发光层制备有机薄膜电致发光器件，器件的结构为：ＩＴＯ导电玻璃／ＴＰＤ／Ｇａｑ３／Ａｌ。研究了Ｇａｑ３薄膜的光致发光和器件的电致发光机理，同时测量和研究了器件的电流密度－－电压（Ｊ－Ｖ）特性和发光亮度－电压（Ｂ－Ｖ）特性。结果表明器件的电致发光峰值波长为５４０ｎｍ，在２０Ｖ直流电压驱动下的最大发光亮度约２５００ｃｄ／ｍ＾２明显高于上同结构和工艺参数制备的Ａｌｑ３     

Optical and microwave performance of GaAs-AlGaAs and strained layerInGaAs-GaAs-AlGaAs graded index separate confinement heterostructuresingle quantum well lasers

GaAs-AlGaAs and strained layer In_0.3Ga_0.7As-GaAs-AlGaAs GRINSCH SQW lasers grown by molecular beam epitaxy are discussed. The strained-layers have threshold currents of 12 mA for 30-μm×400-μm devices (1000 A/cm²) and threshold current densities of 167 A/cm² for 150-μm×800-μm devices. The threshold currents of strained-layer InGaAs lasers are lower than those of GaAs for all dimensions tested with 20-μm-wide GaAs devices exhibiting threshold currents three times those of In_0.3Ga_0.7As devices. Microwave modulation of 10-μm×500-μm strained-layer lasers with simple mesa structures yields bandwidths of 6 GHz. For all dimensions tested, strained-layer InGaAs devices have greater bandwidths than GaAs devices. These measurements confirm theoretical predictions of the effects of valence band modification due to biaxially compressive strain     

基于碳纳米管的微纳机电器件应用研究

综述了近年来碳纳米管在微纳传感器、纳米发电机、纳米执行器、纳米电子器件、纳米收音机与薄膜扬声器等方面取得的瞩目成果及典型应用,介绍了基于碳纳米管的微纳机电器件的制造工艺、器件性能及其研究进展,指出了碳纳米管基微纳机电器件在多元化发展、工艺多样化、材料复合化、产业化工程等方面的发展趋势。