CMOS low-voltage operational amplifiers with constant-gm rail-to-rail input stage

Two 3.3-V operational amplifiers with constant-g _m rail-to-rail input stage and rail-to-rail output stage are presented. The constant transconductance (g _m ) ensures a constant unity-gain frequency within the whole commonmode input range. Two new methods to control theg _m are introduced. Both operational amplifiers use the same rail-to-rail output stage. The operational amplifiers have been integrated in a CMOS semicustom process with transistor lengths of 10µm. The common-mode input voltage swing extends beyond the positive supply rail by 400 mV and beyond the negative supply rail by 200 mV. The output voltage is able to reach within 130 mV of the supply rails. The output current of the operational amplifiers is 2 mA and the voltage gain is 85 dB. The unity-gain frquency is 165 kHz, which is mainly limited by the relatively long transistor lengths of 10µm. In another process with channel lengths of 2µm, simulation results showed that a unity-gain frequency of 4 MHz can easily be obtained.     

A Low-Voltage Fully Differential Constant-Gm Rail-to-Rail CMOS Operational Amplifier

A low-voltage fully differential CMOS operational amplifier withconstant-g_mand rail-to-rail input and output stages ispresented. It is the fully differential version of a previously realizedsingle-ended operational amplifier where a novel circuit to ensure constanttransconductance has been implemented [1]. The input stage is a rail-to-railstructure formed by two symmetrical OTAs in parallel (the input transistorsare operating in weak inversion). The class-AB output stages have also afull voltage swing. A rail-to-rail input common mode feedback structureallows the output voltage control. Measurements in a 0.7 µ standardCMOS process with threshold voltages of about 0.7 V have been done. Theminimum experimental supply voltage is about 1.1 V. The circuit provides a60 dB low frequency voltage gain and about 1.5 MHz unity gain frequency fora total power consumption of about 0.72 mW at a 1.5 V supply voltage.     

High current efficiency single-stage bulk-driven subthreshold-biased class-AB OTAs with enhanced transconductance and slew rate for large capacitive loads

This paper introduces two high-performance single-stage bulk-driven (BD) operational transconductance amplifiers (OTA) in weak-inversion with rail-to-rail input and output voltage ranges suited for the excessively low-voltage of 0.5 V supply. The strategy depends on adopting a modified bulk-driven non-tailed input core to achieve high input core transconductance with a minimum power supply and an enhanced input common-mode range. Moreover, a partial positive feedback loop provides an overall improved DC gain and effective transconductance further. The input core of OTA1, named composite class-AB OTA, comprises two combined non-tailed differential pairs as composite differential pairs. The proposed OTA2, named composite super class-AB BD-OTA, exploits a matched bulk-input Flipped voltage follower (FVF) pair to adaptively bias the input core used in the composite class-AB BD OTA. As a result, a significant increase in large-signal input current to the output side due to super class-AB behavior improves the slew rate. The post-layout simulation results using the Cadence Spectre simulator with UMC 0.18 µm process technology confirm that the proposed OTAs have improved small-signal and large-signal performances over the conventional OTA driving a high capacitive load of 5 nF. The proposed composite class-AB and super class-AB BD OTA deliver 2.29 times, and 3.77 times open-loop DC gain, 10.6 times, and 117 times unity-gain bandwidth with 2 times, and 12.03 times slew rate at the expense of almost 0.52 times and 1.21 times power consumed over conventional counterpart, respectively.

     

A high-efficiency 4×20 W monolithic audio amplifier forautomobile radios using a complementary D-MOS BCD technology

A monolithic quad audio power amplifier which reduces power dissipation by 45% with a music signal compared to a standard class-AB amplifier is described. A new two-stage operational amplifier, capable of providing high output current, is used for each one of eight power amplifiers. In a bridge configuration, a common-loop mode control is performed exploiting a sample-and-hold circuit. A multipower bipolar-CMOS-DMOS (BCD) technology is employed with a push-pull rail-to-rail output stage and a low-loss power switch. Experimental results are presented     

Variable gain control circuit for linear applications

A new, simple gain control circuit is introduced for linear applications. It utilises a differential stage for the gain control function and a predistortion circuit to maintain linearity. The circuit provides a wide dynamic range and low intermodulation levels. Suitable applications are WCDMA cellular phone circuits such as variable-gain amplifiers or driver stages with gain control for power amplifiers     

Low-power low-voltage differential class-AB OTAs for SC circuits

Two new differential class-AB operational transconductance amplifiers (OTAs) for SC circuits that operate with a supply voltage of less than two transistor threshold voltages are introduced. They make use of a new class-AB pseudodifferential pair to generate signal currents much larger than quiescent currents. Both OTAs have been designed to operate with a supply voltage of V/sub DD/=1.1 V, using a 0.35 /spl mu/m CMOS technology. Simulation results for a load capacitance (C/sub L/) of 1 pF show 15 MHz gain-bandwidth product with a quiescent power consumption of 10 /spl mu/W.     

New Measurement Methods of Dominant-Pole-Type Operational Amplifier Parameters

New simple and easy methods measuring the parameters of operational amplifiers (OA's) are presented with newly constructed testing circuits and setups. Firstly, it is shown that the transition frequency and dominant-pole frequency are derived from a relaxation or harmonic oscillator in which the OA under test is used as an element of the circuit. Secondly, it is shown that other parameters such as the open-loop gain, the input and output resistance, the input offset voltage, the input bias current, and the input offset current are obtained easily from the new circuits.     

高精度CMOS DEM-CCⅡ放大器

采用动态元件匹配二代电流传输器(DEM-CCⅡ)技术,设计了一种0.35μm标准工艺的高精度CMOS放大器。通过比较传统的CMOS运放可知,所设计的CMOS放大器既增大了输出摆幅又减小了输出阻抗,且有效地限制了有限的运放增益对电路性能的影响。仿真实验结果表明,该CMOS放大器增益误差比传统运放的增益误差小38～50倍,精度等级明显提高,因而特别适用于各类检测和信号调理放大器的设计中。     

一种增益和摆率提升的电流镜运算放大器

提出了一种应用于低压低功耗电路的新型电流镜运算放大器。该运算放大器在传统电流镜运算放大器结构的基础上,在输入级增加电流复用模块,在输出级增加动态调控单元,提升了电路的增益和摆率,且不产生额外的静态功耗,不影响电路的稳定性。在UMC 28 nm CMOS工艺下进行设计和验证。仿真结果表明,在1.05 V电源电压下,与传统电流镜运算放大器相比,该运算放大器的摆率提高了11倍,增益提升了20 dB。     

Active RC filters with differential integrators

A method is described for synthetising active RC filters by using the subtraction property of differential operational amplifiers. The differential operational amplifiers used have infinite gain. The advantages of the filters are simple adjustments, low sensitivities and fewer amplifiers compared with analogue-computer circuits.     

Effective parameter extraction using multiple-objective function for VLSI circuits

In this paper an input stage and an output stage are presented for application in low-voltage CMOS operational amplifiers. The input stage operates in strong inversion and has a rail-to-rail common-mode input voltage range. The transconductance (g _m ) is insensitive to the common-mode input voltage. The class AB output stage has a rail-to-rail output range. A class AB control circuit prevents any transistors in the output stage from switching off. This improves the large-signal high-frequency behavior and the step response of the amplifier. A complete two-stage Op Amp employing the proposed input and output stages was realized in a semi-custom CMOS process with minimum channel lengths of 10µm and transistor threshold voltages of approximately 0.7 V. The measured minimum supply voltage is 2.5 V. The measured input voltage range exceeds the supply rails and the output voltage reaches both rails within 130 mV. The unity-gain bandwidth of the complete Op Amp is severely limited by the long channel lengths. Simulations show that a unity-gain bandwidth of 7 MHz is feasible if 2.5µm channel lengths are used.     

A 3.3-V ISDN U-interface line driver with a new I/sub Q/-control circuit

In this work, we propose a new quiescent current (I/sub Q/) control circuit applicable to line drivers for digital subscriber line (DSL) applications. The line driver consists of preamplifier, error amplifiers, output transistors, and I/sub Q/ control circuits. A new method is proposed for controlling I/sub Q/ values in order to obtain high linearity performance. It also helps to determine the minimum off-current value of the class-AB output stage to reduce crossover distortion. The line driver is implemented for ISDN U-interface applications. It is fabricated in a 0.35-/spl mu/m CMOS technology for a single power supply voltage of 3.3 V, and a total harmonic distortion of less than -64 dB is achieved.     

Nanowatt operation of monolithic operational amplifiers†

A study was made of two micropowered operational amplifiers to determine degradation of unity gain frequency response, open-loop gain, and slow rate in amplifier circuits and maximum frequency of oscillation in Colpitts and Wein bridge oscillators as programmed. Quiescent current was reduced below specified operating levels into the nanoampere region.     

A new current-differencing single-supply operational amplifier

The conventional integrated-circuit operational amplifier is not well suited to many system applications that operate from only a single power supply voltage. To more optimally meet the requirements of industrial control systems a new current- differencing opamp has been developed that uses a simple circuit to provide a gain element that out performs the 741 IC opamp. As a result of the circuit simplicity, multiple opamps are possible and six independent internally compensated amplifiers have been fabricated on a single 80/spl times/93-mil die. Many circuits are presented only not to show how this circuit can perform most the application functions of a standard IC opamp, but also to indicate the increased usefulness of this new input current differencing type of opamp circuit in single power-supply control system applications.     

High-Gain Class-AB OTA with Low Quiescent Current

High-performance operational transconductance amplifier (OTA) is designed for switched-capacitor applications. Without using a cascoded output stage, which limits the voltage swing, the output resistance is significantly increased for high DC gain by accurately controlling the output current. Also, the output stage has class-AB operation, so the overall power efficiency is improved. With significantly low quiescent current, the presented new OTA achieves higher DC gain than conventional OTAs. Theoretical analysis and HSPICE simulations prove the performance of the new OTA.     

Novel high performance CMOS current conveyor

In this paper a new CMOS second generation current conveyor based on a novel voltage follower architecture is presented. Both class-A and class-AB topologies are proposed. Results from 0.8 μm designs supplied at 3.3 V show very low resistance at node X (<50 Ω), high frequency operation (100 MHz), high precision in the voltage and current transference and reduced offset. As basic application examples, a voltage-to-current converter and a current feedback operational amplifier have been considered.     

High-gain,high-bandwidth,rail-to-rail,constant-gm CMOS operational amplifier

This study presents a high-gain, high-bandwidth, constant-g_m , rail-to-rail operational amplifier (op-amp). The constant transconductance is improved with a source-to-bulk bias control of an input pair. A source degeneration scheme is also adapted to the output stage for receiving wide input range without degradation of the gain. Additionally, several compensation schemes are employed to enhance the stability. A test chip is fabricated in a 0.18?µm complementary metal-oxide semiconductor process. The active area of the op-amp is 181?×?173?µm² and it consumes a power of 2.41?mW at a supply voltage of 1.8?V. The op-amp achieves a dc gain of 94.3?dB and a bandwidth of 45?MHz when the output capacitive load is connected to an effective load of 42.5?pF. A class-AB output stage combining a slew rate (SR) boost circuit provides a sinking current of 6?mA and an SR of 17?V/µs.     

A Low-Power Class-AB Negative-Feedback Output Amplifier for a 1 V LW Receiver

The design and the measurement results are presented of a low-voltage (1 V) class-AB negative-feedback output amplifier. The amplifier is designed for use in a single-chip LW receiver, which can be put completely in the ear, supplied by a 1 V power supply and is capable of driving a load with an impedance of 30 . The maximum output current of the amplifier is approximately 2.5 mA and its quiescent current is approximately 100 A. This high efficiency is obtained by means of biasing two of the three amplifying stages in class-AB operation. With the aid of negative feedback, the total harmonic distortion for a single 1 kHz tone at 1 mA level is kept below 1%. The output amplifier is integrated in a bipolar process which has vertical NPN transistors with a maximum f _T of 5 GHz and lateral PNP transistors with a maximum f _T of 20 MHz.     

A simple technique to evaluate the noise spectral density in operational amplifier based circuits using the adjoint network theory

We use the adjoint network theory to get quick estimates of the noise contributed by various elements in linear time-invariant opamp based circuits. The noisy operational amplifier is represented using a or with an input referred noise voltage and current source. The adjoint model for this representation is derived. This makes the noise analysis of operational amplifier based circuits very simple and the contribution of the operational amplifiers to the output noise can be obtained very often by inspection. The method is applicable to amplifiers, active RC and MOSFET-C filters. Examples of circuits analyzed include the universal active filter and gyrator topologies.     

Bandwidth optimization of a low power,high speed CMOS current op amp

A current op amp with a differential output and a single-ended input can be configured from a single second generation current conveyor and an output stage with a differential floating current source. Owing to a very simple basic configuration with a single dominant pole, this design combines a high bandwidth with a high open loop gain. In this paper we present the basic configuration, derive the fundamental equations for the performance of the op amp, and describe some design considerations with respect to an optimization of the op amp for a high bandwidth. Simulation results are given from a commercially available 2µm CMOS process resulting in an open loop differential gain of 94dB and a gain-bandwidth product of 128M H z at a supply voltage of 3V and a supply current of 25µA. The design has been experimentally verified through a test circuit and experimental results from this confirm the expected behaviour.