39.5-GHz static frequency divider implemented in AlInAs/GaInAs HBTtechnology

A static divide-by-4 frequency divider operating at 39.5 GHz with a corresponding gate delay of 12.6 ps was implemented using InP-based HBT technology. The AlInAs/GaInAs HBT devices utilized in the divider incorporated a graded emitter-base (E-B) junction and had a unity gain cutoff frequency, maximum frequency of oscillation, and current gain β of 130 GHz, 91 GHz, and 39, respectively. The divider was operated with a 3-V power supply and consumed a total power of 425 mW (77 mW per flip-flop). The divider functional yield was over 90%. The operating frequency of this circuit is the highest ever reported for a static divider     

A low-power 72.8-GHz static frequency divider in AlInAs/InGaAs HBTtechnology

We report a 72.8-GHz fully static frequency divider in AlInAs/InGaAs HBT IC technology. The CML divider operates with a 350-mV logic swing at less than 0-dBm input power up to a maximum clock rate of 63 GHz and requires 8.6 dBm of input power at the maximum clock rate of 72.8 GHz. Power dissipation per flip-flop is 55 mW with a 3.1-V power supply. To our knowledge, this is the highest frequency of operation for a static divider in any technology. The power-delay product of 94 fJ/gate is the lowest power-delay product for a circuit operating above 50 GHz in any technology. A low-power divider on the same substrate operates at 36 GHz with 6.9 mW of dissipated power per flip-flop with a 3.1-V supply. The power delay of 24 fJ/gate is, to our knowledge, the lowest power-delay product for a static divider operating above 30 GHz in any technology. We briefly review the requirements for benchmarking a logic family and examine the historical trend of maximum clock rate in high-speed circuit technology     

75 GHz ECL static frequency divider using InAlAs/InGaAs HBTs

A 75 GHz static frequency divider in InAlAs/InGaAs transferred-substrate heterojunction bipolar transistor (HBT) technology is reported. This is the highest reported frequency of operation for a static frequency divider. The circuit has 60 transistors and dissipates 800 mW. The divider was operated at a clock frequency of 5.0 to 75 GHz     

RTD/HPT光控单-双稳转换逻辑单元

以光接收器件代替RTD MOBILE(RTD单-双稳转换逻辑单元)电路中的HEMT或HBT,可构成光控MOBILE电路。在比较了四种光控MOBILE结构的基础上,选择RTD/HPT光控结构,重点分析讨论了RTD/HPT光控MOBILE的工作原理,当光控MOBILE的输入光功率超过一个临界值时,MOBILE的输出电压便会从高电平跳变到低电平;由HPT光增益理论分析了提高HPT性能的措施以及HPT设计中应该注意的问题;介绍了以Si光三极管代替HPT,通过模拟实验,验证了RTD/HPT光控MOBILE的逻辑功能。     

高速AlGaAs/GaAs HBT D-触发器和静态分频器

叙述了高速 Al Ga As/ Ga As HBT D-触发器和静态分频器的设计、制造和性能。用电流型逻辑和自对准工艺 ,D-触发器上升和下降时间都小于 80 ps,静态分频器在 0～ 8GHz频率范围功能正确     

A 20-GHz frequency divider implemented with heterojunction bipolar transistors

This paper reports a high-speed frequency divider implemented with AlGaAs/InGaAs/GaAs heterojunction bipolar transistors (HBT's). The divide-by-four static frequency divider was fabricated with a fully self-aligned dual-lift-off HBT process. A maximum operating frequency of 20.1 GHz was achieved. This is the highest frequency ever reported for static frequency dividers.     

50 GHz static frequency divider in 130 nm CMOS

A novel circuit topology and design procedure to increase the operating frequency of current model logic (CML) static frequency dividers is proposed. The topology and design procedure are used to design a 50 GHz CML static frequency divider in 130 nm CMOS. The designed divider has a 20 GHz division bandwidth and consumes 11.7 mW power from a 1.5 V supply.     

共振隧穿器件应用电路概述——共振隧穿器件讲座(2)

在“共振隧穿器件概述”的基础上,对共振隧穿器件应用电路作了全面概括的介绍。首先对共振隧穿器件应用电路的特点、分类和发展趋势作了简述;进一步对由RTDH/EMT构成的单-双稳转换逻辑单元(MOBILE)和以它为基础构成的RTD应用电路,包括柔性逻辑、静态随机存储(SRAM)、神经元、静态分频器等电路的结构、工作原理和逻辑功能等进行了介绍。关于RTD/HEMT构成的更为复杂的电路,如多值逻辑、AD转换器以及RTD光电集成电路等将在本讲座最后部分进行讲解。     

An efficient HBT/RTD oscillator for wireless applications

In this paper, we introduce a novel HBT/RTD oscillator suitable for monolithic integration and efficient low power/battery-operated applications. Implementation of a circuit prototype was accomplished by configuring an InP-based monolithic HBT/RTD chip with a gold wire bond inductor in a hybrid microwave package. For an output frequency of 5.8 GHz, the circuit draws a current of 15.5 mA from a 1.5 V supply and generates an output power of +3.13 dBm, for an efficiency of 8.84%     

A Fully Differential Low-Power Divide-by-8 Injection-Locked Frequency Divider Up to 18 GHz

A low power divide-by-8 injection-locked frequency divider is presented. The frequency divider consists of four current-mode logic (CML) D-latches connected in the form of a four-stage ring with the differential input signal injected into the clock terminals of the latches. The output signals can be taken from the data terminals of any of the four latches. The proposed frequency divider has higher operating frequency and lower power dissipation compared with conventional static frequency dividers. Compared with existing injection-locked frequency dividers, the proposed fully differential frequency divider presents wider locking range with the center frequency independent of injection amplitude. The frequency divider is implemented in TSMC 0.18 mum CMOS technology. It consumes around 3.6 mW power with 1.8 V supply. The operating frequency can be tuned from 4 GHz to 18 GHz. The ratio of the locking range over the center frequency is up to 50% depending on the operating frequency and biasing conditions     

A Tail-Injected Divide-by-4 SiGe HBT Injection Locked Frequency Divider

This letter presents a silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) divide-by-4 injection locked frequency divider (ILFD). The ILFD is based on a single-stage voltage-controlled oscillator with active-inductor, and was fabricated in the 0.35 mu m SiGe 3P3M BiCMOS technology. The divide-by-4 function is performed by injecting a signal to the base of the tail HBT. Measurement results show that when the supply voltage V_DD is 3.1 V and the tuning voltage is tuned from 2.0 to 2.8 V, the divider free-running oscillation frequency is tunable from 2.12 to 2.76 GHz, and at the incident power of 0 dBm the operation range is about 1.15 GHz, from the incident frequency 8.55 to 9.7 GHz. The die area is 0.65 times 0.435 mm².     

1 V 10 GHz CMOS frequency divider with low power consumption

A low supply voltage and low power ultra-high frequency divider is investigated. The proposed inverter of the frequency divider is able to operate at higher frequencies with enhanced output voltage swing and lower power consumption under an ultra-low supply voltage compared to that of existing divide-by-2 units. The frequency divider implemented with this inverter using the Chartered 0.18 /spl mu/m CMOS process is capable of operating up to 10 GHz for a 1 V supply voltage with 1.3 mW power consumption.     

High-speed small-scale InGaP/GaAs HBT technology and itsapplication to integrated circuits

We have developed the advanced performance, small-scale InGaP/GaAs heterojunction bipolar transistors (HBTs) by using WSi/Ti base electrode and buried SiO₂ in the extrinsic collector. The base-collector capacitance C_BC was further reduced to improve high-frequency performance. Improving the uniformity of the buried SiO ₂, reducing the area of the base electrode, and optimizing the width of the base-contact enabled us to reduce the parasitic capacitance in the buried SiO₂ region by 50% compared to our previous devices. The cutoff frequency f_T of 156 GHz and the maximum oscillation frequency f_max of 255 GHz were obtained at a collector current I_C of 3.5 mA for the HBT with an emitter size S_E of 0.5×4.5 μm², and f_T of 114 GHz and f_max of 230 GHz were obtained at I_C of 0.9 mA for the HBT with S_E of 0.25×1.5 μm². We have also fabricated digital and analog circuits using these HBTs. A 1/8 static frequency divider operated at a maximum toggle frequency of 39.5 GHz with a power consumption per flip-flop of 190 mW. A transimpedance amplifier provides a gain of 46.5 dB·Ω with a bandwidth of 41.6 GHz at a power consumption of 150 mW. These results indicate the great potential of our HBTs for high-speed, low-power circuit applications     

Single-Chip W-band SiGe HBT Transceivers and Receivers for Doppler Radar and Millimeter-Wave Imaging

This paper presents the first single-chip direct-conversion 77-85 GHz transceiver fabricated in SiGe HBT technology, intended for Doppler radar and millimeter-wave imaging, particularly within the automotive radar band of 77-81 GHz. A 1.3 mm times 0.9 mm 86-96 GHz receiver is also presented. The transceiver, fabricated in a 130 nm SiGe HBT technology with f_T/f_MAX of 230/300 GHz, consumes 780 mW, and occupies 1.3 mm times 0.9 mm of die area. Furthermore, it achieves 40 dB conversion gain in the receiver at 82 GHz, a 3 dB bandwidth extending from 77 to 85 GHz at 25degC, and covering the entire 77-81 GHz band up to 100degC, record 3.85 dB DSB noise figure measured at 82 GHz LO and 1 GHz IF, and an IP_1dB of -35 dBm. The transmitter provides + 11.5 dBm of saturated output power at 77 GHz, and a divide64 static frequency divider is included on-die. Successful detection of a Doppler shift of 30 Hz at a range of 6 m is shown. The 86-96 GHz receiver achieves 31 dB conversion gain, a 3 dB bandwidth of 10 GHz, and 5.2 dB DSB noise figure at 96 GHz LO and 1 GHz IF, and -99 dBc/Hz phase noise at 1 MHz offset. System-level layout and integration techniques that address the challenges of low-voltage transceiver implementation are also discussed.     

1.3 V supply voltage 38 GHz static frequency divider

An ultra-low supply voltage and low power dissipation fully static frequency InP SHBT divider operating at up to 38 GHz is reported. The fully differential parallel current switched configuration of D-latch maintains the speed advantages of CML circuits while allowing full functionality at a very low supply voltage. The frequency divider operates at up to 38 GHz at a single-ended input power of 0 dBm. The power dissipation of the toggled D-flip-flop is 8 mW at a power supply voltage of 1.3 V. The authors believe this is the lowest supply voltage for static frequency dividers around this frequency in any technology. This low power configuration is suitable for any digital integrated circuit.     

A Si bipolar 21-GHz/320-mW static frequency divider

A silicon bipolar divide-by-eight static frequency divider was developed. A state-of-the-art advanced borosilicate-glass self-aligned (A-BSA) transistor technology that has a cutoff frequency of 40 GHz at V_ce=1 V was applied. Optimum circuit and layout designs were carried out for high-speed/low-power operation. The single-ended input realized by an on-chip metal-insulator-metal (MIM) capacitor makes it easy to use in microwave applications. Ultrahigh-speed operation, up to 21 GHz, was realized, with 320-mW power dissipation from a single +5-V supply. The static frequency divider is a suitable prescaler for phase-locked oscillators (PLOs), completely covering microwave frequencies from L band through Ku band (1-18 GHz)     

The design, fabrication, and characterization of a novel electrode structure self-aligned HBT with a cutoff frequency of 45 GHz

This paper establishes a systematic approach for the design, fabrication, and modeling of a newly proposed self, aligned Al-GaAs/GaAs heterojunction bipolar transistor (HBT) employing a two-dimensional heterostructure device simulator and a heterojunction bi-polar transistor circuit simulator. The developed HBT has an abrupt emitter-base heterojunction, and applies a novel structure in which a single base electrode is placed between two emitter electrodes. A fabricated 3 × 8 µm²two-emitter HBT exhibits a measured current gain cutoff frequency fT= 45 GHz and a maximum oscillation frequency fmax= 18.5 GHz. Results of frequency divider circuit Simulation indicate that the developed HBT would be 1.4 times faster than a conventional HBT in which one emitter electrode is located between two base electrodes.     

Very-high-speed InP/InGaAs HBT ICs for optical transmission systems

High-speed ICs for 20-40-Gbit/s time-division multiplexing (TDM) optical transmission systems have been designed and fabricated by using InP/InGaAs heterojunction-bipolar-transistor (HBT) technology. This paper describes four analog ICs and four digital ICs: a five-section cascode distributed amplifier with a gain of 9.5 dB and a bandwidth of 50 GHz, a three-section single-end-to-differential converter with a bandwidth of 40 GHz, a cascode differential amplifier with a gain of 10.5 dB and a bandwidth of 64 GHz, a preamplifier with a gain of 41.9 dBΩ and a bandwidth of 39 GHz, a modulator driver with an output voltage swing of 3.2 V peak-to-peak and rise and fall times of 16 and 15 ps, a 40-Gbit/s selector, a 20-Gbit/s D-type flip-flop, and a static frequency divider with an operating range of 2.0-44.0 GHz. All the ICs were measured with on-wafer RF probes     

165-GHz Transceiver in SiGe Technology

Two D-band transceivers, with and without amplifiers and static frequency divider, transmitting simultaneously in the 80-GHz and 160-GHz bands, are fabricated in SiGe HBT technology. The transceivers feature an 80-GHz quadrature Colpitts oscillator with differential outputs at 160 GHz, a double-balanced Gilbert-cell mixer, 170-GHz amplifiers and broadband 70-GHz to 180-GHz vertically stacked transformers for single-ended to differential conversion. For the transceiver with amplifiers and static frequency divider, which marks the highest level of integration above 100 GHz in silicon, the peak differential down-conversion gain is -3 dB for RF inputs at 165 GHz. The single-ended, 165-GHz transmitter output generates -3.5 dBm, while the 82.5-GHz differential output power is +2.5 dBm. This transceiver occupies 840 mum times 1365 mum, is biased from 3.3 V, and consumes 0.9 W. Two stand-alone 5-stage amplifiers, centered at 140 GHz and 170 GHz, were also fabricated showing 17 dB and 15 dB gain at 140 GHz and 170 GHz, respectively. The saturated output power of the amplifiers is +1 dBm at 130 GHz and 0 dBm at 165 GHz. All circuits were characterized over temperature up to 125degC. These results demonstrate for the first time the feasibility of SiGe BiCMOS technology for circuits in the 100-180-GHz range.     

A Si bipolar 28-GHz dynamic frequency divider

A dynamic frequency divider applying the regenerative frequency division principle has been developed. A spiral inductor on the silicon substrate used as a load is characterized, and an improved one-port model with the substrate resistance is discussed. A 1/16 frequency divider was implemented with a silicon bipolar technology with a cutoff frequency of 40 GHz. The operation frequency range was 11.8-28.1 GHz, covering the Ka band (18-26.5 GHz). The inductive load has improved the maximum operation frequency by 7%, compared with a conventional circuit. Complemented with a 21-GHz static frequency divider previously reported by the authors, the whole microwave frequency range up to 26.5 GHz has been completely covered with the silicon bipolar technology. The maximum operation frequency of a silicon MMIC has been extended to the millimeter-wave frequency region for the first time