可重构双频段低噪声放大器的设计和实现

A reconfigurable dual-band LNA is presented. The LNA employs switching capacitors and circuit in to realize the dual-band operation. These methodologies are used to design and implement a reconfigurable LNA for IMT-A and UWB application. The LNA is implemented using TSMC-0.13 μm CMOS technology. Measured performance shows an input matching of better than -13.5 dB, a voltage gain of 18-22.8 dB, with an NF of 4.3-4.7 dB in the band of 3.4-3.6 GHz, and an input matching of better than -9.7 dB, a voltage gain of 14.7-22.4 dB, and with an NF of 3.7-4.9 dB in the band of 4.2-4.8 GHz. According to the measure results, the proposed LNA achieves dual-band operation, and it proves the feasibility of the proposed topology.     

双频段低噪声放大器的研究与设计

设计出一款可以并行式工作在900MHz和1.57 GHz双频段的低噪声放大器.电路采用5V电源供电,利用Ag-ilent公司的高电子迁移率晶体管ATF54143作为电路主芯片,考虑到整体电路的大小和性能好坏,偏置电路采用源极电感负反馈,输入匹配网络用LC双并联谐振腔串联型结构,最后利用ADS仿真得到结果,在900MHz/1.57GHz工作频率内,噪声系数分别为0.168 dB和0.332 dB,正向增益分别大于20dB和15dB,S11分别为-12dB和-15dB.同时保证电路在上述两个频段内是绝对稳定的.本论文可为双频段低噪声放大器的设计提供参考.     

CMOS多频段低噪声放大器设计

近年来,随着无线通信技术的蓬勃发展,可兼容多种移动通信系统标准的新一代移动终端的研究正逐渐成为热点.要实现多频段的移动终端接收系统,需要解决的首要问题就是如何实现位于该系统第一级的低噪声放大器LNA的多频段化.传统的方法是将多个单频段的LNA并联起来使用,但会造成较大的功耗,占用较大的芯片面积,增加成本,而且随着接收标准的不断增多,该方法最终将不可行;另外一种实现多频段的方式是采用开关式LNA,但其只能工作于一个频段下,当希望能同时工作于多个频段时,该方法也将不适用;还可以采用宽带LNA来实现多个频段的放大,但同时也会放大其他频段的干扰信号.     

基于遗传算法工具箱的宽带LNA设计

探讨了一种新的设计宽带微波低噪声放大器方法;为了降低放大器的噪声系数,采用了低噪声的反馈结构,利用MATLAB遗传算法工具箱进行仿真设计,实现了在0.8～2.4GHz频率范围内,增益G>20dB、增益平坦度|△G|<1.5dB、输入、输出驻波比VSWR<2.2的指标。实测结果证明了仿真结果的正确性。     

CMOS planar spiral inductor modeling and low noise amplifier design

During this study, various narrowband single-ended inductive source degenerated Low Noise Amplifiers (LNAs) for GSM and S-band low earth orbit (LEO) space applications have been designed, simulated and compared using Mietec CMOS 0.7 μm process and the Cadence/BSIM3v3. To get more realistic results, parasitic effects due to layout have been calculated and added to the simulations. Also, considering the inductive source degenerative topology, most of the attention is given on the modeling of planar spiral inductor by lumped element circuits. Moreover to decrease the substrate effects, the inductors have been surrounded by grounded guard rings and have patterned ground shield (PGS) under them. The simulation results of LNA including the parasitic effects indicate a forward gain of 9 dB with noise figure of 4.5 dB while drawing 18 mW from+3 V supply at 2210 MHz. The area occupied is 1.8 mm×1.6 mm with pads, 1.3 mm×1.2 mm without pads.     

超高频窄带单级低噪声放大器的设计

文中介绍了一款超高频窄带低噪声放大器电路,该电路结构小巧(20 mm×13 mm,厚度为0.6 mm),功能可靠、稳定。放大器芯片采用3SK318YB,该芯片具有高增益、低噪声等特点。电路主要用于超高频段微波通信,电路拓扑结构采用反馈型、稳定衰减器法和低端增益衰减法进行设计。生产成品并经测试,该产品性价比高,完全达到了设计要求。     

用于GPS的低噪声放大器设计

文章介绍了一款应用于GPS L1频段的低噪声放大器,使用Infineon公司的BFP420射频晶体管。利用ADS软件介绍了射频低噪声放大器的设计步骤和指标,成功制作出实物,并利用网络分析仪和噪声分析仪等设备验证了放大器性能。此放大器与陶瓷天线结合,并接入到GPS接收器,于空旷地带测量了其接收GPS卫星信号的性能。     

Ultra-wideband CMOS low noise amplifier

A two-stage ultra-wideband CMOS low noise amplifier (LNA) is proposed. The first stage is optimised for wideband input matching and low noise figure, while the second stage is optimised to extend the -3 dB bandwidth of the overall amplifier. The combination of stages can provide lower noise figure and wider bandwidth simultaneously over that of previously reported feedback-based CMOS amplifiers. The implemented LNA shows a peak gain of 13.5 dB, more than 8.5 dB of input return loss, and a noise figure of 2.5-7.4 dB over a -3 dB bandwidth from 2 to 9 GHz with DC power consumption of 25.2 mW.     

一种低噪声高共模抑制比运算放大器的分析与设计

低噪声高共模抑制比的运算放大器是将套筒式共源共栅结构、差分输出和共模负反馈相结合,设计出的一种新型运算放大器.基于SMIC0.18 μm工艺模型对电路进行设计,仿真结果表明该电路的开环增益为82.3 dB,相位裕度为66°,共模抑制比为122 dB,增益平坦带宽为15 MHz,噪声为7.781 nV/sqrt （Hz）,达到设计要求.     

Power amplifier/low noise amplifier RF switch

Front-end RF switches commonly use PIN diodes as the switching element. A novel RF switch using the existing front-end power amplifier and low noise amplifier to give better performance with reduced component count and lower cost is demonstrated     

A low noise M-type parametric amplifier

A degenerate crossed-field cyclotron wave parametric amplifier in which all three interaction circuits are half-wave coaxial cavities is described. At a signal frequency of 1957 Mc the over-all measured noise figure was 5 db with a contribution due only to beam noise of 3.2 db. The signal saturation gain at low input levels was 40 db. The amplifier operated with a beam current of a few microamperes and a beam voltage of a few tenths of a volt. Several differences between the O-type and the M-type cyclotron wave parametric amplifiers are discussed. Other experimental results are reported.     

Triple cascaded current-reuse low noise amplifier

A triple cascaded current-reuse CMOS low noise amplifier for 3.5 GHz WiMAX application is presented. Three common-source amplifiers are stacked and reuse the same current. This triple cascaded topology is able to enhance power gain but needs two coupling networks which costs enormous chip size. In order to have reasonable chip size, two coupling methods are investigated. For obtaining simultaneous input and noise matching, an additional capacitor is employed to adjust quality factor and reduce the gate induced current noise. The measurement results show a maximum power gain of 21.7 dB and minimum noise figure of 3.11 dB. The chip size is 1.05 mm \(\times\) 0.93 mm including all pads and the power consumption is 5.16 mW with a supply voltage of 1.5 V. A figure-of-merit of 49.7 is reached.     

北斗+GPS高性能低噪声放大器的研究与设计

针对国内北斗行业的发展和双模定位的优点以及北斗B1频段和GPS相近的特点,给出了一种适用于北斗B1频段和GPS L1频段的低噪声放大器的设计原理和设计方法,并制作出实物,给出了测试结果。为了达到更好的增益,采用了3级级联的方式。设计出的低噪声放大器的在B1和L1频段内的增益（38±0.5）dB,输入驻波系数小于1.8,输出驻波系数小于1.2,噪声系数小于0.65dB,在全频段内无条件稳定,可用于北斗B1频段和GPS L1频段。     

一种宽带低噪声放大器的设计

随着无线通信的迅猛发展,提高了对射频技术的要求。本文就射频前端的低噪声放大器设计进行研究和分析,并且进行了流片生产和测试。首先进行了基础理路的研究分析,通过仿真电路满足性能,最后再通过流片测试得到结论。本文中对其带宽以及噪声系数进行了测试并且与预期效果很接近。通过本文设计得到了带宽为近1.5GHz,其增益的大小为23.2dB。     

微型封装P波段低噪声场效应管放大器

介绍了 0 .5～ 1 .0 GHz微波微封装低噪声场效应管放大器的研制。采用负反馈的设计原理 ,利用 Serenade软件进行了 CAD设计。主要指标为 :工作频率 0 .5～ 1 .0 GHz,增益≥ 2 5 d B,增益平坦度≤± 0 .5 d B,驻波比≤ 2 .0∶ 1 ,噪声系数≤ 1 .0 d B,封装形式 TO- 8F。     

Complete high-frequency thermal noise modeling of short-channel MOSFETs and design of 5.2-GHz low noise amplifier

Taking a velocity saturation effect and a carrier heating effect in the gradual channel region, complete thermal noise modeling of short-channel MOSFETs including the induced gate noise and its correlation coefficients is presented and verified extensively with experimentally measured data. All of the four noise models have excellently predicted experimental data with maximal error less than 10% for the deep-submicron MOSFETs. Using these models and a simultaneous matching technique for both optimal noise and power, a low noise CMOS amplifier optimized for 5.2-GHz operation has been designed and fabricated. Experiments using an external tuner show that both NF/sub 50/ and NF/sub min/ are very close to 1.1 dB, which is an excellent figure of merit among reported LNAs.     

一种低功耗K频段低噪声放大器

基于0.13μm锗硅(SiGe)双极型互补金属氧化物(Bipolar Complementary Metal Oxide Semi-conductor,BiCMOS)工艺,设计制作了一种高增益低功耗K频段低噪声放大器(Low Noise Amplifier,LNA),通过优化晶体管尺寸及利用硅通孔设计高品质因数射极退化...     

低频低噪声测量放大器的设计

低频噪声是表征半导体器件质量和可靠性的一个重要敏感参数,为了能够测量电子器件低频噪声,使用分立器件SSM-2220组成偏置电路,由ADA4898-1构成前置放大器,采用噪声匹配变压器法设计一种测量低频低噪声的放大器。实验结果表明:在频率为80 k Hz以下,放大器输入端共模抑制比高出集成运放OP-37 228 d B,其系统的噪声系数低于前置放大器ADA-40752 0.3 d B,满足低频低噪测量放大器的设计要求。