Evaluation of lateral barrier height of inhomogeneous photolithography-fabricated Au/n-GaAs Schottky barrier diodes from 80 K to 320 K

In order to evaluate current conduction mechanism in the Au/n-GaAs Schottky barrier diode (SBD) some electrical parameters such as the zero-bias barrier height (BH) Φ_bo(I–V) and ideality factor (n) were obtained from the forward bias current–voltage (I–V) characteristics in wide temperature range of 80–320 K by steps of 10 K. By using the thermionic emission (TE) theory, the Φ_bo(I–V) and n were found to depend strongly on temperature, and the n decreases with increasing temperature while the Φ_bo(I–V) increases. The values of Φ_bo and n ranged from 0.600 eV and 1.51(80 K) to 0.816 eV and 1.087 (320 K), respectively. Such behavior of Φ_bo and n is attributed to Schottky barrier inhomogeneities by assuming a Gaussian distribution (GD) of BHs at Au/n-GaAs interface. In the calculations, the electrical parameters of the experimental forward bias I–V characteristics of the Au/n-GaAs SBD with the homogeneity in the 80–320 K range have been explained by means of the TE, considering GD of BH with linear bias dependence.     

Fabrication and electrical characterization of Al/p-ZnIn2Se4 thin film Schottky diode structure

Polycrystalline thin films of ternary ZnIn₂Se₄ compound with p-type conductivity were deposited on a pre-deposited aluminium (Al) film by a flash evaporation technique. A Schottky diode comprising of Al/p-ZnIn₂Se₄ structure was fabricated and characterized in the temperature range 303–323 K in dark condition. The Schottky diode was subjected to current (I)-voltage (V) and capacitance (C)-voltage (V) characterization. The Al/p-ZnIn₂Se₄ Schottky diode showed behaviour typical of a p-n junction diode. The devices showed very good diode behaviour with the rectification ratio of about 10⁵ at 1.0 V in dark. The Schottky diode ideality factor, barrier height, carrier concentration, etc. were derived from I-V and C-V measurements. At lower applied voltages (V≤0.5 V), the electrical conduction was found to take place by thermionic emission (TE) whereas at higher voltages (V>0.5 V), a space charge limited conduction mechanism (SCLC) was observed. An energy band diagram was constructed for fabricated Al/p-ZnIn₂Se₄ Schottky diode.     

Determination of contact parameters of Ni/n-GaP Schottky contacts

The electrical analysis of Ni/n-GaP structure has been investigated by means of current–voltage (I–V), capacitance–voltage (C–V) and capacitance–frequency (C–f) measurements in the temperature range of 120–320 K in dark conditions. The forward bias I–V characteristics have been analyzed on the basis of standard thermionic emission (TE) theory and the characteristic parameters of the Schottky contacts (SCs) such as Schottky barrier height (SBH), ideality factor (n) and series resistance (R_s) have been determined from the I–V measurements. The experimental values of SBH and n for the device ranged from 1.01 eV and 1.27 (at 320 K) to 0.38 eV and 5.93 (at 120 K) for Ni/n-GaP diode, respectively. The interface states in the semiconductor bandgap and their relaxation time have been determined from the C–f characteristics. The interface state density N_ss has ranged from 2.08 × 10¹⁵ (eV^?1 m^?2) at 120 K to 2.7 × 10¹⁵ (eV^?1 m^?2) at 320 K. C_ss has increased with increasing temperature. The relaxation time has ranged from 4.7 × 10^?7 s at 120 K to 5.15 × 10^?7 s at 320 K.     

Electrical characterization of current conduction in Au/TiO2/n-Si at wide temperature range

In this study, we have examined Au/TiO₂/n-Si Schottky barrier diodes (SBDs), in order to interpret in detail the experimental observed non-ideal current–voltage–temperature (I–V–T) characteristics. I–V characteristics were measured in the wide temperature range of 80–400 K. TiO₂ was deposited on n-Si substrate by reactive magnetron sputtering. The zero-bias barrier height (ϕ_B0) and ideality factor (n) show strong temperature dependence. While n decreases, ϕ_B0 increases with increasing temperature. Experimental results show that the current across the SBDs may be greatly influenced by the existence of Schottky barrier height (SBH) inhomogeneity. These temperature behaviors have been explained on the basis of the thermionic emission (TE) theory with Gaussian distribution (GD) of the barrier heights (BHs) due to BH inhomogeneities at metal–semiconductor (M/S) interface. From this assumptions, obtaining Richardson constant value of the A^* 121.01 A/cm² K² is perfect agreement with the theoretical value of 120 A/cm² K² for n-type Si. Hence, behaviors of the forward-bias I–V characteristics of the Au/TiO₂/n-Si (SBDs) can be successfully explained on the basis of a TE mechanism with a double Gaussian distribution of the BHs.     

Electrical characterization and DLTS analysis of a gold/n-type gallium nitride Schottky diode

This work describes a comparison of current density–voltage (J–V) and capacitance–voltage (C–V) properties measured as a function of temperature; deep trap properties are measured by deep level transient spectroscopy (DLTS) of Schottky diodes fabricated on n-type gallium nitride (GaN grown by metal organic vapor phase epitaxy (MOVPE). Unexpected behavior in the standard Richardson plot was observed in the temperature range 165–480 K, reflecting a range of Schottky barrier heights and a variation of ideality factor. This was explained by applying a Gaussian spatial distribution of barrier heights across the Schottky diode. C–V measurements were carried out in the temperature range 165–480 K to compare the temperature dependence of the barrier height with those obtained by the Gaussian distribution method. DLTS and high-resolution Laplace DLTS (LDLTS) show a majority carrier peak centered at 450 K.     

Current–voltage and capacitance–voltage characteristics of Al Schottky contacts to strained Si-on-insulator in the wide temperature range

The electrical characteristics of Al/strained Si-on-insulator (sSOI) Schottky diode have been investigated using current–voltage (I–V) and capacitance–voltage (C–V) measurements in the wide temperature range of 200–400 K in steps of 25 K. It was found that the barrier height (0.57–0.80 eV) calculated from the I–V characteristics increased and the ideality factor (1.97–1.28) decreased with increasing temperature. The barrier heights determined from the C–V measurements were higher than those extracted from the I–V measurements, associated with the formation of an inhomogeneous Schottky barrier at the interface. The series resistance estimated from the forward I–V characteristics using Cheung and Norde methods decreased with increasing temperature, implying its strong temperature dependence. The observed variation in barrier height and ideality factor could be attributed to the inhomogeneities in Schottky barrier, explained by assuming Gaussian distribution of barrier heights. The temperature-dependent I–V characteristics showed a double Gaussian distribution with mean barrier heights of 0.83 and 1.19 eV and standard deviations of 0.10 and 0.16 eV at 200–275 and 300–400 K, respectively. From the modified Richardson plot, the modified Richardson constant were calculated to be 21.8 and 29.4 A cm⁻² K⁻² at 200–275 and 300–400 K, respectively, which were comparable to the theoretical value for p-type sSOI (31.6 A cm⁻² K⁻²).     

The effect of annealing temperature on the electronic parameters and carrier transport mechanism of Pt/n-type Ge Schottky diode

The Pt nano-film Schottky diodes on Ge substrate have been fabricated to investigate the effect of annealing temperature on the characteristics of the device. The germanide phase between Pt nano-films and Ge substrate changed and generated interface layer PtGe at 573 K and 673 K, Pt₂Ge₃ at 773 K. The current–voltage(I - V) characteristics of Pt/n-Ge Schottky diodes were measured in the temperature range of 183–303 K. Evaluation of the I - V data has revealed an increase of zero-bias barrier height Φ_B0 but the decrease of ideality factor n with the increase in temperature. Such behaviors have been successfully modeled on the basis of the thermionic emission mechanism by assuming the presence of Gaussian distributions. The variation of electronic transport properties of these Schottky diodes has been inferred to be attributed to combined effects of interfacial reaction and phase transformation during the annealing process. Therefore, the control of Schottky barrier height at metal/Ge interface is important to realize high performance Ge-based CMOS devices.     

The temperature dependent analysis of Au/TiO2 (rutile)/n-Si (MIS) SBDs using current–voltage–temperature (I–V–T) characteristics

In this study, the main electrical parameters of Au/TiO₂(rutile)/n-Si Schottky barrier diodes (SBDs) were analyzed by using current–voltage–temperature (I–V–T) characteristics in the temperature range 200–380 K. Titanium dioxide (TiO₂) thin film was deposited on a polycrystalline n-type Silicon (Si) substrate using the DC magnetron sputtering system at 200 °C. In order to improve the crystal quality deposited film was annealed at 900 °C in air atmosphere for phase transition from amorphous to rutile phase. The barrier height (Φ_b) and ideality factor (n) were calculated from I–V characteristics. An increase in the value of Φ_b and a decrease in n with increasing temperature were observed. The values of Φ_b and n for Au/TiO₂(rutile)/n-Si SBDs ranged from 0.57 eV and 3.50 (at 200 K) to 0.82 eV and 1.90 (at 380 K), respectively. In addition, series resistance (R_s) and Φ_b values of MIS SBDs were determined by using Cheung's and Norde's functions. Cheung's plots are obtained from the donward concave curvature region in the forward bias semi-logarithmic I–V curves originated from series resistance. Norde's function is easily used to obtain series resistance as a function of temperature due to current counduction mechanism which is dominated by thermionic emission (TE). The obtained results have been compared with each other and experimental results show that R_s values exhibit an unusual behavior that it increases with increasing temperature.     

Electrical properties of Au–Sb/p-GaSe:Gd Schottky barrier diode

Experimental results of the fabricated Schottky barrier diode on a GaSe:Gd substrate are presented. The electrical analysis of Au–Sb/p-GaSe:Gd structure has been investigated by means of current–voltage (I–V) and capacitance–voltage (C–V) measurements at 296 K temperature. The diode ideality factor and the barrier height have been obtained to be 1.07 and 0.85 eV, respectively, by applying a thermionic emission theory. At high currents in the forward direction, the series resistance effect has been observed. The series resistance has been determined from I–V measurements using Cheung's method.     

Temperature dependent dielectric studies of Ni/n-GaP Schottky diodes by capacitance and conductance measurements

The dielectric properties of Ni/n-GaP Schottky diode were investigated in the temperature range 140–300 K by capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements. The effect of temperature on series resistance (R_s) and interface state density (N_ss) were investigated. The dependency of dielectric constant (ε′), dielectric loss (ε′′), loss tangent (tan δ), ac conductivity (σ_ac), real (M′) and imaginary (M′′) parts of the electric modulus over temperature were evaluated and analyzed at 1 MHz frequency. The temperature dependent characteristics of ε′ and ε′′ reveal the contribution of various polarization effects, which increases with temperature. The Arrhenius plot of σ_ac shows two activation energies revealing the presence of two distinct trap states in the chosen temperature range. Moreover, the capacitance–frequency (C–f) measurement over 1 kHz to 1 MHz was carried out to study the effect of localized interface states.     

Characteristics of RF reactive sputter-deposited Pt/SiO2/n-InGaN MOS Schottky diodes

All RF sputtering-deposited Pt/SiO₂/n-type indium gallium nitride (n-InGaN) metal–oxide–semiconductor (MOS) diodes were investigated before and after annealing at 400 °C. By scanning electron microscopy (SEM), the thickness of Pt, SiO_2, n-InGaN layer was measured to be ~250, 70, and 800 nm, respectively. AFM results also show that the grains become a little bigger after annealing, the surface topography of the as-deposited film was smoother with the rms roughness of 1.67 nm and had the slight increase of 1.92 nm for annealed sample. Electrical properties of MOS diodes have been determined by using the current–voltage (I–V) and capacitance–voltage (C–V) measurements. The results showed that Schottky barrier height (SBH) increased slightly to 0.69 eV (I–V) and 0.82 eV (C–V) after annealing at 400 °C for 15 min in N₂ ambient, compared to that of 0.67 eV (I–V) and 0.79 eV (C–V) for the as-deposited sample. There was the considerable improvement in the leakage current, dropped from 6.5×10⁻⁷ A for the as-deposited to 1.4×10⁻⁷ A for the 400 °C-annealed one. The annealed MOS Schottky diode had shown the higher SBH, lower leakage current, smaller ideality factor (n), and denser microstructure. In addition to the SBH, n, and series resistance (R_s) determined by Cheungs׳ and Norde methods, other parameters for MOS diodes tested at room temperature were also calculated by C–V measurement.     

Electrical characteristics of Pd Schottky contacts on ZnO films

The electrical characteristics of Pd Schottky contacts on ZnO films have been investigated by current-voltage (I–V) and capacitance–voltage (C–V) measurements at different temperatures. ZnO films of two thicknesses (400 nm and 1000 nm) were grown by DC-magnetron sputtering on n-Si substrates. The basic structural, optical and electrical properties of these films are also reported. We compared the two Schottky diodes by means of characteristic parameters, such as rectification ratio, ideality factor (η), barrier height (Φ_b) and series resistance and obtained better results for the 1000 nm-ZnO Schottky diodes. We also discussed the dependence of I‐V characteristics on temperature and the two distinct linear regions observed at low temperatures are attributed to the existence of two different inhomogeneous barrier heights. From I–V plots in a log-log scale we found that the dominant current-transport mechanism at large forward bias is space-charge limited current (SCLC) controlled by the presence of traps within the ZnO bandgap. The existence of such traps (deep states or interface states) is demonstrated by frequency-dependent capacitance and deep-level transient spectroscopy (DLTS) measurements.     

Temperature-dependent resistive switching characteristics for Au/n-type CuAlOx/heavily doped p-type Si devices

Bipolar switching phenomenon is found for Au/n-type CuAlO_x/heavily doped p-type Si devices at temperatures above 220 K. For high or low resistive states (HRS or LRS), the electrical resistance is decreased with increasing temperature, indicating a semiconducting behavior. Carrier transport at LRS or HRS is dominated by hopping conduction. It is reasonable to conclude that the transition from HRS to LRS due to the migration of oxygen vacancies (V_O) is associated with electron hopping mediated through the V_O trap sites. The disappearance of the resistive switching behavior below 220 K is attributed to the immobile V_O traps. The deep understanding of conduction mechanism could help to control the device performance.     

Temperature and light dependent diode current in high-efficiency solution-processed small-molecule solar cells

This paper reports on the detail analysis of the DC electrical and photoelectrical properties of the high-efficient (η = 8.01% under standard 100 mW/cm² AM1.5 illumination) small molecule bulk heterojunction (SM BHJ) solar cells p-DTS(FBTTh₂)₂/PC₇₀BM. In this SM BHJ solar cell, the dark diode current is determined by the multistep tunnel-recombination via interface states at low forward bias (V < 0.65 V) and the interface state assisted thermionic emission at high forward bias (V > 0.65 V). The effect of illumination on the diode current was also quantitatively investigated. It was observed a reduced Shockley–Read–Hall recombination via interface states at large forward bias (from the maximum power point to the open-circuit conditions). The expression of the load I–V characteristic of the illuminated high-efficient SM BHJ solar cells was derived in the presence of the light dependent series and shunt resistance.     

Fabrication,temperature dependent current-voltage characteristics and photoresponse properties of Au/α-PbO2/p-Si/Al heterojunction photodiode

Thin film of lead dioxide, α-PbO₂, has been grown by thermal evaporation technique on the single crystal of p-Si substrate and heterojunction photodiode, Au/α-PbO₂/p-Si/Al, was fabricated. The current-voltage characteristics of the diode have been studied in the temperature ranged from 303 to 373 K and the voltage applied during measurements varied from −1 to 1.5 V. It was found from the (I-V) characteristics of the diode that the conduction mechanisms in the forward bias direction are controlled by the thermionic emission at bias potential ≤0.7 V followed by single trap space charge limited current (SCLC) conduction in the voltage range >0.7 V. The capacitance-voltage characteristics of the device were studied at room temperature in dark condition and it has been shown that the diode is abrupt junction. The carrier concentration on both sides of the depletion layer has been determined. Energy band diagram for α-PbO₂/p-Si device was constructed. The device under illumination with light of intensity 20 W/m² gives acceptable values of photoresponse parameters such as photosensitivity and photoconductivity. The presented photodiode parameters exhibit the typical photosensor applications with reproducibility phenomenon.     

Electrical parameters of a DC sputtered Mo/n-type 6H-SiC Schottky barrier diode

A Mo/n-type 6H-SiC/Ni Schottky barrier diode (SBD) was fabricated by sputtering Mo metal on n-type 6H-SiC semiconductor. Before the formation of Mo/n-type 6H-SiC SBD, an ohmic contact was formed by thermal evaporation of Ni on n-type 6H-SiC and annealing at 950 °C for 10 min. It was seen that the structure had excellent rectification. The electrical parameters were extracted using its current–voltage (I–V) and capacitance–voltage (C–V) measurements carried out at room temperature. Very high (1.10 eV) barrier height and 1.635 ideality factor values were reported for Mo/n-type 6H-SiC using ln I–V plot. The barrier height and series resistance values of the diode were also calculated as 1.413 eV and 69 Ω from Norde׳s functions, respectively. Furthermore, 1.938 eV barrier height value of Mo/n-type 6H-SiC SBD calculated from C–V measurements was larger than the one obtained from I–V data.     

The effects of thermal annealing on the electrical characteristics of Au/n–InP/In diode

An Au/n–InP/In diode has been fabricated in the laboratory conditions and the current–voltage (I–V) and capacitance–voltage (C–V) characteristics of the diode have been measured in room temperature. In order to observe the effect of the thermal annealing, this diode has been annealed at temperatures 100 and 200 °C for 3 min in N₂ atmosphere. The characteristic parameters such as leakage current, barrier height and ideality factor of this diode have been calculated from the forward bias I–V and reverse bias C–V characteristics as a function of annealing temperature. Also the rectifying ratio of the diode is evaluated for as-deposited and annealed diode.     

Influence of inhomogeneous contact in electrical properties of 4H–SiC based Schottky diode

Schottky diodes realized on 4H–SiC n-type wafers with an epitaxial layer and a metal-oxide overlap for electric field termination were studied. The oxide was grown by plasma enhanced chemical vapor deposition (PECVD) and the Schottky barriers were formed by thermal evaporation of titanium or nickel. Diodes, with voltage breakdown as high as 700 V and ideality factor as low as 1.05, were obtained and characterized after packaging in standard commercial package (TO220).The electrical properties such as ideality factor, hight barrier, the series resistance R_s were deduced by current/voltage (I–V) analysis using the least mean square (LMS) method. The temperature effect on break voltage, R_s and saturation current was studied. A model based on two parallel Schottky diodes with two barrier heights is presented for some devices having an inhomogeneous contact. It is shown that the excess current at low voltage can be explained by a lowering of the Schottky barrier in localized regions. We use the two series RC components electrical model in order to study the dynamic behaviour of the Schottky diode in low frequency and to improve the effect of barrier inhomogeneities in electrical properties.     

Characterizations of solid-state microwave-synthesized Sb2Te3-based alloys with various compositions of bismuth in Bi2xSb2(1−x)Te3

In this article, thermoelectric (TE) materials based on p-type Sb₂Te₃ samples and dispersed with x amounts of Bi (x=0.0, 0.2, 0.4, 0.6, 0.8, and 1.0) in the form Bi_2xSb_2(1−x)Te₃ were synthesized via a standard solid-state microwave route. The microstructure of the ingots was characterized by field emission scanning electron microscopy. As-synthesized ingots were formed by the assembly of micro-sheet grains. The phase composition of the powders was characterized by X-ray diffraction, revealing a rhombohedral structure. The influence of variations in Bi content (x) on the TE properties of the resulting alloy was studied in the temperature range of 303 K to 523 K. Increases in x caused a decrease in hole concentration and electrical conductivity and an increase in Seebeck coefficient. A maximum power factor of 4.96 mW/mK² was obtained at about 373 K for a Bi_2xSb_2(1−x)Te₃ sample with x=0.2.     

Investigations on phosphorus doped amorphous/nanocrystalline silicon films deposited by a filtered cathodic vacuum arc technique in the presence of hydrogen gas

Phosphorus doped amorphous/nanocrystalline silicon (a-Si:H/nc-Si:H) thin films have been deposited by a filtered cathodic vacuum arc (FCVA) technique in the presence of hydrogen gas at different substrate temperatures (T_s) ranging from room temperature (RT) to 350 °C. The films have been characterized by using X-ray diffraction (XRD), Raman spectroscopy, Fourier transform infrared (FTIR) spectroscopy, dark conductivity (σ_D), activation energy (ΔE), optical band gap (E_g) and secondary ion mass spectroscopy. The XRD patterns show that RT grown film is amorphous in nature but high temperature (225 and 350 °C) deposited films exhibit nanocrystalline structure with (111) and (220) crystal orientations. The crystallite size of higher temperature grown silicon film evaluated was between 13 and 25 nm. Raman spectra reveal the amorphous nature of the film deposited at RT, whereas higher temperature deposited films show crystalline nature. The crystalline volume fraction of the silicon film deposited at higher temperatures (225 and 350 °C) was estimated to be 58 and 72%. With the increase of T_s, the bonding configuration changes from mono-hydride to di-hydride as revealed by the FTIR spectra. The values of σ_D, ΔE and E_g of silicon films deposited at different T_s were found to be in the range of 5.37×10⁻⁴–1.04 Ω⁻¹ cm⁻¹, 0.05–0.45 eV and 1.42–1.83 eV, respectively. Photoconduction of 3.5% has also been observed in n-type nc-Si:H films with the response and recovery times of 9 and 12 s, respectively. A n-type nc-Si:H/p-type c-Si heterojunction diode was fabricated which showed the diode quality factor between 1.6 and 1.8.