基于状态方程法的不同ESD电路对比分析

针对IEC 61000-4-2中规定的典型静电放电(electrostatic discharge, ESD)电流波形存在拟合多样性且不易通过具体电路实现这一问题, 采用求解电路状态方程组的方法对四种ESD模拟器电路进行了计算.得到了四种指数形式的ESD电流解析表达式, 绘制了相应的电流曲线, 分别讨论了四种ESD模拟器电路产生的ESD电流波形解析式的连续性和可导性, 并对不同电路产生的ESD电流波形与IEC 61000-4-2标准规定电流波形之间的差异进行了对比分析.结果表明不同ESD电路产生的电流波形的四个主要指标符合IEC 61000-4-2标准规定, 但由于电路的拓扑结构和元件参数不同, 求得的电流波形解析式的连续性和可导性存在差异, 因此在选择ESD模型时, 应根据实际的人体参数和放电枪参数确定合适的电路结构.该计算方法适用于求解集总参数电路, 为ESD电磁脉冲辐射场仿真计算提供了新的电流解析式.     

RS-485通信链路与电子护栏

EVAL-CN0313-SDPZ是业界首个EMC兼容RS-485接口设计工具,可提供针对IEC61000-4-2 ESD、IEC61000-4-4 EFT和IEC61000-4-5电涌的四级保护。工程师可在设计周期之初考虑EMC问题,从而降低该问题导致的项目延误风险。     

二阶RLC低通滤波器

在900MHz～3GHz的手机通信频带内,EMIF10－LCD03F3的衰减度优于-40dB,在～3dB时带宽为200MHz,最大线路电容30pF,最大升降时间6ns,新产品为高速信号提供透明的EMI滤波功能。EMIF10－LCD03F3的输入输出引脚可承受＋15kV接触放电,超出最高的ESD防护标准IEC61000～4-2的4级标准。新产品的低钳位电压还高于普通分立网络的性能,在保证信号完整性的同时,还能进一步提高保护功能和可靠性。     

0201规格封装的ESD保护二极管

ESDALCxx-1U2系列ESD保护二极管产品比上一代缩小67％,能够承受最严格的IEC61000-4—2标准的ESD测试脉冲,低钳位电压特性有助于提高对调制解调器等低压芯片的保护性能。新系列包括ESDALC3V9-1U2、ESDALC6V1-1U2和ESDALC14V2-1U2三款产品,击穿电压分别为3．9V、     

IEC发布的新标准

CISPR 14-1 Amd.1 Ed. 5.0 （2008-11）,Project IEC 61000-3-2 Amd.2 Ed. 3.0 （2008-11）,Project IEC 61000-4-27 Amd.1 Ed. 1.0 （2008-11）,Project IEC 61000-4-28 Amd.2 Ed. 1.0 （2008-11）,S＋ IEC 61000-4-6 Ed. 3.0 （2008-10）     

带ESD保护的EMI滤波器阵列CM1419

CM1419是带ESD保护、基于电感的两路EMI滤波器阵列，是一种可为移动音频提供完整高性能解决方案，集成了两个Pi滤波器（C—L—C），每路的元件数值为117pG-3．0nF-117pF，典型的串联电阻为0．28欧姆。在所有的输入，输出引脚集成有ESD保护二极管，可提供＋/-30KV的ESD尖峰，超过IEC61000-4—2国际标准的要求，在800MHz-2．1GHz频率范围内的衰减优于-40dB，5     

IEC 61000-3-2的修订

通过比较IEC 61000-3-2:2001和IEC 61000-3-2:2005内容上的异同,指出两个标准因引用IEC 61000-4-7不同版本,造成其内容差异较大,就主要差异内容进行了分析和说明,并给出了试验论据。     

元器件与组件

正高高可可靠靠性性、低低电电压压齐齐纳纳二二极极管管新型高可靠性ultra-sharp knee二极管器件瞄准国防、航天、工业和医疗市场中的低电压调节和瞬变保护应用,具有低额定电容和低额定泄漏电流特性,其反向泄漏电流低于50nA,工作电压为1～2.4V,测试电流为250μA时最高浪涌电流为25A,符合IEC 61000-42和IEC 61000-4-4标准的ESD和EFT保护。与标准齐纳二极管相比,这些产     

高速CAN收发器系列

TJA1042和TJA1051收发器针对高速CAN应用而设计,传输速度高达1MB／s,具有极低的电磁辐射（EME）特性,激振效应保护功能更强。即使对于ECU日益增多、总线拓扑结构持续复杂化的当前最先进的网络,上述特点也能确保通信的可靠性。改进后的ESD性能（IEC61000-4-2标准规定的±8kV）使工程师在无须外部ESD保护的情况下即可建立电控单元,从而在显著降低整体系统成本的同时,仍能持续满足最新ESD需求。     

ESD防护仿真技术研究

静电放电（ESD）一直是电子产品的重大威胁,严重的还会造成芯片失效。在设计阶段需对芯片受ESD冲击后的耦合情况进行预测评估,并为芯片设计有效的ESD防护,实现系统级高效ESD设计（SEED）成为发展趋势。文章研究了瞬态抑制二极管（TVS）对静电的响应情况,并将TVS分为回滞型与非回滞型,分别建立了SPICE模型。提出了一种新的ESD发生器电路模型和全波模型,所得电流波形与实测数据吻合较好。两种模型的电流特征值与IEC 61000-4-2:2008要求的偏差较小。为复现完整的系统级ESD测试环境提供了支持,也为探索芯片在系统级ESD测试下的行为模式打下基础。     

混响室校准与辐射抗扰度测试

在对混响室的基本原理进行简要介绍的基础上,依据标准IEC61000-4-21中的规定,对混响室的校准方法及操作过程进行了详细介绍和分析,并对在混响室内进行辐射抗扰度测试的方法及步骤进行了介绍。     

Characterization of human metal ESD reference discharge event and correlation of generator parameters to failure levels-part II: correlation of generator parameters to failure levels

Most electrostatic discharge (ESD) generators are built in accordance with the IEC 61000-4-2 specifications. It is shown, that the voltage induced in a small loop correlates with the failure level observed in an ESD failure test on the systems comprised of fast CMOS devices, while rise time and derivative of the discharge current did not correlate well. The electric parameters of typical ESD generators and ESD generators that have been modified to reflect the current and field parameters of the human metal reference event are compared and the effect on the failure level of fast CMOS electronics is investigated. The consequences of aligning an ESD standard with the suggestions of the first paper, of this two-paper series, are discussed with respect to reproducibility and test severity.     

混响室校准及测试

本文首先对混响室的发展、原理、主要性能参数进行了介绍,在此基础上依据标准IEC 61000-4-21中的规定,对混响室的校准方式进行了详细介绍和分析,并以辐射电磁场抗扰度为例,具体说明在混响室内进行测试的方法步骤.     

汽车电子设备静电放电抗扰度测试标准比较

比较并分析了汽车电子设备静电放电抗扰度测试国际标准ISO10605、IEC61000-4-2和整车厂商测试标准在人体放电模型、试验布置和试验方法等方面的差异,认为整车厂商标准比国际标准更具有可操作性和可重复性,并且在一定程度上提高了测试的严酷度。     

Characterization of human Metal ESD reference discharge event and correlation of generator parameters to failure levels-part I: reference event

Electrostatic discharge (ESD) generators are used for testing the robustness of electronics toward ESD. Most generators are built in accordance with the IEC 61000-4-2 specifications. Using only a few parameters, this standard specifies the peak current, the rise time and the falling edge. Lacking a transient field specification, test results vary depending on which generator is used, even if the currents are quite similar. Such a specification is needed to improve the test repeatability. As for the current, the specification should be based on a reference human metal ESD event. While keeping the presently set peak current and rise time values, such a reference ESD (5 kV, 850-/spl mu/m arc length) is identified and specifications for current derivative, fields, and induced voltages are derived. The reference event parameters are compared to typical ESD generators.     

EMC静电放电测试与预防

论文先引用EMC标准IEC61000-4—2中静电放电测试标准中的测试要求,测试原理,测试方法,再介绍常见的产品标准中对电子产品的静电放电要求。主要讲的是静电放电对电子产品的影响,以及一些基本的静电放电抗扰度的预防措施。     

On the uncertainty in the current waveform measurement of an ESDgenerator

The uncertainty in the current waveform measurement of an electrostatic discharge (ESD) generator is evaluated. The measurands are the current amplitude and the rise time of the output current waveform of the ESD generator. An intuitively simple model is proposed to evaluate the uncertainty in the current amplitude measurement. Type A and Type B evaluations for all contributions to the measurement uncertainty are performed to obtain the combined standard uncertainty. The evaluated expanded uncertainty (95.5% confidence level) of the current amplitude and the rise time at ESD voltages of 2, 4, 6, and 8 kV are within the specification of IEC 61000-4-2. The results show that the uncertainty in the current amplitude measurement stems from the voltage reading of the measuring equipment, the difference between the displayed and the actual voltages of the discharge tip of the ESD generator, and the inaccuracy of the delta time measurement of an oscilloscope, whereas the uncertainty in the rise time measurement mainly originates from the measuring equipment     

Failure mechanisms of discrete protection device subjected to repetitive electrostatic discharges (ESD)

High reliability electronic devices need to sustain thousands of electrostatic discharge (ESD) stresses during their lifetime. In this paper, it is demonstrated that repetitive ESD stresses on a protection device such as a bidirectional diode induce progressive defects into the silicon bulk. With “Sirtl etch” failure analysis technique, the defects could be localized quite precisely at the peripheral in/out junctions. The degradation mechanisms during repetitive IEC 61000-4-2 pulses have been investigated on a protection diode with the objective of improving the design for sustaining 1000 pulses at 10 kV level.