Structural characteristics of as-deposited and crystallized mixed-phase silicon films

In this work, we report on the structural characteristics of as-deposited and crystallized mixed-phase silicon films prepared by thermal decomposition of silane in a low pressure chemical vapor deposition reactor. Mixed-phase films consist of crystallites embedded in an amorphous matrix. The size of these crystallites depends upon the surface diffusion length, a parameter quantitatively expressing the potential of adsorbed silicon atoms for surface diffusion. The density of the pre-existing crystallites can be related to the maximum density of critical nuclei, which develops during the deposition of the film. Both variables were quantitatively related to the deposition temperature and rate via physical models reflecting the experimental observations. Values for the parameters associated with these models were extracted by fitting the experimental data to the theoretical equations. Our theoretical analysis is the first to relate quantitatively the structural characteristics of as-deposited mixed-phase films to the prevailing deposition conditions. Mixed-phase films can crystallize in a much shorter time than as-deposited amorphous films, due to the combination of the growth of the pre-existing crystallites and the higher nucleation rate of new crystallites within the amorphous matrix of the mixed-phase film. The crystallization time and final grain size of crystallized mixed-phase films were found to decrease with increasing density of pre-existing crystallites. However, we showed that if composite films are deposited, consisting of a mixed-phase layer and an amorphous layer, the grain size after crystallization could be comparable to that of crystallized as-deposited amorphous films, with the crystallization time of such composite films about threefold shorter. The structure of both as-deposited and crystallized single and composite mixed-phase films was found to be identical for films deposited on both oxidized silicon and Corning Code 1735 glass substrates.     

Characteristics of thin film transistors fabricated in polysilicon films deposited by plasma enhanced chemical vapor deposition

Thin-film transistors (TFTs) fabricated in polysilicon films deposited by plasma enhanced chemical vapor deposition (PECVD) were characterized. The transistors were fabricated using a low temperature process (i.e., <- 700° C). The characteristics of the devices were found to improve as the deposition temperature of the polysilicon film increased. The best characteristics (μ _FE of 15 cm²/V _s andV _TH of 2.2V) were measured in the devices fabricated in the film deposited at 700° C. The devices fabricated in the PECVD polysilicon films were compared to those fabricated in polysilicon films deposited by thermal CVD in the same reactor in order to decouple the effect of the plasma. A coplanar electrode structure TFT with adequate characteristics (μ _FE of 8 cm²/V _s) was also demonstrated in the PECVD polysilicon films.     

Top gate ZnO-Al2O3 thin film transistors fabricated using a chemical bath deposition technique

ZnO thin films were prepared by a simple chemical bath deposition technique using an inorganic solution mixture of ZnCl₂ and NH₃ on glass substrates and then were used as the active material in thin film transistors (TFTs). The TFTs were fabricated in a top gate coplanar electrode structure with high-k Al₂O₃ as the gate insulator and Al as the source, drain and gate electrodes. The TFTs were annealed in air at 500 ℃ for 1 h. The TFTs with a 50 μm channel length exhibited a high field-effect mobility of 0.45 cm²/(V·s) and a low threshold voltage of 1.8 V. The sub-threshold swing and drain current ON-OFF ratio were found to be 0.6 V/dec and 10⁶, respectively.     

PET柔性衬底上生长绒面ZnO-TCO薄膜及其在薄膜太阳电池中的应用

利用低压金属有机化学气相沉积(LP-MOCVD)技术在PET柔性衬底上低温生长绒面结构ZnO-TCO薄膜,DEZn和H2O作为源材料,B2H6作为掺杂剂.详细研究了薄膜掺杂流量对ZnO薄膜微观结构以及光电性能影响.优化获得的PET/ZnO:B薄膜厚约为1 500nm时,绒面结构PET/ZnO薄膜的方块电阻约为10Ω,可...     

Fabrication of organic thin film transistors on Polyethylene Terephthalate (PET) fabric substrates

In this paper organic thin film transistors (OTFTs) are directly fabricated on fabric substrates consisting of Polyethylene Terephthalate (PET) fibers. A key process is coating the polymer layers on the fabric in order to reduce the large surface roughness of the fabric substrate. Two polymers, i.e. polyurethane (PU) and photo-acryl (PA), are used to reduce the large surface roughness and simultaneously improve the process compatibility of the layers with the subsequent OTFTs processes while also retaining the original flexibility of the fabric. The surface roughness of the PU/PA-coated fabric is significantly reduced to 0.3 μm. Furthermore, the original flexibility of the PET fabric remained after coating of the PU/PA polymer layers. The mobility of the OTFTs fabricated on the PU-PA coated fabric substrate is 0.05 ± 0.02 cm²/V s when three PA layers and 90 nm thick pentacene layer were used. The performance does not vary even after 30,000 bending test.     

Atmospheric pressure chemical vapor deposition of blanket tungsten films on silicon substrates for integrated circuit applications

Atmospheric pressure chemical vapor deposition (APCVD) of tungsten films using WF₆/H₂ chemistry has been studied. A statistical design of experiments approach and a surface response methodology were used to determine the most important process parameters and to obtain the best quality film possible in the parameter range studied. It was found that the deposition rate depends strongly on WF₆ flow rate, temperature, and the interaction between hydrogen flow rate and temperature. The resistivity was found to have a strong dependence on WF₆ and H₂ flow rates and temperature. An activation energy of 0.4 eV was calculated for the reaction rate limited growth regime. Empirical equations for predicting the deposition rate and resistivity were obtained. The resistivity decreases with both increasing film thickness and grain size. The films grown in the studied process parameter range indicate that (110) is the preferred orientation for films deposited with low WF₆/H₂ flow rate ratios at all deposition temperatures (350–450°C), whereas, the (222) orientation dominates at high WF₆/H₂ flow ratios and high deposition temperatures. Also, the grain size is larger for (222) oriented films than for (110) oriented films. The results of this study suggest that high-quality, thin film tungsten can be deposited using APCVD.     

ZnO films deposited on GaAs substrates with a SiO2 thin buffer layer

Sputter deposition of ZnO films on GaAs substrates has been investigated. ZnO films were radio frequency (rf)-magnetron sputter deposited on GaAs substrates with or without SiO₂ thin buffer layers. Deposition parameters such as rf power, substrate-target distance, and gas composition/pressure were optimized to obtain highly c-axis oriented and highly resistive films. Deposited films were characterized by x-ray diffraction, scanning electron microscopy (SEM), capacitance, and resistivity measurements. Thermal stability of sputter-deposited ZnO films (0.5–2.0 μm thick) was tested with a post-deposition heat treatment at 430°C for 10 min, which is similar to a standard ohmic contact alloying condition for GaAs. The ZnO/SiO₂/GaAs films tolerated the heat treatment well while the ZnO/GaAs films disintegrated. The resistivity (10¹¹ Ω-cm) of the ZnO films on SiO₂-buffered GaAs substrates remained high during the heat treatment. The post-deposition anneal treatment also enhances c-axis orientation of the ZnO films dramatically and relieves intrinsic stress almost completely. These improvements are attributed to a reduction of grain boundaries and voids with the anneal treatment as supported by SEM and x-ray diffraction measurement results.     

不同方法及衬底类型对CdS多晶薄膜性能的影响

采用化学水浴法和磁控溅射法分别在AZO、FTO、ITO透明导电玻璃衬底上制备了CdS薄膜,利用扫描电镜、XRD以及透射光谱等测试手段,研究了两种制备方法对不同衬底生长CdS薄膜形貌、结构和光学性能的影响.研究结果表明,不同方法制备的CdS薄膜表面形貌均依赖于衬底的类型,水浴法制备的CdS薄膜晶粒度较大,表面相对粗糙.不同方法制备的CdS薄膜均为立方相和六角相的混相结构,溅射法制备的多晶薄膜衍射峰清晰、尖锐,结晶性较好.水浴法制备的CdS薄膜透过率整体低于溅射法,但在短波处优势明显.     

Device characteristics of amorphous indium gallium zinc oxide thin film transistors with ammonia incorporation

The effect of ammonia gas on amorphous indium gallium zinc oxide thin film transistors is investigated. The ammonia is incorporated into the sputtered a-IGZO film during the deposition process. The results indicate that the sub-threshold swing of the NH₃ incorporated TFTs is significantly improved from 2.8 to 1.0 V/decade, and the hysteresis phenomenon is also suppressed during the forward and reverse sweeping measurement. By X-ray photoelectron spectroscopy analyses, Zn-N and O-H bonds are observed in ammonia incorporated a-IGZO film. Therefore, the improvements in the electrical performance of TFTs are attributed to the passivation of dangling bonds and/or defects by ammonia.     

Realization of intrinsic p-type ZnO thin films by metal organic chemical vapor deposition

P-type ZnO thin films were grown on sapphire substrates with and without nitrous oxide (N₂O) by metal organic chemical vapor deposition (MOCVD). The intrinsic p-type ZnO films were achieved by controlling the Zn:O ratio in the range of 0.05–0.2 without N₂O flow. Secondary ion mass spectroscopy (SIMS) showed that the films contained little or no nitrogen (N) impurities for all samples. The p-type behavior of the samples should be due to the intrinsic acceptor-like defects V_Zn, for ZnO film grown without nitrous oxide, and N, occupying O sites as acceptors for ZnO film grown with nitrous oxide. The best p-type ZnO film has low resistivity of 0.369 Ω-cm, high carrier density of 1.62×10¹⁹ cm⁻³, and mobility of 3.14 cm²/V-s. The obtained p-type ZnO films possess a transmittance of nearly 100% in the visible region and strong near-band-edge emission.     

Electrical properties of silicon dioxide films fabricated at 700°C. I: Pyroltsis of tetraethoxysilane

We have studied the effects of different deposition and annealing ambients on silicon dioxide films produced via the pyrolytic decomposition of tetraethoxysilane at 700° C. The oxide and interface charge characteristics of capacitors incorporating these oxides were measured. The results of these studies were as follows. (1) Films deposited in nitrogen exhibited very poor electrical properties. This was due to the poor quality of both the LPCVD oxide bulk (manifest as a hysteretic instability exceeding one Volt in 20 nm films) and the LPCVD oxide-silicon interface (interface trap charge and fixed charge exceeding 10¹² cm⁻²). These characteristics were not improved by post-deposition annealing in nitrogen at 700° C. (2) As much as an order-of-magnitude reduction in interface traps and/or bias-induced drifts was obtained by exposure of the silicon substrate to 700°C oxygen ambients before, during, or after pyrolysis. The maximum improvement also required both post-deposition and post-metallization annealing treatments in nitrogen.     

Synthesis and electromagnetic transport of large-area 2D WTe2 thin film

Tungsten telluride thin films were successfully prepared on monocrystal sapphire substrates by using atomic layer deposition and chemical vapor deposition technology, and the effects of different tellurization temperatures on the properties of tungsten telluride films were investigated. The growth rate, crystal structure and composition of the film samples were characterized and analyzed by using scanning electron microscope, Raman spectroscopy and X-ray photoelectron spectroscopy. The results showed that tungsten telluride thin films with good crystal orientation in (001) were obtained at telluride temperature of 550 °C. When the telluride temperature reached 570 °C, the tungsten telluride began to decompose and unsaturated magnetoresistance was found.     

Growth of oriented diamond film on single crystalline 6H-SiC substrates

The bias-enhanced nucleation (BEN) technique in hot-filament chemical vapor deposition (HF-CVD) has been applied to single crystalline 6H-SiC substrates for the deposition of oriented diamond. The results of scanning electron microscopy (SEM) showed that on (000 ) face not only oriented diamond with relationship (111) Dia.//(000 )6H-SiC and 〈110〉Dia.//(11 0)6H-SiC, but also high nucleation density (>10⁹ cm⁻²) have been achieved. In the case of deposition on (0001) face of 6H-SiC under the same experimental conditions, although the nucleation density of diamond was enhanced, however, oriented diamond was not found. Diamond nucleation density is higher on (0001) face than that on (000 ) face. The differences in diamond oriented nucleation and nucleation density on these two faces are attributed to the difference of their specific free surface energy. The experimental results have shown that the 6H-SiC substrate surfaces are etched by the accelerated H-ions during BEN process, and many micro-triangular crystals with the faces of the kind {01 4} are formed on the substrate surface. Diamonds nucleate on the top of the micro-triangular crystals. Micro-Raman spectrum shows a strong feature of diamond crystals at 1334 cm⁻¹.     

衬底偏压对HWCVD制备纳米晶硅薄膜结晶性的影响

通过在热丝化学气相沉积(HWCVD)制备纳米晶硅 薄膜过程中施加衬底偏压,研 究衬底偏压对HWCVD制备纳米晶硅薄膜结晶性能的影响。利用拉曼(Raman)光谱,X射线 衍射(XRD)和扫描电子显微镜(SEM)对所制备的纳米晶硅薄膜的结构性能进行分析。结果表 明,与未施加衬底偏压的薄膜相比,当衬底偏压为－300V时,薄膜 的晶化率由42.2%升高至 46.2%;当衬底偏压升高至－600V时,晶化率 又降至40.6%;未施加衬底偏压与施加－300V 偏压的纳米晶硅薄膜表面由长约200nm、宽约100nm的晶粒构成,－600V衬底偏压的薄 膜表面晶粒尺寸明显变小,并且出现大量非常细小的晶粒。分析产生上述现象的原因,主要 与 高温热丝发射电子、电子在电场作用下加速运动并与反应气体、基团碰撞发生能量传递有关 。     

Stress and resistivity controls on in situ boron doped LPCVD polysilicon films for high-Q MEMS applications

addition, polysilicon thin films ported approaches avoid the high temperature annealing process (> 1000 ℃), and the promising properties of these films make them suitable for high-Q and high-f MEMS devices.     

应力和电阻率可控的适用于高品质因子MEMS器件的原位掺硼LPCVD多晶硅薄膜

The simultaneous control of residual stress and resistivity of polysilicon thin films by adjusting the deposition parameters and annealing conditions is studied. In situ boron doped polysilicon thin films deposited at 520 ℃ by low pressure chemical vapor deposition （LPCVD） are amorphous with relatively large compressive residual stress and high resistivity. Annealing the amorphous films in a temperature range of 600-800 ℃ gives polysilicon films nearly zero-stress and relatively low resistivity. The low residual stress and low resistivity make the polysilicon films attractive for potential applications in micro-electro-mechanical-systems （MEMS） devices, especially in high resonance frequency （high-f） and high quality factor （high-Q） MEMS resonators. In addition, polysilicon thin films deposited at 570 ℃ and those without the post annealing process have low resistivities of 2-5 mΩ·cm. These reported approaches avoid the high temperature annealing process （〉 1000 ℃）, and the promising properties of these films make them suitable for high-Q and high-f MEMS devices.     

Low-temperature ECR-PEMOCVD deposition of high-quality crystalline gallium nitride films: A comparative study of intermediate layers for growth on amorphous glass substrates

A low temperature growth method based on an electron cyclotron resonance plasma-enhanced metal organic chemical vapor deposition system (ECR-PEMOCVD) was proposed for the growth of GaN (Gallium nitride) films on ordinary amorphous soda-lime glass substrates. To alleviate the large lattice mismatch between GaN film and glass substrate and improve the heat dissipation performance for potential optoelctrical device application, five intermediate layers (Cu, Ni, Ti, Ag, and ITO) were deposited on the glass substrate before the growth of GaN. A comparative study was performed through structural analysis of the as-grown GaN films with various intermediate layers investigated by means of in-situ reflection high energy electron diffraction (RHEED), X-ray diffraction (XRD), and atomic force microscopy (AFM). The results indicate that the Ti intermediate layer has a great advantage over other intermediate layers in view of crystalline quality and smooth surface, therefore is more suitable and preferred for the potential application in optoelectronic devices.     

高压高功率VHF-PECVD的微晶硅薄膜高速沉积

采用高压高功率(hphP)甚高频等离子体强强化学气相沉积(VHF-PECVD)法对微晶硅(μc-Si:H)进行高速沉积,在最优沉积条件参数下对hphP和低压低功率(lplP)两组样品沉积速率、光电导、暗电导及光敏性等性能参数进行测试,得到了1.58 nm/s的较高沉积速率、光电性能优秀和更适合薄膜太阳能电池的μc-Si...     

Deposition and characterization of Pb TiO3 thin films on silicon wafers using metalorganic sources

Ferroelectric PbTiO₃ thin films were deposited on bare silicon and Pt/SiO₂/Si substrates by metalorganic chemical vapor deposition in a temperature range from 270 to 550°C. The deposition of a single phase PbTiO₃ thin film did not occur on bare silicon substrates. Instead a double layer of lead-silicate and PbTiO₃ was formed owing to a serious diffusion of lead and oxygen ions into silicon substrates. But on Pt/SiO₂/Si substrates, a single phase PbTiO₃ oriented parallel to a-and c-axis was grown at a substrate temperature as low as 350°C even without a high temperature post-annealing. To get an optimal film, a precise control of input gas composition and also a deposition in a low temperature range from 350 to 400°C are necessary.