50-nm fully depleted SOI CMOS technology with HfO/sub 2/ gate dielectric and TiN gate

In this paper, we demonstrate for the first time CMOS thin-film metal gate FDSOI devices using HfO/sub 2/ gate dielectric at the 50-nm physical gate length. Symmetric V/sub T/ is achieved for long-channel nMOS and pMOS devices using midgap TiN single metal gate with undoped channel and high-k dielectric. The devices show excellent performance with a I/sub on/=500 /spl mu/A//spl mu/m and I/sub off/=10 nA//spl mu/m at V/sub DD/=1.2 V for nMOSFET and I/sub on/=212 /spl mu/A//spl mu/m and I/sub off/=44 pA//spl mu/m at V/sub DD/=-1.2 V for pMOSFET, with a CET=30 /spl Aring/ and a gate length of 50 nm. DIBL and SS values as low as 70 mV/V nand 77 mV/dec, respectively, are obtained with a silicon film thickness of 14 nm. Ring oscillators with 15 ps stage delay at V/sub DD/=1.2 V are also realized.     

Interaction between magnetoresistor and magnetotransistor in the longitudinal and folded vertical Hall devices

This study investigates the one-dimensional longitudinal and folded vertical Hall devices, fabricated in a standard 0.35-/spl mu/m CMOS process. The smallest nonlinearity error 0.18%, the minimum offset 0.29 mV, and the maximum supply-current-related sensitivity S/sub RI/=3.837 V/A/spl middot/T, are obtained with a 10-mA bias current excited by the supply voltage of 0.6 V. The main magnetic mechanism is that the filament current of the vertical magnetoresistor is directly injected into the base region of the bulk magnetotransistor (BMT) to increase the density of minority carriers and then enhance the magnetosensitivity. Furthermore, the induced Hall voltage of the longitudinal vertical Hall device is proportional to the bias current, but the folded vertical Hall device is inversely impacted. This advantage makes it possible to get a low-power folded vertical Hall device. The folded style not only reduces the nonlinearity error but also minimizes the offset. Unfortunately, the tradeoff is a fall in sensitivity. The BMT is applied to increase magnetic sensitivity and to compensate for this negative impact.     

Influence of spinel substrate and over-layer for enhanced SAW and AO properties with KNbO3 thin film

Surface acoustic wave (SAW) propagation characteristics have been studied using modeling calculations for a potassium niobate (KNbO/sub 3/) thin film-layered structure with [001] and [110] orientation on a single crystal spinel (MgAl/sub 2/O/sub 4/) substrate, and a spinel buffer layer on silicon. Variation in the electromechanical coupling and acoustic attenuation has been compared. A significantly high value of coupling factor (k/sub max//sup 2/=23%) is obtained for the [001]KNbO/sub 3//spinel structure by introducing an optimum thickness of spinel over-layer for potential wide bandwidth SAW device applications. The dispersion characteristics with the [110] KNbO/sub 3/ orientation indicate an initial peak in the coupling coefficient value (k/sub max//sup 2/=8.8%) at a relatively low KNbO/sub 3/ film thickness that appears attractive for fabricating devices with thinner films. The KNbO/sub 3/ film with [001] orientation is found attractive for efficient acousto-optic (AO) device application with the formation of a symmetric waveguide structure (spinel(0.5 /spl mu/m)/KNbO/sub 3/(1.0 /spl mu/m)/spinel). A high value of k/sup 2/=23.5% with 50% diffraction efficiency has been obtained for the spinel(0.5 /spl mu/m)/KNbO/sub 3/(1.0 /spl mu/m)/spinel structure at 1 GHz SAW frequency and 633 nm optical wavelength at a very low input drive power of 15.4 mW.     

Tunable injection current compensation architecture for high fill-factor self-buffered active pixel sensor

A high fill-factor self-buffered active pixel sensor and a tunable injection current compensation architecture for high dynamic range imager are proposed for scaled standard CMOS technology. The new cell, including a photo diode formed by n-well and p-type substrate and an one-transistor output buffer, shows enhanced characteristics in output voltage swing and sensitivity compared with conventional APS. The imager can achieve fill-factor of 55%, sensitivity of 3.4 V/sec-lux, and large output swing of 2.2 V at V/sub DD/=3.3 V for 0.25-/spl mu/m CMOS technology. In addition, the proposed tunable injection current compensation architecture can improve dynamic range by as much as 40 dB and can be tailor designed to meet various application specifications. A dynamic range of up to 120 dB is projected by simulation results. Experimental results of the new structure, as well as simulated design of the circuit, are presented.     

Optimization of single-gate carbon-nanotube field-effect transistors

The performance of Schottky-barrier carbon-nanotube field-effect transistors (CNTFETs) critically depends on the device geometry. Asymmetric gate contacts, the drain and source contact thickness, and inhomogenous dielectrics above and below the nanotube influence the device operation. An optimizer has been used to extract geometries with steep subthreshold slope and high I/sub on//I/sub off/ ratio. It is found that the best performance improvements can be achieved using asymmetric gates centered above the source contact, where the optimum position and length of the gate contact varies with the oxide thickness. The main advantages of geometries with asymmetric gate contacts are the increased I/sub on//I/sub off/ ratio and the fact that the gate voltage required to attain minimum drain current is shifted toward zero, whereas symmetric geometries require V/sub g/=V/sub d//2. Our results suggest that the subthreshold slope of single-gate CNTFETs scales linearly with the gate-oxide thickness and can be reduced by a factor of two reaching a value below 100 mV/dec for devices with oxide thicknesses smaller than 5 nm by geometry optimization.     

Effect of self-assembled monolayers on charge injection and transport in poly(3-hexylthiophene)-based field-effect transistors at different channel length scales

Charge injection and transport in bottom-contact regioregular-poly(3-hexylthiophene) (rr-P3HT) based field-effect transistors (FETs), wherein the Au source and drain contacts are modified by self-assembled monolayers (SAMs), is reported at different channel length scales. Ultraviolet photoelectron spectroscopy is used to measure the change in metal work function upon treatment with four SAMs consisting of thiol-adsorbates of different chemical composition. Treatment of FETs with electron-poor (electron-rich) SAMs resulted in an increase (decrease) in contact metal work function because of the electron-withdrawing (-donating) tendency of the polar molecules. The change in metal work function affects charge injection and is reflected in the form of the modulation of the contact resistance, R(C). For example, R(C) decreased to 0.18 MΩ in the case of the (electron-poor) 3,5-bis-trifluoromethylbenzenethiol treated contacts from the value of 0.61 MΩ measured in the case of clean Au-contacts, whereas it increased to 0.97 MΩ in the case of the (electron-rich) 3-thiomethylthiophene treated contacts. Field-effect mobility values are observed to be affected in short-channel devices (<20 μm) but not in long-channel devices. This channel-length-dependent behavior of mobility is attributed to grain-boundary limited charge transport at longer channel lengths in these devices.     

The improvement of dynamic characteristics of ultrasonic therapeutic transducers using fine-grain PZT-based piezoceramics

Optimizing the dynamic resonant characteristics of ultrasonic therapeutic transducers depends most importantly on fine-grain piezoceramics with good resonant properties. In this paper, we prepare and compare modified Pb/sub 0.99/Sr/sub 0.01/[0.03(Mn/sub 1/3/Nb/sub 2/3/)-0.97(Zr/sub 0.51/Ti/sub 0.49/)]O/sub 3/ piezoceramics with 0.1 wt% CaCO/sub 3/ and 0.8 wt% PbO additives (PMZT3) synthesized by B-oxides precursor (BO) and conventional ceramic mixed-oxide methods (MO). Our experimental results show that the BO-type piezoceramics have better grain microstructure and better material properties [e.g., d/sub 33/= 340 pc/N, k/sub t/= 0.52, Q/sub m/= 1250, temperature coefficient of change rate of resonant frequency (TCF) = 0.01%/°C, and temperature coefficient of change rate of clamped capacitance (TCC) = 0.18%/°C]. We construct 1-MHz transducers using our BO and MO types of piezoceramics and examine their dynamic resonant characteristics as the transducers are driven by a power driver with open-loop control. Results show that the transducers with the BO-type piezoceramics have better dynamic characteristics, such as time stability (e.g., aging rate of resonant frequency at thickness mode = 0.26%/decade cycle, and aging rate of clamped capacitance = 0.55%/decade cycle) and temperature stability as BO-type piezoceramics. Furthermore, we observe that the clamped capacitance variation has more influence on the transducer dynamic characteristics than the resonant frequency variation, and we verify the observation from the partial derivative ratio of the transfer function derived by a simulated ultrasonic equivalent circuit system. It is concluded that the BO-type piezoceramics are better candidates than the MO-type samples for obtaining optimum dynamic resonant characteristics in ultrasonic therapeutic transducers.     

A general approach for high yield fabrication of CMOS-compatible all-semiconducting carbon nanotube field effect transistors

We report strategies to achieve both high assembly yield of carbon nanotubes at selected positions of the circuit via dielectrophoresis (DEP) and field effect transistor (FET) yield using an aqueous solution of semiconducting-enriched single-walled carbon nanotubes (s-SWNTs). When the DEP parameters were optimized for the assembly of individual s-SWNTs, 97% of the devices showed FET behavior with a maximum mobility of 210 cm2 V(-1) s(-1), on-off current ratio ～10(6) and on-conductance up to 3 μS, but with an assembly yield of only 33%. As the DEP parameters were optimized so that one to five s-SWNTs are connected per electrode pair, the assembly yield was almost 90%, with ～90% of these assembled devices demonstrating FET behavior. Further optimization gave an assembly yield of 100% with up to 10 SWNTs per site, but with a reduced FET yield of 59%. Improved FET performance including higher current on-off ratio and high switching speed were obtained by integrating a local Al2O3 gate to the device. Our 90% FET with 90% assembly yield is the highest reported so far for carbon nanotube devices. Our study provides a pathway which could become a general approach for the high yield fabrication of complementary metal oxide semiconductor (CMOS)-compatible carbon nanotube FETs.     

Multidimensional CMOS in-plane stress sensor

This paper reports a novel multidimensional complementary metal-oxide semiconductor (CMOS) based stress sensor. The device uses an octagonal n-well in a p-substrate and eight peripheral contacts enabling the current to be switched in eight directions rotated by an angle of /spl pi//4. By taking full advantage of the piezoresistive behavior of single-crystal silicon, the measurement of all in-plane stress tensor components, i.e., /spl sigma//sub xx/, /spl sigma//sub yy/, and /spl sigma//sub xy/, is demonstrated. This information is derived from the zeroth and second angular-order Fourier components of voltage signals parallel and perpendicular to the switched current. Nonlinearities of the system are reduced by proper bias conditions using a center contact. The device was calibrated by applying defined normal stresses using a bending bridge setup. The device behavior was modeled including piezoresistive effects and the junction field effect by a combination of the finite element method and a nonlinear simulation program with integrated circuits emphasis (SPICE) network simulation using junction field effect transistor (JFET) elements. Stress sensitivities of 200 /spl mu/V V/sup -1/ MPa/sup -1/ are demonstrated for the determination of the three stress components.     

Calibration of Curie temperatures for LiTaO/sub 3/ single crystals by the LFB ultrasonic material characterization system

The line-focus-beam ultrasonic material characterization (LFB-UMC) system is applied to a standardized comparison and evaluation of the Curie temperatures, T/sub C/, exclusively used in evaluating the chemical compositions of commercial LiTaO/sub 3/ crystals by measuring the velocities of Rayleigh-type leaky surface acoustic waves (LSAWs), V/sub LSAW/. We measured V/sub LSAW/ and T/sub C/ (standardized) under the same T/sub C/ measurement conditions for 36/spl deg/Y X-LiTaO/sub 3/ single-crystal wafers produced by four manufacturers and related the results to the T/sub C/ (individual) measured by the individual manufacturers. The relationships between V/sub LSAW/ and T/sub C/ (individual) varied from one company to another, and a single straight line of the proportional relationship between V/sub LSAW/ and T/sub C/ (standardized) was obtained for all wafers regardless of the manufacturer. These experimental results clarify that the problem associated with T/sub C/ measurements lies in the measurement conditions and the absolute accuracy of the measurement instruments. Measurements of the center frequencies of SH-type surface acoustic wave (SAW) filter devices are compared with V/sub LSAW/ measurements. A method of calibrating T/sub C/ using this ultrasonic system is proposed to establish standardized specifications of SAW-device crystal wafers.     

Magnetoresistively detected electron spin resonance in low-density two-dimensional electron gas in GaAs-AlGaAs single quantum wells

Electron spin resonance (ESR) is a natural candidate for quantum bit manipulation, provided that the confinement of a small number of electrons in a sufficiently small volume can be achieved. An important step is the development of low carrier density materials and structures in which the electron spins are isolated and can be controlled by ESR. We report on the realization of three low-density (n/sub 1/=1.77/spl times/10/sup 10/, n/sub 2/=4.5/spl times/10/sup 10/, and n/sub 3/=9/spl times/10/sup 10/ cm/sup -2/ without the help of a gate to deplete the channel) two-dimensional electron systems in GaAs-AlGaAs single quantum wells (QWs) and on the magnetoresistively detected electron spin resonance (MDESR) measurements in these samples. The MDESR has been characterized at /spl nu/=1 and /spl nu/=3 and the current intensity, microwave power, and temperature dependence have been studied. The structures that have been investigated represent the lowest density single QW samples in which MDESR has been detected. The implications of detection of the MDESR at such low electron density to coupled quantum-dot spin device technology will be presented.     

A novel SET/MOSFET hybrid static memory cell design

In this paper, a single electron transistor (SET)/metal-oxide-semiconductor field effect transistor (MOSFET)-based static memory cell is proposed. The negative differential conductance (NDC) characteristics of the SET block help us establish the static memory cell circuits more compactly than those in conventional technologies. The proposed memory cell consists of one MOSFET and two back-to-back connected SET blocks exhibiting the NDC. The peak-to-valley current ratio of the SET block is above four with C/sub G/=5.4C/sub T/ (C/sub T/=0.1 aF) at T=77K. The read and write operations of the proposed memory cell were validated with SET/MOSFET hybrid simulations at T=77 K. Even though the fabrication process that integrates MOSFET devices and SET blocks with NDC is not yet available, these results suggest that the proposed SET/MOSFET hybrid static memory cell is suitable for a high-density memory system.     

Inspection of intrinsic critical currents for spin-transfer magnetization switching

We examined the relationships between critical current, I/sub c/, and switching time, /spl tau//sub p/, for spin-transfer switching in two regions: (region I) /spl tau//sub p//spl Gt//spl tau//sub 0/, where thermal switching is accompanied and (region II) /spl tau//sub p/< several tens times /spl tau//sub 0/, where /spl tau//sub 0/ is the attempt time for thermal switching (/spl ap/1 ns). We estimated I/sub c0/, defined as the intrinsic I/sub c/ at 0 K, for both regions and confirmed experimentally that those I/sub c0/ coincided with each other at room temperature (RT). The value of I/sub c/ at /spl tau//sub p/=1 ns, measured with microwaves, was approximately 1.6 times the I/sub c0/. This suggested that we use at least two times I/sub c0/ as the writing currents of magnetic memory devices for nsec spin-transfer switching at RT. Although I/sub c0/ for both regions were defined as I/sub c/ at 0 K (I/sub c//sup 0K/) in theory, they showed temperature dependence at low temperatures; |I/sub c0/| for region I increased with decreasing temperature, and the estimated I/sub c//sup 0K/ was approximately three times I/sub c0/ for RT. This temperature dependence was quite different from that for region II.     

Breakdown of universal mobility curves in sub-100-nm MOSFETs

We explore the breakdown of universal mobility behavior in sub-100-nm Si MOSFETs, using a novel three-dimensional (3-D) statistical simulation approach. In this approach, carrier trajectories in the bulk are treated via 3-D Brownian dynamics, while the carrier-interface roughness scattering is treated using a novel empirical model. Owing to the high efficiency of the transport kernel, effective mobility in 3-D MOSFETs with realistic Si-SiO/sub 2/ interfaces reconstructed from a Gaussian or exponential correlation function can be simulated in a statistical manner. We first demonstrate a practical calibration procedure for the interface mobility and affirm the universal behavior in the long channel limit. Next, effective mobility in ensembles of MOSFETs with a gate length down to 10 nm is investigated. It is found that the random-discrete nature of the Si-SiO/sub 2/ interface leads to a distribution of carrier mobility below the interface, which can deviate considerably from universal mobility curves when L/sub gate/<6/spl Lambda/, where /spl Lambda/ is the correlation length for the SiO/sub 2/ interface.     

Characterization of the SnO2 based thin film transistors with Ga, In and Hf doping

We investigated the effects of doping tin oxide thin film transistors (TFTs) with Ga, In, and Hf. The quantity of doping impurities added to the SnO2-TFT channel layer was as follows: Ga (6.3-21.4 at.%), In (9.6-55.6 at.%), and Hf (1.2-2.7 at.%). Hafnium and gallium doping of SnO2 thin film decreased the carrier concentration, possibly due to a decrease in field effect mobility, and reduced oxygen vacancy-related defects. Indium-doped SnO2-TFTs exhibited high performance with a high field-effect mobility of > 20 cm2 V(-1) s(-1). The current on/off ratio and the subthreshold swing of In-doped SnO2-TFTs was 1 x 10(9) and 0.5 V/decade, respectively. These results demonstrate that Ga, In, and Hf doping can effectively enhance the performance of SnO2-based TFT devices.     

Electrical characterization of graphene synthesized by chemical vapor deposition using Ni substrate

In this work, the electrical characterization of graphene films grown by chemical vapor deposition (CVD) on a Ni thin film is carried out and a simple relation between the gate-dependent electrical transport and the thickness of the films is presented. Arrays of two-terminal devices with an average graphene film thickness of 6.9 nm were obtained using standard fabrication techniques. A simple two-band model is used to describe the graphene films, with a band overlap parameter E(0) = 17 meV determined by the dependence of conductivity on temperature. Statistical electrical measurement data are presented for 126 devices, with an extracted average background conductivity σ = 0.91 mS, average carrier mobility μ = 1300 cm(2) V(-1) s(-1) and residual resistivity ρ = 1.65 kΩ. The ratio of mobility to conductivity is calculated to be inversely proportional to the graphene film thickness and this calculation is statistically verified for the ensemble of 126 devices. This result is a new method of graphene film thickness determination and is useful for films which cannot have their thickness measured by AFM or optical interference, but which are electrically contacted and gated. This general approach provides a framework for comparing graphene devices made using different fabrication methods and graphene growth techniques, even without prior knowledge of their uniformity or thickness.     

Generation-recombination noise in pseudomorphic Modulation-doped Al/sub 0.2/Ga/sub 0.8/As/In/sub 0.1/Ga/sub 0.9/As/GaAs micro-Hall devices

The noise spectrum in micro-Hall devices based on pseudomorphic Al/sub 0.2/Ga/sub 0.8/As/In/sub 0.1/Ga/sub 0.9/As/GaAs modulation-doped heterostructures was measured between 4 Hz and 65 kHz, allowing components due to thermal, 1/f, and generation-recombination to be characterized. Applying deep level noise spectroscopy (DLNS) in the temperature range of 77-300 K to analyze the generation-recombination part of the spectrum, two electron traps contributing to noise density were identified. An emission activation energy of 474 meV was measured for the dominant trap, corresponding to the well-known DX center originating from the AlGaAs barrier. The other deep level, with an emission activation energy of 242 meV, is probably related to defects in the InGaAs layer. The structures under investigation resulted in high-performance micro-Hall devices: a supply-current-related sensitivity up to 725 V/spl middot/A/sup -1//spl middot/T/sup -1/ at 77 K independent of bias current, a signal-to-noise sensitivity of 155 dB/spl middot/T/sup -1/ and a detection limit of 340 pT/spl middot/mm/spl middot/Hz/sup -1/2/ at 77 K were measured.     

A 0.2 V Micro‐Electromechanical Switch Enabled by a Phase Transition

Micro‐electromechanical (MEM) switches, with advantages such as quasi‐zero leakage current, emerge as attractive candidates for overcoming the physical limits of complementary metal‐oxide semiconductor (CMOS) devices. To practically integrate MEM switches into CMOS circuits, two major challenges must be addressed: sub 1 V operating voltage to match the voltage levels in current circuit systems and being able to deliver at least millions of operating cycles. However, existing sub 1 V mechanical switches are mostly subject to significant body bias and/or limited lifetimes, thus failing to meet both limitations simultaneously. Here 0.2 V MEM switching devices with ?10⁶ safe operating cycles in ambient air are reported, which achieve the lowest operating voltage in mechanical switches without body bias reported to date. The ultralow operating voltage is mainly enabled by the abrupt phase transition of nanolayered vanadium dioxide (VO₂) slightly above room temperature. The phase‐transition MEM switches open possibilities for sub 1 V hybrid integrated devices/circuits/systems, as well as ultralow power consumption sensors for Internet of Things applications.     

Single-mode rib optical waveguides on SOG/SU-8 polymer and integrated Mach-Zehnder for designing thermal sensors

This paper presents a successful design, realization,and characterization of single-mode rib optical waveguides on SOG/SU-8 polymers in order to highlight a new approach to designing heat sensors. The basic principle of this new thermal-sensing method relies on the differential thermal behavior regarding both acting arms of a micro Mach-Zehnder Interferometer(MZI). First, two families of single-mode straight rib waveguides composed of SOG/SU-8 polymers are analyzed. Hence, optical losses for TE/sub 00/ and TM/sub 00/ optical modes for structures on Si/SiO/sub 2//SU-8 have been estimated respectively as 1,36 /spl plusmn/ 0,02 and 2,01/spl plusmn/0,02 dB/spl middot/cm/sup -1/, while the second one composed of Si/SiO/sub 2//SOG/SU-8 presented losses of 2,33 /spl plusmn/ 0,02 and 2,95/spl plusmn/0,02 dB/spl middot/cm/sup -1/. Then, owing to modeling results, an experimental sensor is realized as an integrated device made up of SU-8 polymer mounted on a standard silicon wafer. When subjected to a radiant source, as a laser light (980 nm) is injected across the cleaved input face of the MZI, the significant change of output signal allows us to consider a new approach to measuring radiant heat flowrate. Experimental results are given regarding the obtained phase shift against the subjected thermal power. According to the modeling results, one can expect new highly sensitive devices to be developed in the next coming years, with advantageous prospective industrial applications.