Development of front-end electronics for the luminosity detector at ILC

The design and measurements of the prototype front-end electronics for the luminosity detector (LumiCal) at the International Linear Collider (ILC) are presented. The challenges of the LumiCal front-end electronics are discussed and the proposed architecture comprising switched-gain preamplifier, pole-zero cancellation circuit (PZC) and switched-gain shaper is described. The preamplifier works for a wide range of input capacitance of up to 100 pF. The input charge dynamic range extends from <0.4 fC to and covers more than four orders of magnitude. To conform with the timing requirements a peaking time (T_peak) of about 70 ns was chosen. The prototype ASIC comprising eight channels was designed and fabricated in CMOS technology. The results of measurements on gain, noise, high count rate performance and crosstalk are presented.     

A silicon strip detector system for fermilab E706

Fermilab Experiment E706 is an experiment to study direct photon production in hadron-hadron collisions at the Fermilab Tevatron II. A part of the charged particle spectrometer is a silicon strip detector system used to determine the position of interaction vertices in the production target and to provide angular information about the secondary hadrons produced in a collision. We present some design criteria, as well as the results of tests of a water similar to those to be used in the experiment.     

Fast bipolar front-end for binary readout of silicon strip detectors

A very fast low-noise low-power 64-channel front-end chip for binary readout of silicon microstrip detectors (FABRIC) has been designed and manufactured using the full-custom bipolar process SHPi by Tektronix. The circuit consists of a preamplifier, a shaper and a discriminator. A noise level of 476 e⁻ + 63 e⁻/pF has been obtained for the amplifier peaking time of 15 ns. The walk time of the discriminator is less than 5 ns for input signals ranging from 2 fC to 8 fC at a discriminator threshold of 1 fC. The dead time for two minimum ionizing particle signals is 40 ns. The above parameters have been obtained with a low power consumption of 1.3 mW per channel.     

CD: A double sided silicon strip detector for radioactive nuclear beam experiments

A very compact double sided silicon strip detector array is described, designed for use in reaction studies involving radioactive nuclear beams. It is small enough to fit inside a large solid angle γ-detector array and will enable Doppler-shift corrections at energies in the vicinity of the Coulomb barrier. The detector provides sufficient energy and time-of-flight resolution for the identification of light reaction products and can be set up to cover a substantial part of the scattering angular distribution with good resolution.

The device is available in thicknesses of up to 500 μm to stop all interesting reaction products. Moreover, a very thin (35–40 μm) variant of this detector is described that can be used as an energy loss detector in a ΔE−E telescope geometry followed by a detector that measures the residual energy. This provides additional particle identification capabilities, e.g. in light exotic nuclei induced reactions. First results from a commissioning run using a post-accelerated radioactive beam are presented.     

Radiation tolerance for the SMASH-series front-end chips for a silicon micro-strip detector

The radiation tolerance for prototype front-end chips designed for a silicon micro-strip detector was examined with a ⁶⁰Co irradiation source to establish an allowable range of the radiation dose. The irradiated front-end chips were SMA²SH-64A, a 64-channel preamplifier array; SMA²SH-1, a single-channel preamplifier circuit with a comparator; and Control-C, a digital-control chip for the preamplifiers.     

High impedance discrete delay-line readout circuit for silicon strip detector

A prototype 16-tap high impedance discrete delay-line readout circuit has been designed and fabricated for Si-strip detectors suitable for nuclear physics experiments involving moderate count rate applications. The delay-line offers a delay of 30 ns per tap with very good linearity. The energy resolution for -particles from ²⁴¹Am²³⁹Pu source is found to be satisfactory, when 16 strips are connected through the above readout circuit of a 32-strip Si-strip detector having a dead layer of 5 μm. This readout system is very useful where a large number of detectors are integrated in a compact space and accommodating their readout electronics is a cumbersome task.     

A cryogenic device for a low energy x-ray space detector

A cryostat was required for low energy x-ray studies in a space detector with no moving parts, or reacting jet of cryogenic fluid, and with an operating life of up to 10 hours. This paper describes the design of such a cryostat in which every unavoidable thermal leak was reduced and a high enthalpy load was realised between 77 and 90 K.     

Low noise front-end electronics for microstrip position sensors and vertex detectors for experiments at TeV energies

A low noise front-end system suitable for signal acquisition from a microstrip detector has been developed. The system is specifically intended for experiments with beams of high intensity and it is able to operate with noise weighting functions as short as 200 ns and detector capacitances up to 50 pF, yet preserving outstanding noise performances. As a first application, the front-end system described here is going to be employed in the vertex detector of the E687 experiment, due to be performed at the Fermilab Tevatron.     

Development of ultra-high density silicon nanowire arrays for electronics applications

This article reviews our recent progress on ultra-high density nanowires (NWs) array-based electronics. The superlattice nanowire pattern transfer (SNAP) method is utilized to produce aligned, ultra-high density Si NW arrays. We fi rst cover processing and materials issues related to achieving bulk-like conductivity characteristics from 10 20 nm wide Si NWs. We then discuss Si NW-based fi eld-effect transistors (FETs). These NWs & NW FETs provide terrifi c building blocks for various electronic circuits with applications to memory, energy conversion, fundamental physics, logic, and others. We focus our discussion on complementary symmetry NW logic circuitry, since that provides the most demanding metrics for guiding nanofabrication. Issues such as controlling the density and spatial distribution of both p-and n-type dopants within NW arrays are discussed, as are general methods for achieving Ohmic contacts to both p-and n-type NWs. These various materials and nanofabrication advances are brought together to demonstrate energy effi cient, complementary symmetry NW logic circuits.     

A new universal gate for low power SoC applications

This paper formulates a new design technique for an area and energy efficient Universal NAND gate. The proposed robust three transistors (3T) based NAND gate is just as effective for dynamic power control in CMOS VLSI circuits for System on Chip (SoC) applications. The 3T NAND gate is intuitively momentous and lead to better performance measures in terms of dynamic power, reduced area and high speed while maintaining comparable performance than the other available NAND gate logic structures. Simulation tests were performed by employing standard Berkeley Predictive Technology Model (BPTM) 22 nm, 45 nm and 90 nm process technologies. The experiment and simulation results show that, the proposed 3T NAND gate effectively outperforms the basic CMOS NAND gate with excellent driving capability and signal integrity with exact output logic levels.     

VIKING, a CMOS low noise monolithic 128 channel frontend for Si-strip detector readout

A low noise Si-strip detector readout chip has been designed and built in 1.5 μm CMOS technology. The chip is optimized w.r.t. noise. Measurements with this chip connected to several silicon strip detectors are presented. A noise performance of ENC = 135 e⁻ + 12 e⁻/pF and signal to noise ratios between 40–80, depending on the detector, for minimum ionizing particles traversing silicon has been achieved.     

A full on-chip, low noise, low power consumption reference generator in monolithic active pixel sensors

The monolithic active pixel sensor (MAPS) is a promising choice to track charged particles in high energy physics experiments, such as the solenoidal tracker at RHIC (STAR). In order to achieve a clean reference voltage and simplify the cable placement, a full on-chip reference generator is presented in this paper. By utilizing a buffer and a series RC network, the proposed circuit can achieve good stability, low power and low noise, without any external components. The output voltage is adjustable to compensate the influence of the fabrication process. The generator has been implemented and fabricated in a standard 0.35 μm CMOS process. Its silicon area is 327 μm×119 μm. The total power dissipation is 677 μW at a supply voltage of 3.3 V. The measured results show that only 5.84% of the total noise in MAPS is induced by the proposed reference generator. The comparison with the other optional circuit based on a current buffer is also presented.     

Fabry-Perot resonator with interferometric read-out for low noise applications

New readout configurations for a Fabry-Perot (FP) resonator (or frequency discriminator) that combine the reflected and transmitted waves are analyzed in detail. The waves may be combined in a Sagnac (S) or Mach-Zehnder (MZ) configuration and tuned to a dark port (DP) to suppress the carrier frequency. To achieve this in a standard FP resonator, the mirror reflectance must be extremely well matched, which is a difficult and expensive task. Suppressing the carrier minimizes the Shot noise floor of a Pound-Drever-Hall (PDH) frequency-stabilized laser. Moreover, depending on the amount of carrier suppression, a high amount of power may be injected into the resonator without saturating or destroying the photodetector at the discriminator output. Because the sensitivity of the frequency discriminator is also proportional to the injected power, a large improvement in frequency noise can be achieved for high power PDH-stabilized lasers utilizing only a small phase modulation index.     

Novel interferometric frequency discriminators for low noise microwave applications

New configurations of interferometric frequency discriminators (FD) for frequency stabilization of microwave oscillators are examined. The new FDs are arranged in single directional (SD) (patented), bidirectional (BD) (patent pending), and dual reflection (DR) (patent pending) configurations. In the SD configuration, the signals reflected off and transmitted through the resonator separately pass through different arms of the interferometer. In the BD configuration, microwaves pass in both directions through each arm of the interferometer. In the DR configuration, microwaves are reflected from the resonator as well as the compensating arm. The FD sensitivity is compared with that for the conventional interferometric FD and found to be 6 dB greater in the BD configuration. Because no circulator is required within the interferometer in either the BD or the DR FD, the discriminator's phase noise floor is not limited by the circulator contribution     

A power quality monitoring system: a case study in DSP-basedsolutions for power electronics

Programmable digital signal processors (DSPs) are emerging as the processors of choice in monitoring and control of high-end power electronics systems. This paper adopts a case study approach to illustrate a development methodology for DSP-based solutions. The unique features of DSP chips that make them ideal for real-time applications are highlighted. Power electronics systems where DSPs have been used are indicated. A case study in which a DSP-based solution was developed for a power quality monitoring application is presented. Through the case study, the issues involved in adopting a system architecture, selecting a DSP, and developing software for an application are discussed. The methodology described in this paper presents broad guidelines which can be intelligently applied to develop DSP-based solutions to meet specific requirements     

Fabrication and performance of a multistrip silicon detector for low energy nuclear experiments

A multistrip silicon detector was fabricated by using planar techniques. It consisted of five parallel pn-junction strips on a wafer of 200 μm thick. The dimension of each strip was 2 mm × 20 mm and the strip pitch was 2.6 mm. The detector was tested by using heavy ions produced in the reaction of ¹⁸¹Ta + ¹⁴N at 210 MeV. We found that it enables clear particle identification for heavy ions and that it shows good property for a position sensitive detector. We studied phenomena of multiple output events induced by a single particle entering the detector; events giving double outputs occurred only in a arrow gap between adjacent strips. Events with more than triple outputs did not exist and insensitive areas were not observed.     

Passive low temperature thermostat with millikelvin temperature stability for space applications

Due to limited energy availability energy saving methods are important in space. In cold experiments there are devices, such as detectors, which must be kept at a stable temperature: the use of active temperature controllers actually requires dissipation of energy. On the contrary, advantage can be taken of the self-stabilization effect on temperature, during melting of a pure substance at its triple point. Selecting a suitable ratio between the heat of melting of the mass of the substance and the heat exchange requirement with this heat sink, a melting plateau can be maintained for the time required (even weeks or months), keeping temperature stable within a millikelvin without any specific energy supply. In special cases, such as very long missions or stringent weight/volume requirements, when the total energy exchange overcomes the total available heat of melting, plateau conditions can be restored as many times as required and in a short time, with a sensible use of stray heat flows already available in the vehicle. The passive low temperature thermostat is a special application of a well established technique for realizing precise temperature reference points developed in the last decade. Several fixed temperatures between 14 and 90 K can be realized.